vl53l1_nvm_structs.h

00001 
00002 /*******************************************************************************
00003  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00004 
00005  This file is part of VL53L1 Core and is dual licensed,
00006  either 'STMicroelectronics
00007  Proprietary license'
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009 
00010 ********************************************************************************
00011 
00012  'STMicroelectronics Proprietary license'
00013 
00014 ********************************************************************************
00015 
00016  License terms: STMicroelectronics Proprietary in accordance with licensing
00017  terms at www.st.com/sla0081
00018 
00019  STMicroelectronics confidential
00020  Reproduction and Communication of this document is strictly prohibited unless
00021  specifically authorized in writing by STMicroelectronics.
00022 
00023 
00024 ********************************************************************************
00025 
00026  Alternatively, VL53L1 Core may be distributed under the terms of
00027  'BSD 3-clause "New" or "Revised" License', in which case the following
00028  provisions apply instead of the ones
00029  mentioned above :
00030 
00031 ********************************************************************************
00032 
00033  License terms: BSD 3-clause "New" or "Revised" License.
00034 
00035  Redistribution and use in source and binary forms, with or without
00036  modification, are permitted provided that the following conditions are met:
00037 
00038  1. Redistributions of source code must retain the above copyright notice, this
00039  list of conditions and the following disclaimer.
00040 
00041  2. Redistributions in binary form must reproduce the above copyright notice,
00042  this list of conditions and the following disclaimer in the documentation
00043  and/or other materials provided with the distribution.
00044 
00045  3. Neither the name of the copyright holder nor the names of its contributors
00046  may be used to endorse or promote products derived from this software
00047  without specific prior written permission.
00048 
00049  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00050  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00051  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00052  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00053  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00054  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00055  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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00058  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00059 
00060 
00061 ********************************************************************************
00062 
00063 */
00064 
00065 
00066 
00067 
00068 
00069 
00070 
00071 #ifndef _VL53L1_NVM_STRUCTS_H_
00072 #define _VL53L1_NVM_STRUCTS_H_
00073 
00074 
00075 #ifdef __cplusplus
00076 extern "C"
00077 {
00078 #endif
00079 
00080 #include "vl53l1_platform.h"
00081 #include "vl53l1_ll_def.h"
00082 
00083 
00084 
00085 
00086 typedef struct {
00087 
00088     uint16_t  result__actual_effective_rtn_spads;
00089 
00090     uint8_t   ref_spad_array__num_requested_ref_spads;
00091 
00092     uint8_t   ref_spad_array__ref_location;
00093 
00094     uint16_t  result__peak_signal_count_rate_rtn_mcps;
00095 
00096     uint16_t  result__ambient_count_rate_rtn_mcps;
00097 
00098     uint16_t  result__peak_signal_count_rate_ref_mcps;
00099 
00100     uint16_t  result__ambient_count_rate_ref_mcps;
00101 
00102     uint16_t  measured_distance_mm;
00103 
00104     uint16_t  measured_distance_stdev_mm;
00105 
00106 
00107 } VL53L1_decoded_nvm_fmt_range_data_t;
00108 
00109 
00110 
00111 
00112 typedef struct {
00113 
00114     char      nvm__fmt__fgc[19];
00115 
00116     uint8_t   nvm__fmt__test_program_major;
00117 
00118     uint8_t   nvm__fmt__test_program_minor;
00119 
00120     uint8_t   nvm__fmt__map_major;
00121 
00122     uint8_t   nvm__fmt__map_minor;
00123 
00124     uint8_t   nvm__fmt__year;
00125 
00126     uint8_t   nvm__fmt__month;
00127 
00128     uint8_t   nvm__fmt__day;
00129 
00130     uint8_t   nvm__fmt__module_date_phase;
00131 
00132     uint16_t  nvm__fmt__time;
00133 
00134     uint8_t   nvm__fmt__tester_id;
00135 
00136     uint8_t   nvm__fmt__site_id;
00137 
00138     uint8_t   nvm__ews__test_program_major;
00139 
00140     uint8_t   nvm__ews__test_program_minor;
00141 
00142     uint8_t   nvm__ews__probe_card_major;
00143 
00144     uint8_t   nvm__ews__probe_card_minor;
00145 
00146     uint8_t   nvm__ews__tester_id;
00147 
00148 
00149     char      nvm__ews__lot[8];
00150 
00151     uint8_t   nvm__ews__wafer;
00152 
00153     uint8_t   nvm__ews__xcoord;
00154 
00155     uint8_t   nvm__ews__ycoord;
00156 
00157 } VL53L1_decoded_nvm_fmt_info_t;
00158 
00159 
00160 
00161 
00162 typedef struct {
00163 
00164     uint8_t   nvm__ews__test_program_major;
00165 
00166     uint8_t   nvm__ews__test_program_minor;
00167 
00168     uint8_t   nvm__ews__probe_card_major;
00169 
00170     uint8_t   nvm__ews__probe_card_minor;
00171 
00172     uint8_t   nvm__ews__tester_id;
00173 
00174 
00175     char      nvm__ews__lot[8];
00176 
00177     uint8_t   nvm__ews__wafer;
00178 
00179     uint8_t   nvm__ews__xcoord;
00180 
00181     uint8_t   nvm__ews__ycoord;
00182 
00183 
00184 } VL53L1_decoded_nvm_ews_info_t;
00185 
00186 
00187 
00188 
00189 typedef struct {
00190     uint8_t   nvm__identification_model_id;
00191 
00192     uint8_t   nvm__identification_module_type;
00193 
00194     uint8_t   nvm__identification_revision_id;
00195 
00196     uint16_t  nvm__identification_module_id;
00197 
00198     uint8_t   nvm__i2c_valid;
00199 
00200     uint8_t   nvm__i2c_device_address_ews;
00201 
00202     uint16_t  nvm__ews__fast_osc_frequency;
00203 
00204     uint8_t   nvm__ews__fast_osc_trim_max;
00205 
00206     uint8_t   nvm__ews__fast_osc_freq_set;
00207 
00208     uint16_t  nvm__ews__slow_osc_calibration;
00209 
00210     uint16_t  nvm__fmt__fast_osc_frequency;
00211 
00212     uint8_t   nvm__fmt__fast_osc_trim_max;
00213 
00214     uint8_t   nvm__fmt__fast_osc_freq_set;
00215 
00216     uint16_t  nvm__fmt__slow_osc_calibration;
00217 
00218     uint8_t   nvm__vhv_config_unlock;
00219 
00220     uint8_t   nvm__ref_selvddpix;
00221 
00222     uint8_t   nvm__ref_selvquench;
00223 
00224     uint8_t   nvm__regavdd1v2_sel;
00225 
00226     uint8_t   nvm__regdvdd1v2_sel;
00227 
00228     uint8_t   nvm__vhv_timeout__macrop;
00229 
00230     uint8_t   nvm__vhv_loop_bound;
00231 
00232     uint8_t   nvm__vhv_count_threshold;
00233 
00234     uint8_t   nvm__vhv_offset;
00235 
00236     uint8_t   nvm__vhv_init_enable;
00237 
00238     uint8_t   nvm__vhv_init_value;
00239 
00240     uint8_t   nvm__laser_safety_vcsel_trim_ll;
00241 
00242     uint8_t   nvm__laser_safety_vcsel_selion_ll;
00243 
00244     uint8_t   nvm__laser_safety_vcsel_selion_max_ll;
00245 
00246     uint8_t   nvm__laser_safety_mult_ll;
00247 
00248     uint8_t   nvm__laser_safety_clip_ll;
00249 
00250     uint8_t   nvm__laser_safety_vcsel_trim_ld;
00251 
00252     uint8_t   nvm__laser_safety_vcsel_selion_ld;
00253 
00254     uint8_t   nvm__laser_safety_vcsel_selion_max_ld;
00255 
00256     uint8_t   nvm__laser_safety_mult_ld;
00257 
00258     uint8_t   nvm__laser_safety_clip_ld;
00259 
00260     uint8_t   nvm__laser_safety_lock_byte;
00261 
00262     uint8_t   nvm__laser_safety_unlock_byte;
00263 
00264     uint8_t   nvm__ews__spad_enables_rtn[VL53L1_RTN_SPAD_BUFFER_SIZE];
00265 
00266     uint8_t   nvm__ews__spad_enables_ref__loc1[VL53L1_REF_SPAD_BUFFER_SIZE];
00267 
00268     uint8_t   nvm__ews__spad_enables_ref__loc2[VL53L1_REF_SPAD_BUFFER_SIZE];
00269 
00270     uint8_t   nvm__ews__spad_enables_ref__loc3[VL53L1_REF_SPAD_BUFFER_SIZE];
00271 
00272     uint8_t   nvm__fmt__spad_enables_rtn[VL53L1_RTN_SPAD_BUFFER_SIZE];
00273 
00274     uint8_t   nvm__fmt__spad_enables_ref__loc1[VL53L1_REF_SPAD_BUFFER_SIZE];
00275 
00276     uint8_t   nvm__fmt__spad_enables_ref__loc2[VL53L1_REF_SPAD_BUFFER_SIZE];
00277 
00278     uint8_t   nvm__fmt__spad_enables_ref__loc3[VL53L1_REF_SPAD_BUFFER_SIZE];
00279 
00280     uint8_t   nvm__fmt__roi_config__mode_roi_centre_spad;
00281 
00282     uint8_t   nvm__fmt__roi_config__mode_roi_x_size;
00283 
00284     uint8_t   nvm__fmt__roi_config__mode_roi_y_size;
00285 
00286     uint8_t   nvm__fmt__ref_spad_apply__num_requested_ref_spad;
00287 
00288     uint8_t   nvm__fmt__ref_spad_man__ref_location;
00289 
00290     uint16_t  nvm__fmt__mm_config__inner_offset_mm;
00291 
00292     uint16_t  nvm__fmt__mm_config__outer_offset_mm;
00293 
00294     uint16_t  nvm__fmt__algo_part_to_part_range_offset_mm;
00295 
00296     uint16_t  nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps;
00297 
00298     uint16_t  nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps;
00299 
00300     uint16_t  nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps;
00301 
00302     uint8_t   nvm__fmt__spare__host_config__nvm_config_spare_0;
00303 
00304     uint8_t   nvm__fmt__spare__host_config__nvm_config_spare_1;
00305 
00306     uint8_t   nvm__customer_space_programmed;
00307 
00308     uint8_t   nvm__cust__i2c_device_address;
00309 
00310     uint8_t   nvm__cust__ref_spad_apply__num_requested_ref_spad;
00311 
00312     uint8_t   nvm__cust__ref_spad_man__ref_location;
00313 
00314     uint16_t  nvm__cust__mm_config__inner_offset_mm;
00315 
00316     uint16_t  nvm__cust__mm_config__outer_offset_mm;
00317 
00318     uint16_t  nvm__cust__algo_part_to_part_range_offset_mm;
00319 
00320     uint16_t  nvm__cust__algo__crosstalk_compensation_plane_offset_kcps;
00321 
00322     uint16_t  nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps;
00323 
00324     uint16_t  nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps;
00325 
00326     uint8_t   nvm__cust__spare__host_config__nvm_config_spare_0;
00327 
00328     uint8_t   nvm__cust__spare__host_config__nvm_config_spare_1;
00329 
00330 
00331     VL53L1_optical_centre_t              fmt_optical_centre;
00332     VL53L1_cal_peak_rate_map_t           fmt_peak_rate_map;
00333     VL53L1_additional_offset_cal_data_t  fmt_add_offset_data;
00334 
00335     VL53L1_decoded_nvm_fmt_range_data_t
00336         fmt_range_data[VL53L1_NVM_MAX_FMT_RANGE_DATA];
00337 
00338     VL53L1_decoded_nvm_fmt_info_t        fmt_info;
00339     VL53L1_decoded_nvm_ews_info_t        ews_info;
00340 
00341 } VL53L1_decoded_nvm_data_t;
00342 
00343 
00344 
00345 #ifdef __cplusplus
00346 }
00347 #endif
00348 
00349 #endif
00350 
00351