charles macneill
/
VL53L1CB
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Embed:
(wiki syntax)
Show/hide line numbers
vl53l1_nvm_map.h
00001 00002 /******************************************************************************* 00003 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00004 00005 This file is part of VL53L1 Core and is dual licensed, 00006 either 'STMicroelectronics 00007 Proprietary license' 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 00010 ******************************************************************************** 00011 00012 'STMicroelectronics Proprietary license' 00013 00014 ******************************************************************************** 00015 00016 License terms: STMicroelectronics Proprietary in accordance with licensing 00017 terms at www.st.com/sla0081 00018 00019 STMicroelectronics confidential 00020 Reproduction and Communication of this document is strictly prohibited unless 00021 specifically authorized in writing by STMicroelectronics. 00022 00023 00024 ******************************************************************************** 00025 00026 Alternatively, VL53L1 Core may be distributed under the terms of 00027 'BSD 3-clause "New" or "Revised" License', in which case the following 00028 provisions apply instead of the ones 00029 mentioned above : 00030 00031 ******************************************************************************** 00032 00033 License terms: BSD 3-clause "New" or "Revised" License. 00034 00035 Redistribution and use in source and binary forms, with or without 00036 modification, are permitted provided that the following conditions are met: 00037 00038 1. Redistributions of source code must retain the above copyright notice, this 00039 list of conditions and the following disclaimer. 00040 00041 2. Redistributions in binary form must reproduce the above copyright notice, 00042 this list of conditions and the following disclaimer in the documentation 00043 and/or other materials provided with the distribution. 00044 00045 3. Neither the name of the copyright holder nor the names of its contributors 00046 may be used to endorse or promote products derived from this software 00047 without specific prior written permission. 00048 00049 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00050 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00051 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00052 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00053 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00054 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00055 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00056 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00057 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00058 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00059 00060 00061 ******************************************************************************** 00062 00063 */ 00064 00065 00066 00067 00068 00069 00070 00071 #ifndef _VL53L1_NVM_MAP_H_ 00072 #define _VL53L1_NVM_MAP_H_ 00073 00074 00075 #ifdef __cplusplus 00076 extern "C" 00077 { 00078 #endif 00079 00080 00081 00082 00083 #define VL53L1_NVM__IDENTIFICATION__MODEL_ID 0x0008 00084 00085 #define VL53L1_NVM__IDENTIFICATION__MODULE_TYPE 0x000C 00086 00087 #define VL53L1_NVM__IDENTIFICATION__REVISION_ID 0x000D 00088 00089 #define VL53L1_NVM__IDENTIFICATION__MODULE_ID 0x000E 00090 00091 #define VL53L1_NVM__I2C_VALID 0x0010 00092 00093 #define VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS 0x0011 00094 00095 #define VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY 0x0014 00096 00097 #define VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX 0x0016 00098 00099 #define VL53L1_NVM__EWS__FAST_OSC_FREQ_SET 0x0017 00100 00101 #define VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION 0x0018 00102 00103 #define VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY 0x001C 00104 00105 #define VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX 0x001E 00106 00107 #define VL53L1_NVM__FMT__FAST_OSC_FREQ_SET 0x001F 00108 00109 #define VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION 0x0020 00110 00111 #define VL53L1_NVM__VHV_CONFIG_UNLOCK 0x0028 00112 00113 #define VL53L1_NVM__REF_SELVDDPIX 0x0029 00114 00115 #define VL53L1_NVM__REF_SELVQUENCH 0x002A 00116 00117 #define VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL 0x002B 00118 00119 #define VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x002C 00120 00121 #define VL53L1_NVM__VHV_CONFIG__COUNT_THRESH 0x002D 00122 00123 #define VL53L1_NVM__VHV_CONFIG__OFFSET 0x002E 00124 00125 #define VL53L1_NVM__VHV_CONFIG__INIT 0x002F 00126 00127 #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL 0x0030 00128 00129 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL 0x0031 00130 00131 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL 0x0032 00132 00133 #define VL53L1_NVM__LASER_SAFETY__MULT_LL 0x0034 00134 00135 #define VL53L1_NVM__LASER_SAFETY__CLIP_LL 0x0035 00136 00137 #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD 0x0038 00138 00139 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD 0x0039 00140 00141 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD 0x003A 00142 00143 #define VL53L1_NVM__LASER_SAFETY__MULT_LD 0x003C 00144 00145 #define VL53L1_NVM__LASER_SAFETY__CLIP_LD 0x003D 00146 00147 #define VL53L1_NVM__LASER_SAFETY_LOCK_BYTE 0x0040 00148 00149 #define VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE 0x0044 00150 00151 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_ 0x0048 00152 00153 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_1_ 0x0049 00154 00155 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_2_ 0x004A 00156 00157 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_3_ 0x004B 00158 00159 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_4_ 0x004C 00160 00161 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_5_ 0x004D 00162 00163 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_6_ 0x004E 00164 00165 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_7_ 0x004F 00166 00167 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_8_ 0x0050 00168 00169 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_9_ 0x0051 00170 00171 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_10_ 0x0052 00172 00173 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_11_ 0x0053 00174 00175 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_12_ 0x0054 00176 00177 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_13_ 0x0055 00178 00179 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_14_ 0x0056 00180 00181 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_15_ 0x0057 00182 00183 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_16_ 0x0058 00184 00185 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_17_ 0x0059 00186 00187 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_18_ 0x005A 00188 00189 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_19_ 0x005B 00190 00191 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_20_ 0x005C 00192 00193 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_21_ 0x005D 00194 00195 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_22_ 0x005E 00196 00197 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_23_ 0x005F 00198 00199 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_24_ 0x0060 00200 00201 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_25_ 0x0061 00202 00203 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_26_ 0x0062 00204 00205 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_27_ 0x0063 00206 00207 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_28_ 0x0064 00208 00209 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_29_ 0x0065 00210 00211 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_30_ 0x0066 00212 00213 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_31_ 0x0067 00214 00215 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_ 0x0068 00216 00217 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_1_ 0x0069 00218 00219 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_2_ 0x006A 00220 00221 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_3_ 0x006B 00222 00223 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_4_ 0x006C 00224 00225 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_5_ 0x006D 00226 00227 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_ 0x0070 00228 00229 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_1_ 0x0071 00230 00231 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_2_ 0x0072 00232 00233 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_3_ 0x0073 00234 00235 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_4_ 0x0074 00236 00237 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_5_ 0x0075 00238 00239 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_ 0x0078 00240 00241 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_1_ 0x0079 00242 00243 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_2_ 0x007A 00244 00245 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_3_ 0x007B 00246 00247 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_4_ 0x007C 00248 00249 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_5_ 0x007D 00250 00251 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_ 0x0080 00252 00253 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_1_ 0x0081 00254 00255 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_2_ 0x0082 00256 00257 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_3_ 0x0083 00258 00259 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_4_ 0x0084 00260 00261 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_5_ 0x0085 00262 00263 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_6_ 0x0086 00264 00265 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_7_ 0x0087 00266 00267 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_8_ 0x0088 00268 00269 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_9_ 0x0089 00270 00271 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_10_ 0x008A 00272 00273 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_11_ 0x008B 00274 00275 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_12_ 0x008C 00276 00277 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_13_ 0x008D 00278 00279 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_14_ 0x008E 00280 00281 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_15_ 0x008F 00282 00283 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_16_ 0x0090 00284 00285 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_17_ 0x0091 00286 00287 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_18_ 0x0092 00288 00289 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_19_ 0x0093 00290 00291 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_20_ 0x0094 00292 00293 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_21_ 0x0095 00294 00295 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_22_ 0x0096 00296 00297 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_23_ 0x0097 00298 00299 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_24_ 0x0098 00300 00301 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_25_ 0x0099 00302 00303 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_26_ 0x009A 00304 00305 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_27_ 0x009B 00306 00307 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_28_ 0x009C 00308 00309 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_29_ 0x009D 00310 00311 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_30_ 0x009E 00312 00313 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_31_ 0x009F 00314 00315 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_ 0x00A0 00316 00317 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_1_ 0x00A1 00318 00319 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_2_ 0x00A2 00320 00321 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_3_ 0x00A3 00322 00323 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_4_ 0x00A4 00324 00325 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_5_ 0x00A5 00326 00327 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_ 0x00A8 00328 00329 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_1_ 0x00A9 00330 00331 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_2_ 0x00AA 00332 00333 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_3_ 0x00AB 00334 00335 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_4_ 0x00AC 00336 00337 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_5_ 0x00AD 00338 00339 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_ 0x00B0 00340 00341 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_1_ 0x00B1 00342 00343 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_2_ 0x00B2 00344 00345 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_3_ 0x00B3 00346 00347 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_4_ 0x00B4 00348 00349 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_5_ 0x00B5 00350 00351 #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x00B8 00352 00353 #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE 0x00B9 00354 00355 #define VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00BC 00356 00357 #define VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION 0x00BD 00358 00359 #define VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM 0x00C0 00360 00361 #define VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM 0x00C2 00362 00363 #define VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00C4 00364 00365 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00C8 00366 00367 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS \ 00368 0x00CA 00369 00370 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS \ 00371 0x00CC 00372 00373 #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00CE 00374 00375 #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00CF 00376 00377 #define VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED 0x00E0 00378 00379 #define VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS 0x00E4 00380 00381 #define VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00E8 00382 00383 #define VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION 0x00E9 00384 00385 #define VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM 0x00EC 00386 00387 #define VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM 0x00EE 00388 00389 #define VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00F0 00390 00391 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00F4 00392 00393 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS \ 00394 0x00F6 00395 00396 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS \ 00397 0x00F8 00398 00399 #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00FA 00400 00401 #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00FB 00402 00403 #define VL53L1_NVM__FMT__FGC__BYTE_0 0x01DC 00404 00405 #define VL53L1_NVM__FMT__FGC__BYTE_1 0x01DD 00406 00407 #define VL53L1_NVM__FMT__FGC__BYTE_2 0x01DE 00408 00409 #define VL53L1_NVM__FMT__FGC__BYTE_3 0x01DF 00410 00411 #define VL53L1_NVM__FMT__FGC__BYTE_4 0x01E0 00412 00413 #define VL53L1_NVM__FMT__FGC__BYTE_5 0x01E1 00414 00415 #define VL53L1_NVM__FMT__FGC__BYTE_6 0x01E2 00416 00417 #define VL53L1_NVM__FMT__FGC__BYTE_7 0x01E3 00418 00419 #define VL53L1_NVM__FMT__FGC__BYTE_8 0x01E4 00420 00421 #define VL53L1_NVM__FMT__FGC__BYTE_9 0x01E5 00422 00423 #define VL53L1_NVM__FMT__FGC__BYTE_10 0x01E6 00424 00425 #define VL53L1_NVM__FMT__FGC__BYTE_11 0x01E7 00426 00427 #define VL53L1_NVM__FMT__FGC__BYTE_12 0x01E8 00428 00429 #define VL53L1_NVM__FMT__FGC__BYTE_13 0x01E9 00430 00431 #define VL53L1_NVM__FMT__FGC__BYTE_14 0x01EA 00432 00433 #define VL53L1_NVM__FMT__FGC__BYTE_15 0x01EB 00434 00435 #define VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR 0x01EC 00436 00437 #define VL53L1_NVM__FMT__MAP_MAJOR_MINOR 0x01ED 00438 00439 #define VL53L1_NVM__FMT__YEAR_MONTH 0x01EE 00440 00441 #define VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE 0x01EF 00442 00443 #define VL53L1_NVM__FMT__TIME 0x01F0 00444 00445 #define VL53L1_NVM__FMT__TESTER_ID 0x01F2 00446 00447 #define VL53L1_NVM__FMT__SITE_ID 0x01F3 00448 00449 #define VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR 0x01F4 00450 00451 #define VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR 0x01F5 00452 00453 #define VL53L1_NVM__EWS__TESTER_ID 0x01F6 00454 00455 #define VL53L1_NVM__EWS__LOT__BYTE_0 0x01F8 00456 00457 #define VL53L1_NVM__EWS__LOT__BYTE_1 0x01F9 00458 00459 #define VL53L1_NVM__EWS__LOT__BYTE_2 0x01FA 00460 00461 #define VL53L1_NVM__EWS__LOT__BYTE_3 0x01FB 00462 00463 #define VL53L1_NVM__EWS__LOT__BYTE_4 0x01FC 00464 00465 #define VL53L1_NVM__EWS__LOT__BYTE_5 0x01FD 00466 00467 #define VL53L1_NVM__EWS__WAFER 0x01FD 00468 00469 #define VL53L1_NVM__EWS__XCOORD 0x01FE 00470 00471 #define VL53L1_NVM__EWS__YCOORD 0x01FF 00472 00473 00474 #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX 0x00B8 00475 #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE 4 00476 00477 #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX 0x015C 00478 #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE 56 00479 00480 #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX 0x0194 00481 #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE 8 00482 00483 #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE 0x019C 00484 #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK 0x01AC 00485 #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK 0x01BC 00486 #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT 0x01CC 00487 #define VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES 16 00488 00489 00490 00491 00492 00493 00494 00495 #ifdef __cplusplus 00496 } 00497 #endif 00498 00499 #endif 00500 00501
Generated on Tue Jul 12 2022 20:07:15 by
1.7.2