vl53l1_nvm.c

00001 
00002 /*******************************************************************************
00003  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00004 
00005  This file is part of VL53L1 Core and is dual licensed,
00006  either 'STMicroelectronics
00007  Proprietary license'
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009 
00010 ********************************************************************************
00011 
00012  'STMicroelectronics Proprietary license'
00013 
00014 ********************************************************************************
00015 
00016  License terms: STMicroelectronics Proprietary in accordance with licensing
00017  terms at www.st.com/sla0081
00018 
00019  STMicroelectronics confidential
00020  Reproduction and Communication of this document is strictly prohibited unless
00021  specifically authorized in writing by STMicroelectronics.
00022 
00023 
00024 ********************************************************************************
00025 
00026  Alternatively, VL53L1 Core may be distributed under the terms of
00027  'BSD 3-clause "New" or "Revised" License', in which case the following
00028  provisions apply instead of the ones
00029  mentioned above :
00030 
00031 ********************************************************************************
00032 
00033  License terms: BSD 3-clause "New" or "Revised" License.
00034 
00035  Redistribution and use in source and binary forms, with or without
00036  modification, are permitted provided that the following conditions are met:
00037 
00038  1. Redistributions of source code must retain the above copyright notice, this
00039  list of conditions and the following disclaimer.
00040 
00041  2. Redistributions in binary form must reproduce the above copyright notice,
00042  this list of conditions and the following disclaimer in the documentation
00043  and/or other materials provided with the distribution.
00044 
00045  3. Neither the name of the copyright holder nor the names of its contributors
00046  may be used to endorse or promote products derived from this software
00047  without specific prior written permission.
00048 
00049  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00050  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00051  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00052  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00053  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00054  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00055  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00056  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00057  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00058  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00059 
00060 
00061 ********************************************************************************
00062 
00063 */
00064 
00065 
00066 
00067 
00068 
00069 #ifdef _MSC_VER
00070 #define snprintf _snprintf
00071 #endif
00072 
00073 
00074 
00075 #include "vl53l1_ll_def.h"
00076 #include "vl53l1_platform.h"
00077 #include "vl53l1_platform_log.h"
00078 #include "vl53l1_register_map.h"
00079 #include "vl53l1_core.h"
00080 #include "vl53l1_nvm_structs.h"
00081 #include "vl53l1_nvm_map.h"
00082 #include "vl53l1_nvm.h"
00083 
00084 
00085 
00086 #define LOG_FUNCTION_START(fmt, ...) \
00087     _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_NVM, fmt, ##__VA_ARGS__)
00088 #define LOG_FUNCTION_END(status, ...) \
00089     _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_NVM, status, ##__VA_ARGS__)
00090 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
00091     _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_NVM,\
00092         status, fmt, ##__VA_ARGS__)
00093 
00094 #define trace_print(level, ...) \
00095     _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_NVM, \
00096     level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
00097 
00098 
00099 VL53L1_Error VL53L1_nvm_enable(
00100     VL53L1_DEV      Dev,
00101     uint16_t        nvm_ctrl_pulse_width,
00102     int32_t         nvm_power_up_delay_us)
00103 {
00104 
00105 
00106     VL53L1_Error status = VL53L1_ERROR_NONE;
00107 
00108     LOG_FUNCTION_START("");
00109 
00110 
00111 
00112 
00113     if (status == VL53L1_ERROR_NONE)
00114         status = VL53L1_disable_firmware(Dev);
00115 
00116 
00117 
00118 
00119     if (status == VL53L1_ERROR_NONE)
00120         status = VL53L1_enable_powerforce(Dev);
00121 
00122 
00123 
00124     if (status == VL53L1_ERROR_NONE)
00125         status = VL53L1_WaitUs(
00126             Dev,
00127             VL53L1_ENABLE_POWERFORCE_SETTLING_TIME_US);
00128 
00129 
00130 
00131     if (status == VL53L1_ERROR_NONE)
00132         status = VL53L1_WrByte(
00133                     Dev,
00134                     VL53L1_RANGING_CORE__NVM_CTRL__PDN,
00135                     0x01);
00136 
00137 
00138 
00139     if (status == VL53L1_ERROR_NONE)
00140         status = VL53L1_WrByte(
00141                     Dev,
00142                     VL53L1_RANGING_CORE__CLK_CTRL1,
00143                     0x05);
00144 
00145 
00146 
00147     if (status == VL53L1_ERROR_NONE)
00148         status = VL53L1_WaitUs(
00149                     Dev,
00150                     nvm_power_up_delay_us);
00151 
00152 
00153 
00154     if (status == VL53L1_ERROR_NONE)
00155         status = VL53L1_WrByte(
00156                     Dev,
00157                     VL53L1_RANGING_CORE__NVM_CTRL__MODE,
00158                     0x01);
00159 
00160     if (status == VL53L1_ERROR_NONE)
00161         status = VL53L1_WrWord(
00162             Dev,
00163             VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB,
00164             nvm_ctrl_pulse_width);
00165 
00166     LOG_FUNCTION_END(status);
00167 
00168     return status;
00169 
00170 }
00171 
00172 
00173 VL53L1_Error VL53L1_nvm_read(
00174     VL53L1_DEV    Dev,
00175     uint8_t       start_address,
00176     uint8_t       count,
00177     uint8_t      *pdata)
00178 {
00179 
00180 
00181     VL53L1_Error status   = VL53L1_ERROR_NONE;
00182     uint8_t      nvm_addr = 0;
00183 
00184     LOG_FUNCTION_START("");
00185 
00186     trace_print(
00187            VL53L1_TRACE_LEVEL_INFO,
00188            "%-12s = 0x%02X (%3u)\n",
00189            "nvm_addr", nvm_addr, nvm_addr);
00190 
00191     trace_print(
00192            VL53L1_TRACE_LEVEL_INFO,
00193            "%-12s = 0x%02X (%3u)\n",
00194            "count", count, count);
00195 
00196     for (nvm_addr = start_address;
00197         nvm_addr < (start_address+count) ; nvm_addr++) {
00198 
00199 
00200 
00201         if (status == VL53L1_ERROR_NONE)
00202             status = VL53L1_WrByte(
00203                 Dev,
00204                 VL53L1_RANGING_CORE__NVM_CTRL__ADDR,
00205                 nvm_addr);
00206 
00207 
00208 
00209         if (status == VL53L1_ERROR_NONE)
00210             status = VL53L1_WrByte(
00211                 Dev,
00212                 VL53L1_RANGING_CORE__NVM_CTRL__READN,
00213                 0x00);
00214 
00215 
00216 
00217         if (status == VL53L1_ERROR_NONE)
00218             status = VL53L1_WaitUs(
00219                 Dev,
00220                 VL53L1_NVM_READ_TRIGGER_DELAY_US);
00221 
00222         if (status == VL53L1_ERROR_NONE)
00223             status = VL53L1_WrByte(
00224                 Dev,
00225                 VL53L1_RANGING_CORE__NVM_CTRL__READN,
00226                 0x01);
00227 
00228 
00229         if (status == VL53L1_ERROR_NONE)
00230             status = VL53L1_ReadMulti(
00231                 Dev,
00232                 VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM,
00233                 pdata,
00234                 4);
00235 
00236         trace_print(
00237             VL53L1_TRACE_LEVEL_INFO,
00238             "NVM address : 0x%02X = 0x%02X%02X%02X%02X\n",
00239             nvm_addr, *pdata, *(pdata+1), *(pdata+2), *(pdata+3));
00240 
00241 
00242 
00243         pdata = pdata + 4;
00244 
00245 
00246     }
00247 
00248     LOG_FUNCTION_END(status);
00249 
00250     return status;
00251 }
00252 
00253 
00254 VL53L1_Error VL53L1_nvm_disable(
00255     VL53L1_DEV    Dev)
00256 {
00257 
00258 
00259     VL53L1_Error status = VL53L1_ERROR_NONE;
00260 
00261     LOG_FUNCTION_START("");
00262 
00263     if (status == VL53L1_ERROR_NONE)
00264         status = VL53L1_WrByte(
00265                     Dev,
00266                     VL53L1_RANGING_CORE__NVM_CTRL__READN,
00267                     0x01);
00268 
00269 
00270 
00271     if (status == VL53L1_ERROR_NONE)
00272         status = VL53L1_WrByte(
00273                     Dev,
00274                     VL53L1_RANGING_CORE__NVM_CTRL__PDN,
00275                     0x00);
00276 
00277 
00278 
00279     if (status == VL53L1_ERROR_NONE)
00280         status = VL53L1_disable_powerforce(Dev);
00281 
00282 
00283 
00284     if (status == VL53L1_ERROR_NONE)
00285         status = VL53L1_enable_firmware(Dev);
00286 
00287     LOG_FUNCTION_END(status);
00288 
00289     return status;
00290 
00291 }
00292 
00293 
00294 VL53L1_Error VL53L1_nvm_format_decode(
00295     uint16_t                   buf_size,
00296     uint8_t                   *pbuffer,
00297     VL53L1_decoded_nvm_data_t *pdata)
00298 {
00299 
00300 
00301 
00302     VL53L1_Error status = VL53L1_ERROR_NONE;
00303 
00304     uint8_t    i        = 0;
00305     uint8_t   *ptmp     = NULL;
00306     int        pptmp[VL53L1_NVM_MAX_FMT_RANGE_DATA];
00307 
00308     LOG_FUNCTION_START("");
00309 
00310     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
00311         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00312 
00313     pdata->nvm__identification_model_id =
00314         (uint8_t)VL53L1_i2c_decode_with_mask(
00315             1,
00316             pbuffer + VL53L1_NVM__IDENTIFICATION__MODEL_ID,
00317             0x000000FF,
00318             0,
00319             0);
00320     pdata->nvm__identification_module_type =
00321         (uint8_t)VL53L1_i2c_decode_with_mask(
00322             1,
00323             pbuffer + VL53L1_NVM__IDENTIFICATION__MODULE_TYPE,
00324             0x000000FF,
00325             0,
00326             0);
00327     pdata->nvm__identification_revision_id =
00328         (uint8_t)VL53L1_i2c_decode_with_mask(
00329             1,
00330             pbuffer + VL53L1_NVM__IDENTIFICATION__REVISION_ID,
00331             0x0000000F,
00332             0,
00333             0);
00334     pdata->nvm__identification_module_id =
00335         (uint16_t)VL53L1_i2c_decode_with_mask(
00336             2,
00337             pbuffer + VL53L1_NVM__IDENTIFICATION__MODULE_ID,
00338             0x0000FFFF,
00339             0,
00340             0);
00341     pdata->nvm__i2c_valid =
00342         (uint8_t)VL53L1_i2c_decode_with_mask(
00343             1,
00344             pbuffer + VL53L1_NVM__I2C_VALID,
00345             0x000000FF,
00346             0,
00347             0);
00348     pdata->nvm__i2c_device_address_ews =
00349         (uint8_t)VL53L1_i2c_decode_with_mask(
00350             1,
00351             pbuffer + VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS,
00352             0x000000FF,
00353             0,
00354             0);
00355     pdata->nvm__ews__fast_osc_frequency =
00356         (uint16_t)VL53L1_i2c_decode_with_mask(
00357             2,
00358             pbuffer +
00359             VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY,
00360             0x0000FFFF,
00361             0,
00362             0);
00363     pdata->nvm__ews__fast_osc_trim_max =
00364         (uint8_t)VL53L1_i2c_decode_with_mask(
00365             1,
00366             pbuffer + VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX,
00367             0x0000007F,
00368             0,
00369             0);
00370     pdata->nvm__ews__fast_osc_freq_set =
00371         (uint8_t)VL53L1_i2c_decode_with_mask(
00372             1,
00373             pbuffer + VL53L1_NVM__EWS__FAST_OSC_FREQ_SET,
00374             0x00000007,
00375             0,
00376             0);
00377     pdata->nvm__ews__slow_osc_calibration =
00378         (uint16_t)VL53L1_i2c_decode_with_mask(
00379             2,
00380             pbuffer + VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION,
00381             0x000003FF,
00382             0,
00383             0);
00384     pdata->nvm__fmt__fast_osc_frequency =
00385         (uint16_t)VL53L1_i2c_decode_with_mask(
00386             2,
00387             pbuffer +
00388             VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY,
00389             0x0000FFFF,
00390             0,
00391             0);
00392     pdata->nvm__fmt__fast_osc_trim_max =
00393         (uint8_t)VL53L1_i2c_decode_with_mask(
00394             1,
00395             pbuffer + VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX,
00396             0x0000007F,
00397             0,
00398             0);
00399     pdata->nvm__fmt__fast_osc_freq_set =
00400         (uint8_t)VL53L1_i2c_decode_with_mask(
00401             1,
00402             pbuffer + VL53L1_NVM__FMT__FAST_OSC_FREQ_SET,
00403             0x00000007,
00404             0,
00405             0);
00406     pdata->nvm__fmt__slow_osc_calibration =
00407         (uint16_t)VL53L1_i2c_decode_with_mask(
00408             2,
00409             pbuffer + VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION,
00410             0x000003FF,
00411             0,
00412             0);
00413     pdata->nvm__vhv_config_unlock =
00414         (uint8_t)VL53L1_i2c_decode_with_mask(
00415             1,
00416             pbuffer + VL53L1_NVM__VHV_CONFIG_UNLOCK,
00417             0x000000FF,
00418             0,
00419             0);
00420     pdata->nvm__ref_selvddpix =
00421         (uint8_t)VL53L1_i2c_decode_with_mask(
00422             1,
00423             pbuffer + VL53L1_NVM__REF_SELVDDPIX,
00424             0x0000000F,
00425             0,
00426             0);
00427     pdata->nvm__ref_selvquench =
00428         (uint8_t)VL53L1_i2c_decode_with_mask(
00429             1,
00430             pbuffer + VL53L1_NVM__REF_SELVQUENCH,
00431             0x00000078,
00432             3,
00433             0);
00434     pdata->nvm__regavdd1v2_sel =
00435         (uint8_t)VL53L1_i2c_decode_with_mask(
00436             1,
00437             pbuffer + VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
00438             0x0000000C,
00439             2,
00440             0);
00441     pdata->nvm__regdvdd1v2_sel =
00442         (uint8_t)VL53L1_i2c_decode_with_mask(
00443             1,
00444             pbuffer + VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
00445             0x00000003,
00446             0,
00447             0);
00448     pdata->nvm__vhv_timeout__macrop =
00449         (uint8_t)VL53L1_i2c_decode_with_mask(
00450             1,
00451             pbuffer +
00452             VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
00453             0x00000003,
00454             0,
00455             0);
00456     pdata->nvm__vhv_loop_bound =
00457         (uint8_t)VL53L1_i2c_decode_with_mask(
00458             1,
00459             pbuffer +
00460             VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
00461             0x000000FC,
00462             2,
00463             0);
00464     pdata->nvm__vhv_count_threshold =
00465         (uint8_t)VL53L1_i2c_decode_with_mask(
00466             1,
00467             pbuffer + VL53L1_NVM__VHV_CONFIG__COUNT_THRESH,
00468             0x000000FF,
00469             0,
00470             0);
00471     pdata->nvm__vhv_offset =
00472         (uint8_t)VL53L1_i2c_decode_with_mask(
00473             1,
00474             pbuffer + VL53L1_NVM__VHV_CONFIG__OFFSET,
00475             0x0000003F,
00476             0,
00477             0);
00478     pdata->nvm__vhv_init_enable =
00479         (uint8_t)VL53L1_i2c_decode_with_mask(
00480             1,
00481             pbuffer + VL53L1_NVM__VHV_CONFIG__INIT,
00482             0x00000080,
00483             7,
00484             0);
00485     pdata->nvm__vhv_init_value =
00486         (uint8_t)VL53L1_i2c_decode_with_mask(
00487             1,
00488             pbuffer + VL53L1_NVM__VHV_CONFIG__INIT,
00489             0x0000003F,
00490             0,
00491             0);
00492     pdata->nvm__laser_safety_vcsel_trim_ll =
00493         (uint8_t)VL53L1_i2c_decode_with_mask(
00494             1,
00495             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL,
00496             0x00000007,
00497             0,
00498             0);
00499     pdata->nvm__laser_safety_vcsel_selion_ll =
00500         (uint8_t)VL53L1_i2c_decode_with_mask(
00501             1,
00502             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL,
00503             0x0000003F,
00504             0,
00505             0);
00506     pdata->nvm__laser_safety_vcsel_selion_max_ll =
00507         (uint8_t)VL53L1_i2c_decode_with_mask(
00508             1,
00509             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL,
00510             0x0000003F,
00511             0,
00512             0);
00513     pdata->nvm__laser_safety_mult_ll =
00514         (uint8_t)VL53L1_i2c_decode_with_mask(
00515             1,
00516             pbuffer + VL53L1_NVM__LASER_SAFETY__MULT_LL,
00517             0x0000003F,
00518             0,
00519             0);
00520     pdata->nvm__laser_safety_clip_ll =
00521         (uint8_t)VL53L1_i2c_decode_with_mask(
00522             1,
00523             pbuffer + VL53L1_NVM__LASER_SAFETY__CLIP_LL,
00524             0x0000003F,
00525             0,
00526             0);
00527     pdata->nvm__laser_safety_vcsel_trim_ld =
00528         (uint8_t)VL53L1_i2c_decode_with_mask(
00529             1,
00530             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD,
00531             0x00000007,
00532             0,
00533             0);
00534     pdata->nvm__laser_safety_vcsel_selion_ld =
00535         (uint8_t)VL53L1_i2c_decode_with_mask(
00536             1,
00537             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD,
00538             0x0000003F,
00539             0,
00540             0);
00541     pdata->nvm__laser_safety_vcsel_selion_max_ld =
00542         (uint8_t)VL53L1_i2c_decode_with_mask(
00543             1,
00544             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD,
00545             0x0000003F,
00546             0,
00547             0);
00548     pdata->nvm__laser_safety_mult_ld =
00549         (uint8_t)VL53L1_i2c_decode_with_mask(
00550             1,
00551             pbuffer + VL53L1_NVM__LASER_SAFETY__MULT_LD,
00552             0x0000003F,
00553             0,
00554             0);
00555     pdata->nvm__laser_safety_clip_ld =
00556         (uint8_t)VL53L1_i2c_decode_with_mask(
00557             1,
00558             pbuffer + VL53L1_NVM__LASER_SAFETY__CLIP_LD,
00559             0x0000003F,
00560             0,
00561             0);
00562     pdata->nvm__laser_safety_lock_byte =
00563         (uint8_t)VL53L1_i2c_decode_with_mask(
00564             1,
00565             pbuffer + VL53L1_NVM__LASER_SAFETY_LOCK_BYTE,
00566             0x000000FF,
00567             0,
00568             0);
00569     pdata->nvm__laser_safety_unlock_byte =
00570         (uint8_t)VL53L1_i2c_decode_with_mask(
00571             1,
00572             pbuffer + VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE,
00573             0x000000FF,
00574             0,
00575             0);
00576 
00577 
00578 
00579     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_;
00580     for (i = 0 ; i < VL53L1_RTN_SPAD_BUFFER_SIZE ; i++)
00581         pdata->nvm__ews__spad_enables_rtn[i] = *ptmp++;
00582 
00583     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_;
00584     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00585         pdata->nvm__ews__spad_enables_ref__loc1[i] = *ptmp++;
00586 
00587     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_;
00588     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00589         pdata->nvm__ews__spad_enables_ref__loc2[i] = *ptmp++;
00590 
00591     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_;
00592     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00593         pdata->nvm__ews__spad_enables_ref__loc3[i] = *ptmp++;
00594 
00595 
00596 
00597     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_;
00598     for (i = 0 ; i < VL53L1_RTN_SPAD_BUFFER_SIZE ; i++)
00599         pdata->nvm__fmt__spad_enables_rtn[i] = *ptmp++;
00600 
00601     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_;
00602     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00603         pdata->nvm__fmt__spad_enables_ref__loc1[i] = *ptmp++;
00604 
00605     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_;
00606     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00607         pdata->nvm__fmt__spad_enables_ref__loc2[i] = *ptmp++;
00608 
00609     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_;
00610     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00611         pdata->nvm__fmt__spad_enables_ref__loc3[i] = *ptmp++;
00612 
00613 
00614     pdata->nvm__fmt__roi_config__mode_roi_centre_spad =
00615         (uint8_t)VL53L1_i2c_decode_with_mask(
00616             1,
00617             pbuffer +
00618             VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD,
00619             0x000000FF,
00620             0,
00621             0);
00622     pdata->nvm__fmt__roi_config__mode_roi_x_size =
00623         (uint8_t)VL53L1_i2c_decode_with_mask(
00624             1,
00625             pbuffer +
00626             VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
00627             0x000000F0,
00628             4,
00629             0);
00630     pdata->nvm__fmt__roi_config__mode_roi_y_size =
00631         (uint8_t)VL53L1_i2c_decode_with_mask(
00632             1,
00633             pbuffer + VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
00634             0x0000000F,
00635             0,
00636             0);
00637     pdata->nvm__fmt__ref_spad_apply__num_requested_ref_spad =
00638         (uint8_t)VL53L1_i2c_decode_with_mask(
00639             1,
00640             pbuffer +
00641             VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
00642             0x000000FF,
00643             0,
00644             0);
00645     pdata->nvm__fmt__ref_spad_man__ref_location =
00646         (uint8_t)VL53L1_i2c_decode_with_mask(
00647             1,
00648             pbuffer + VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION,
00649             0x00000003,
00650             0,
00651             0);
00652     pdata->nvm__fmt__mm_config__inner_offset_mm =
00653         (uint16_t)VL53L1_i2c_decode_with_mask(
00654             2,
00655             pbuffer + VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM,
00656             0x0000FFFF,
00657             0,
00658             0);
00659     pdata->nvm__fmt__mm_config__outer_offset_mm =
00660         (uint16_t)VL53L1_i2c_decode_with_mask(
00661             2,
00662             pbuffer + VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM,
00663             0x0000FFFF,
00664             0,
00665             0);
00666     pdata->nvm__fmt__algo_part_to_part_range_offset_mm =
00667         (uint16_t)VL53L1_i2c_decode_with_mask(
00668             2,
00669             pbuffer +
00670             VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
00671             0x00000FFF,
00672             0,
00673             0);
00674     pdata->nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps =
00675         (uint16_t)VL53L1_i2c_decode_with_mask(
00676         2,
00677         pbuffer +
00678         VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
00679         0x0000FFFF,
00680         0,
00681         0);
00682     pdata->nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps =
00683     (uint16_t)VL53L1_i2c_decode_with_mask(
00684     2,
00685     pbuffer +
00686     VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
00687     0x0000FFFF,
00688     0,
00689     0);
00690     pdata->nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps =
00691     (uint16_t)VL53L1_i2c_decode_with_mask(
00692     2,
00693     pbuffer +
00694     VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
00695     0x0000FFFF,
00696     0,
00697     0);
00698     pdata->nvm__fmt__spare__host_config__nvm_config_spare_0 =
00699         (uint8_t)VL53L1_i2c_decode_with_mask(
00700             1,
00701             pbuffer +
00702             VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
00703             0x000000FF,
00704             0,
00705             0);
00706     pdata->nvm__fmt__spare__host_config__nvm_config_spare_1 =
00707         (uint8_t)VL53L1_i2c_decode_with_mask(
00708             1,
00709             pbuffer +
00710             VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
00711             0x000000FF,
00712             0,
00713             0);
00714     pdata->nvm__customer_space_programmed =
00715         (uint8_t)VL53L1_i2c_decode_with_mask(
00716             1,
00717             pbuffer + VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED,
00718             0x000000FF,
00719             0,
00720             0);
00721     pdata->nvm__cust__i2c_device_address =
00722         (uint8_t)VL53L1_i2c_decode_with_mask(
00723             1,
00724             pbuffer + VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS,
00725             0x000000FF,
00726             0,
00727             0);
00728     pdata->nvm__cust__ref_spad_apply__num_requested_ref_spad =
00729         (uint8_t)VL53L1_i2c_decode_with_mask(
00730         1,
00731         pbuffer +
00732         VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
00733         0x000000FF,
00734         0,
00735         0);
00736     pdata->nvm__cust__ref_spad_man__ref_location =
00737         (uint8_t)VL53L1_i2c_decode_with_mask(
00738             1,
00739             pbuffer + VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION,
00740             0x00000003,
00741             0,
00742             0);
00743     pdata->nvm__cust__mm_config__inner_offset_mm =
00744         (uint16_t)VL53L1_i2c_decode_with_mask(
00745             2,
00746             pbuffer + VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM,
00747             0x0000FFFF,
00748             0,
00749             0);
00750     pdata->nvm__cust__mm_config__outer_offset_mm =
00751         (uint16_t)VL53L1_i2c_decode_with_mask(
00752             2,
00753             pbuffer + VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM,
00754             0x0000FFFF,
00755             0,
00756             0);
00757     pdata->nvm__cust__algo_part_to_part_range_offset_mm =
00758         (uint16_t)VL53L1_i2c_decode_with_mask(
00759             2,
00760             pbuffer +
00761             VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
00762             0x00000FFF,
00763             0,
00764             0);
00765     pdata->nvm__cust__algo__crosstalk_compensation_plane_offset_kcps =
00766     (uint16_t)VL53L1_i2c_decode_with_mask(
00767     2,
00768     pbuffer +
00769     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
00770     0x0000FFFF,
00771     0,
00772     0);
00773     pdata->nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps =
00774     (uint16_t)VL53L1_i2c_decode_with_mask(
00775     2,
00776     pbuffer +
00777     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
00778     0x0000FFFF,
00779     0,
00780     0);
00781     pdata->nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps =
00782     (uint16_t)VL53L1_i2c_decode_with_mask(
00783     2,
00784     pbuffer +
00785     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
00786     0x0000FFFF,
00787     0,
00788     0);
00789     pdata->nvm__cust__spare__host_config__nvm_config_spare_0 =
00790     (uint8_t)VL53L1_i2c_decode_with_mask(
00791     1,
00792     pbuffer + VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
00793     0x000000FF,
00794     0,
00795     0);
00796     pdata->nvm__cust__spare__host_config__nvm_config_spare_1 =
00797         (uint8_t)VL53L1_i2c_decode_with_mask(
00798         1,
00799         pbuffer +
00800         VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
00801         0x000000FF,
00802         0,
00803         0);
00804 
00805 
00806 
00807     if (status == VL53L1_ERROR_NONE)
00808         status =
00809         VL53L1_nvm_decode_optical_centre(
00810             buf_size,
00811             pbuffer + VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX,
00812             &(pdata->fmt_optical_centre));
00813 
00814 
00815 
00816     if (status == VL53L1_ERROR_NONE)
00817         status =
00818         VL53L1_nvm_decode_cal_peak_rate_map(
00819             buf_size,
00820             pbuffer + VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX,
00821             &(pdata->fmt_peak_rate_map));
00822 
00823 
00824 
00825     if (status == VL53L1_ERROR_NONE)
00826         status =
00827         VL53L1_nvm_decode_additional_offset_cal_data(
00828             buf_size,
00829             pbuffer +
00830             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX,
00831             &(pdata->fmt_add_offset_data));
00832 
00833 
00834 
00835     pptmp[0] = VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE;
00836     pptmp[1] = VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK;
00837     pptmp[2] = VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK;
00838     pptmp[3] = VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT;
00839 
00840     for (i = 0 ; i < VL53L1_NVM_MAX_FMT_RANGE_DATA ; i++) {
00841         if (status == VL53L1_ERROR_NONE)
00842             status =
00843                 VL53L1_nvm_decode_fmt_range_results_data(
00844                     buf_size,
00845                     pbuffer + pptmp[i],
00846                     &(pdata->fmt_range_data[i]));
00847     }
00848 
00849 
00850     if (status == VL53L1_ERROR_NONE)
00851         status =
00852             VL53L1_nvm_decode_fmt_info(
00853                 buf_size,
00854                 pbuffer,
00855                 &(pdata->fmt_info));
00856 
00857     if (status == VL53L1_ERROR_NONE)
00858         status =
00859             VL53L1_nvm_decode_ews_info(
00860                 buf_size,
00861                 pbuffer,
00862                 &(pdata->ews_info));
00863 
00864     LOG_FUNCTION_END(status);
00865 
00866     return status;
00867 
00868 }
00869 
00870 
00871 VL53L1_Error VL53L1_nvm_decode_optical_centre(
00872     uint16_t                    buf_size,
00873     uint8_t                    *pbuffer,
00874     VL53L1_optical_centre_t    *pdata)
00875 {
00876 
00877     VL53L1_Error status   = VL53L1_ERROR_NONE;
00878 
00879     uint16_t  tmp = 0;
00880 
00881     if (buf_size < VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE)
00882         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00883 
00884 
00885     tmp  = 0x0100;
00886     tmp -= (uint16_t)*(pbuffer + 2);
00887     if (tmp > 0x0FF)
00888         tmp = 0;
00889 
00890     pdata->x_centre = (uint8_t)tmp;
00891     pdata->y_centre = *(pbuffer + 3);
00892 
00893     return status;
00894 }
00895 
00896 
00897 VL53L1_Error VL53L1_nvm_decode_cal_peak_rate_map(
00898     uint16_t                    buf_size,
00899     uint8_t                    *pbuffer,
00900     VL53L1_cal_peak_rate_map_t *pdata)
00901 {
00902 
00903     VL53L1_Error status   = VL53L1_ERROR_NONE;
00904 
00905     uint8_t   *ptmp = NULL;
00906     uint8_t       i = 0;
00907 
00908     if (buf_size < VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE)
00909         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00910 
00911     pdata->cal_distance_mm =
00912         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00913 
00914     pdata->cal_reflectance_pc =
00915         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 2);
00916     pdata->cal_reflectance_pc =
00917         pdata->cal_reflectance_pc >> 6;
00918 
00919     pdata->max_samples = VL53L1_NVM_PEAK_RATE_MAP_SAMPLES;
00920     pdata->width       = VL53L1_NVM_PEAK_RATE_MAP_WIDTH;
00921     pdata->height      = VL53L1_NVM_PEAK_RATE_MAP_HEIGHT;
00922 
00923     ptmp = pbuffer + 4;
00924     for (i = 0 ; i < VL53L1_NVM_PEAK_RATE_MAP_SAMPLES ; i++) {
00925         pdata->peak_rate_mcps[i] =
00926             (uint16_t)VL53L1_i2c_decode_uint16_t(2, ptmp);
00927         ptmp += 2;
00928     }
00929 
00930     return status;
00931 }
00932 
00933 
00934 VL53L1_Error VL53L1_nvm_decode_additional_offset_cal_data(
00935     uint16_t                             buf_size,
00936     uint8_t                             *pbuffer,
00937     VL53L1_additional_offset_cal_data_t *pdata)
00938 {
00939 
00940     VL53L1_Error status   = VL53L1_ERROR_NONE;
00941 
00942     if (buf_size < VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE)
00943         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00944 
00945     pdata->result__mm_inner_actual_effective_spads =
00946         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00947 
00948     pdata->result__mm_outer_actual_effective_spads =
00949         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 2);
00950 
00951     pdata->result__mm_inner_peak_signal_count_rtn_mcps =
00952         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
00953 
00954     pdata->result__mm_outer_peak_signal_count_rtn_mcps =
00955         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 6);
00956 
00957     return status;
00958 }
00959 
00960 
00961 VL53L1_Error VL53L1_nvm_decode_fmt_range_results_data(
00962     uint16_t                             buf_size,
00963     uint8_t                             *pbuffer,
00964     VL53L1_decoded_nvm_fmt_range_data_t *pdata)
00965 {
00966 
00967     VL53L1_Error status   = VL53L1_ERROR_NONE;
00968 
00969     if (buf_size < VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES)
00970         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00971 
00972     pdata->result__actual_effective_rtn_spads =
00973         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00974 
00975     pdata->ref_spad_array__num_requested_ref_spads =
00976         *(pbuffer+2);
00977 
00978     pdata->ref_spad_array__ref_location =
00979         *(pbuffer+3);
00980 
00981     pdata->result__peak_signal_count_rate_rtn_mcps =
00982         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
00983 
00984     pdata->result__ambient_count_rate_rtn_mcps =
00985         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 6);
00986 
00987     pdata->result__peak_signal_count_rate_ref_mcps =
00988         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 8);
00989 
00990     pdata->result__ambient_count_rate_ref_mcps =
00991         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 10);
00992 
00993     pdata->measured_distance_mm =
00994         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 12);
00995 
00996     pdata->measured_distance_stdev_mm =
00997         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 14);
00998 
00999     return status;
01000 }
01001 
01002 
01003 VL53L1_Error VL53L1_nvm_decode_fmt_info(
01004     uint16_t                       buf_size,
01005     uint8_t                       *pbuffer,
01006     VL53L1_decoded_nvm_fmt_info_t *pdata)
01007 {
01008 
01009     VL53L1_Error status   = VL53L1_ERROR_NONE;
01010 
01011     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
01012         return VL53L1_ERROR_BUFFER_TOO_SMALL;
01013 
01014     pdata->nvm__fmt__fgc[0] =
01015         (char)VL53L1_i2c_decode_with_mask(
01016             1,
01017             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_0,
01018             0x000000FE,
01019             1,
01020             0);
01021     pdata->nvm__fmt__fgc[1] =
01022         (char)VL53L1_i2c_decode_with_mask(
01023             1,
01024             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_1,
01025             0x000001FC,
01026             2,
01027             0);
01028     pdata->nvm__fmt__fgc[2] =
01029         (char)VL53L1_i2c_decode_with_mask(
01030             1,
01031             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_2 - 1,
01032             0x000003F8,
01033             3,
01034             0);
01035     pdata->nvm__fmt__fgc[3] =
01036         (char)VL53L1_i2c_decode_with_mask(
01037             1,
01038             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_3 - 1,
01039             0x000007F0,
01040             4,
01041             0);
01042     pdata->nvm__fmt__fgc[4] =
01043         (char)VL53L1_i2c_decode_with_mask(
01044             1,
01045             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_4 - 1,
01046             0x00000FE0,
01047             5,
01048             0);
01049     pdata->nvm__fmt__fgc[5] =
01050         (char)VL53L1_i2c_decode_with_mask(
01051             1,
01052             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_5 - 1,
01053             0x00001FC0,
01054             6,
01055             0);
01056     pdata->nvm__fmt__fgc[6] =
01057         (char)VL53L1_i2c_decode_with_mask(
01058             1,
01059             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_6 - 1,
01060             0x00003F80,
01061             7,
01062             0);
01063     pdata->nvm__fmt__fgc[7] =
01064         (char)VL53L1_i2c_decode_with_mask(
01065             1,
01066             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_6,
01067             0x0000007F,
01068             0,
01069             0);
01070     pdata->nvm__fmt__fgc[8] =
01071         (char)VL53L1_i2c_decode_with_mask(
01072             1,
01073             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_7,
01074             0x000000FE,
01075             1,
01076             0);
01077     pdata->nvm__fmt__fgc[9] =
01078         (char)VL53L1_i2c_decode_with_mask(
01079             1,
01080             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_8,
01081             0x000001FC,
01082             2,
01083             0);
01084     pdata->nvm__fmt__fgc[10] =
01085         (char)VL53L1_i2c_decode_with_mask(
01086             1,
01087             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_9 - 1,
01088             0x000003F8,
01089             3,
01090             0);
01091     pdata->nvm__fmt__fgc[11] =
01092         (char)VL53L1_i2c_decode_with_mask(
01093             1,
01094             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_10 - 1,
01095             0x000007F0,
01096             4,
01097             0);
01098     pdata->nvm__fmt__fgc[12] =
01099         (char)VL53L1_i2c_decode_with_mask(
01100             1,
01101             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_11 - 1,
01102             0x00000FE0,
01103             5,
01104             0);
01105     pdata->nvm__fmt__fgc[13] =
01106         (char)VL53L1_i2c_decode_with_mask(
01107             1,
01108             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_12 - 1,
01109             0x00001FC0,
01110             6,
01111             0);
01112     pdata->nvm__fmt__fgc[14] =
01113         (char)VL53L1_i2c_decode_with_mask(
01114             1,
01115             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_13 - 1,
01116             0x00003F80,
01117             7,
01118             0);
01119     pdata->nvm__fmt__fgc[15] =
01120         (char)VL53L1_i2c_decode_with_mask(
01121             1,
01122             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_13,
01123             0x0000007F,
01124             0,
01125             0);
01126     pdata->nvm__fmt__fgc[16] =
01127         (char)VL53L1_i2c_decode_with_mask(
01128             1,
01129             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_14,
01130             0x000000FE,
01131             1,
01132             0);
01133     pdata->nvm__fmt__fgc[17] =
01134         (char)VL53L1_i2c_decode_with_mask(
01135             1,
01136             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_15,
01137             0x000001FC,
01138             2,
01139             0);
01140     pdata->nvm__fmt__fgc[18] = 0x00;
01141 
01142             pdata->nvm__fmt__test_program_major =
01143         (uint8_t)VL53L1_i2c_decode_with_mask(
01144             1,
01145             pbuffer + VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
01146             0x000000E0,
01147             5,
01148             0);
01149     pdata->nvm__fmt__test_program_minor =
01150         (uint8_t)VL53L1_i2c_decode_with_mask(
01151             1,
01152             pbuffer + VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
01153             0x0000001F,
01154             0,
01155             0);
01156     pdata->nvm__fmt__map_major =
01157         (uint8_t)VL53L1_i2c_decode_with_mask(
01158             1,
01159             pbuffer + VL53L1_NVM__FMT__MAP_MAJOR_MINOR,
01160             0x000000E0,
01161             5,
01162             0);
01163     pdata->nvm__fmt__map_minor =
01164         (uint8_t)VL53L1_i2c_decode_with_mask(
01165             1,
01166             pbuffer + VL53L1_NVM__FMT__MAP_MAJOR_MINOR,
01167             0x0000001F,
01168             0,
01169             0);
01170     pdata->nvm__fmt__year =
01171         (uint8_t)VL53L1_i2c_decode_with_mask(
01172             1,
01173             pbuffer + VL53L1_NVM__FMT__YEAR_MONTH,
01174             0x000000F0,
01175             4,
01176             0);
01177     pdata->nvm__fmt__month =
01178         (uint8_t)VL53L1_i2c_decode_with_mask(
01179             1,
01180             pbuffer + VL53L1_NVM__FMT__YEAR_MONTH,
01181             0x0000000F,
01182             0,
01183             0);
01184     pdata->nvm__fmt__day =
01185         (uint8_t)VL53L1_i2c_decode_with_mask(
01186             1,
01187             pbuffer + VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE,
01188             0x000000F8,
01189             3,
01190             0);
01191     pdata->nvm__fmt__module_date_phase =
01192         (uint8_t)VL53L1_i2c_decode_with_mask(
01193             1,
01194             pbuffer + VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE,
01195             0x00000007,
01196             0,
01197             0);
01198     pdata->nvm__fmt__time =
01199         (uint16_t)VL53L1_i2c_decode_with_mask(
01200             2,
01201             pbuffer + VL53L1_NVM__FMT__TIME,
01202             0x0000FFFF,
01203             0,
01204             0);
01205     pdata->nvm__fmt__tester_id =
01206         (uint8_t)VL53L1_i2c_decode_with_mask(
01207             1,
01208             pbuffer + VL53L1_NVM__FMT__TESTER_ID,
01209             0x000000FF,
01210             0,
01211             0);
01212     pdata->nvm__fmt__site_id =
01213         (uint8_t)VL53L1_i2c_decode_with_mask(
01214             1,
01215             pbuffer + VL53L1_NVM__FMT__SITE_ID,
01216             0x000000FF,
01217             0,
01218             0);
01219 
01220     return status;
01221 }
01222 
01223 
01224 VL53L1_Error VL53L1_nvm_decode_ews_info(
01225     uint16_t                       buf_size,
01226     uint8_t                       *pbuffer,
01227     VL53L1_decoded_nvm_ews_info_t *pdata)
01228 {
01229 
01230     VL53L1_Error status   = VL53L1_ERROR_NONE;
01231 
01232     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
01233         return VL53L1_ERROR_BUFFER_TOO_SMALL;
01234 
01235     pdata->nvm__ews__test_program_major =
01236         (uint8_t)VL53L1_i2c_decode_with_mask(
01237             1,
01238             pbuffer + VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
01239             0x000000E0,
01240             5,
01241             0);
01242     pdata->nvm__ews__test_program_minor =
01243         (uint8_t)VL53L1_i2c_decode_with_mask(
01244             1,
01245             pbuffer + VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
01246             0x0000001F,
01247             0,
01248             0);
01249     pdata->nvm__ews__probe_card_major =
01250         (uint8_t)VL53L1_i2c_decode_with_mask(
01251             1,
01252             pbuffer + VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
01253             0x000000F0,
01254             4,
01255             0);
01256     pdata->nvm__ews__probe_card_minor =
01257         (uint8_t)VL53L1_i2c_decode_with_mask(
01258             1,
01259             pbuffer + VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
01260             0x0000000F,
01261             0,
01262             0);
01263     pdata->nvm__ews__tester_id =
01264         (uint8_t)VL53L1_i2c_decode_with_mask(
01265             1,
01266             pbuffer + VL53L1_NVM__EWS__TESTER_ID,
01267             0x000000FF,
01268             0,
01269             0);
01270     pdata->nvm__ews__lot[0] =
01271         (char)VL53L1_i2c_decode_with_mask(
01272             1,
01273             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_0,
01274             0x000000FC,
01275             2,
01276             32);
01277     pdata->nvm__ews__lot[1] =
01278         (char)VL53L1_i2c_decode_with_mask(
01279             2,
01280             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_1 - 1,
01281             0x000003F0,
01282             4,
01283             32);
01284     pdata->nvm__ews__lot[2] =
01285         (char)VL53L1_i2c_decode_with_mask(
01286             2,
01287             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_2 - 1,
01288             0x00000FC0,
01289             6,
01290             32);
01291     pdata->nvm__ews__lot[3] =
01292         (char)VL53L1_i2c_decode_with_mask(
01293             1,
01294             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_2,
01295             0x0000003F,
01296             0,
01297             32);
01298     pdata->nvm__ews__lot[4] =
01299         (char)VL53L1_i2c_decode_with_mask(
01300             1,
01301             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_3,
01302             0x000000FC,
01303             2,
01304             32);
01305     pdata->nvm__ews__lot[5] =
01306         (char)VL53L1_i2c_decode_with_mask(
01307             2,
01308             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_4 - 1,
01309             0x000003F0,
01310             4,
01311             32);
01312     pdata->nvm__ews__lot[6] =
01313         (char)VL53L1_i2c_decode_with_mask(
01314             2,
01315             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_5 - 1,
01316             0x00000FC0,
01317             6,
01318             32);
01319 
01320     pdata->nvm__ews__lot[7] = 0x00;
01321 
01322     pdata->nvm__ews__wafer =
01323         (uint8_t)VL53L1_i2c_decode_with_mask(
01324             1,
01325             pbuffer + VL53L1_NVM__EWS__WAFER,
01326             0x0000001F,
01327             0,
01328             0);
01329     pdata->nvm__ews__xcoord =
01330         (uint8_t)VL53L1_i2c_decode_with_mask(
01331             1,
01332             pbuffer + VL53L1_NVM__EWS__XCOORD,
01333             0x000000FF,
01334             0,
01335             0);
01336     pdata->nvm__ews__ycoord =
01337         (uint8_t)VL53L1_i2c_decode_with_mask(
01338             1,
01339             pbuffer + VL53L1_NVM__EWS__YCOORD,
01340             0x000000FF,
01341             0,
01342             0);
01343 
01344     return status;
01345 
01346 }
01347 
01348 
01349 void VL53L1_nvm_format_encode(
01350     VL53L1_decoded_nvm_data_t *pnvm_info,
01351     uint8_t                   *pnvm_data)
01352 {
01353     SUPPRESS_UNUSED_WARNING(pnvm_info);
01354     SUPPRESS_UNUSED_WARNING(pnvm_data);
01355 }
01356 
01357 
01358 VL53L1_Error VL53L1_read_nvm_raw_data(
01359     VL53L1_DEV     Dev,
01360     uint8_t        start_address,
01361     uint8_t        count,
01362     uint8_t       *pnvm_raw_data)
01363 {
01364 
01365 
01366 
01367     VL53L1_Error status = VL53L1_ERROR_NONE;
01368 
01369     LOG_FUNCTION_START("");
01370 
01371 
01372 
01373     if (status == VL53L1_ERROR_NONE)
01374         status = VL53L1_nvm_enable(
01375                     Dev,
01376                     0x0004,
01377                     VL53L1_NVM_POWER_UP_DELAY_US);
01378 
01379 
01380 
01381     if (status == VL53L1_ERROR_NONE)
01382         status = VL53L1_nvm_read(
01383             Dev,
01384             start_address,
01385             count,
01386             pnvm_raw_data);
01387 
01388 
01389 
01390     if (status == VL53L1_ERROR_NONE)
01391         status = VL53L1_nvm_disable(Dev);
01392 
01393     LOG_FUNCTION_END(status);
01394 
01395     return status;
01396 
01397 }
01398 
01399 
01400 VL53L1_Error VL53L1_read_nvm(
01401     VL53L1_DEV                 Dev,
01402     uint8_t                    nvm_format,
01403     VL53L1_decoded_nvm_data_t *pnvm_info)
01404 {
01405 
01406 
01407 
01408     VL53L1_Error status = VL53L1_ERROR_NONE;
01409 
01410     uint8_t nvm_data[VL53L1_NVM_SIZE_IN_BYTES];
01411 
01412     LOG_FUNCTION_START("");
01413 
01414     SUPPRESS_UNUSED_WARNING(nvm_format);
01415 
01416 
01417 
01418     status = VL53L1_read_nvm_raw_data(
01419                 Dev,
01420                 0,
01421                 VL53L1_NVM_SIZE_IN_BYTES >> 2,
01422                 nvm_data);
01423 
01424 
01425 
01426 
01427 
01428     if (status == VL53L1_ERROR_NONE)
01429         status = VL53L1_nvm_format_decode(
01430             VL53L1_NVM_SIZE_IN_BYTES,
01431             nvm_data,
01432             pnvm_info);
01433 
01434     LOG_FUNCTION_END(status);
01435 
01436     return status;
01437 
01438 }
01439 
01440 
01441 VL53L1_Error VL53L1_read_nvm_optical_centre(
01442     VL53L1_DEV                        Dev,
01443     VL53L1_optical_centre_t          *pcentre)
01444 {
01445 
01446 
01447     VL53L1_Error status = VL53L1_ERROR_NONE;
01448 
01449     uint8_t nvm_data[VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE];
01450 
01451     LOG_FUNCTION_START("");
01452 
01453 
01454 
01455     status =
01456         VL53L1_read_nvm_raw_data(
01457             Dev,
01458             (uint8_t)(VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX
01459                     >> 2),
01460             (uint8_t)(VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE
01461                     >> 2),
01462             nvm_data);
01463 
01464 
01465 
01466     if (status == VL53L1_ERROR_NONE)
01467         status =
01468             VL53L1_nvm_decode_optical_centre(
01469                 VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE,
01470                 nvm_data,
01471                 pcentre);
01472 
01473     LOG_FUNCTION_END(status);
01474 
01475     return status;
01476 }
01477 
01478 
01479 VL53L1_Error VL53L1_read_nvm_cal_peak_rate_map(
01480     VL53L1_DEV                           Dev,
01481     VL53L1_cal_peak_rate_map_t          *pcal_data)
01482 {
01483 
01484 
01485     VL53L1_Error status = VL53L1_ERROR_NONE;
01486 
01487     uint8_t nvm_data[VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE];
01488 
01489     LOG_FUNCTION_START("");
01490 
01491 
01492 
01493     status =
01494         VL53L1_read_nvm_raw_data(
01495             Dev,
01496             (uint8_t)(VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX
01497                     >> 2),
01498             (uint8_t)(VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE
01499                     >> 2),
01500             nvm_data);
01501 
01502 
01503 
01504     if (status == VL53L1_ERROR_NONE)
01505         status =
01506             VL53L1_nvm_decode_cal_peak_rate_map(
01507                 VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE,
01508                 nvm_data,
01509                 pcal_data);
01510 
01511     LOG_FUNCTION_END(status);
01512 
01513     return status;
01514 }
01515 
01516 
01517 VL53L1_Error VL53L1_read_nvm_additional_offset_cal_data(
01518     VL53L1_DEV                           Dev,
01519     VL53L1_additional_offset_cal_data_t *pcal_data)
01520 {
01521 
01522 
01523 
01524     VL53L1_Error status = VL53L1_ERROR_NONE;
01525 
01526     uint8_t nvm_data[VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE];
01527 
01528     LOG_FUNCTION_START("");
01529 
01530 
01531 
01532     status =
01533         VL53L1_read_nvm_raw_data(
01534             Dev,
01535             (uint8_t)(
01536             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX >> 2),
01537             (uint8_t)(
01538             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE >> 2),
01539             nvm_data);
01540 
01541 
01542 
01543     if (status == VL53L1_ERROR_NONE)
01544         status = VL53L1_nvm_decode_additional_offset_cal_data(
01545             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE,
01546             nvm_data,
01547             pcal_data);
01548 
01549     LOG_FUNCTION_END(status);
01550 
01551     return status;
01552 
01553 }
01554 
01555 
01556 VL53L1_Error VL53L1_read_nvm_fmt_range_results_data(
01557     VL53L1_DEV                           Dev,
01558     uint16_t                             range_results_select,
01559     VL53L1_decoded_nvm_fmt_range_data_t *prange_data)
01560 {
01561 
01562 
01563 
01564     VL53L1_Error status = VL53L1_ERROR_NONE;
01565 
01566     uint8_t nvm_data[VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES];
01567 
01568     LOG_FUNCTION_START("");
01569 
01570 
01571 
01572     status = VL53L1_read_nvm_raw_data(
01573         Dev,
01574         (uint8_t)(range_results_select >> 2),
01575         (uint8_t)(VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES >> 2),
01576         nvm_data);
01577 
01578 
01579 
01580     if (status == VL53L1_ERROR_NONE)
01581         status =
01582             VL53L1_nvm_decode_fmt_range_results_data(
01583                 VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES,
01584                 nvm_data,
01585                 prange_data);
01586 
01587     LOG_FUNCTION_END(status);
01588 
01589     return status;
01590 
01591 }
01592 
01593 
01594