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Fork of MODSERIAL by
Device/MODSERIAL_LPC1768.cpp@43:8c8d13e1840b, 2017-04-26 (annotated)
- Committer:
- cduck
- Date:
- Wed Apr 26 06:50:40 2017 +0000
- Revision:
- 43:8c8d13e1840b
- Parent:
- 33:a65f89de75c5
Update device definitions to be compatible with current versions of mbed; ; Replaces _serial.index with _serial.serial.index if DEVICE_SERIAL_ASYNCH is #defined.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 27:9c93ce7cb9d8 | 1 | #ifdef TARGET_LPC1768 |
| Sissors | 27:9c93ce7cb9d8 | 2 | #include "MODSERIAL.h" |
| Sissors | 27:9c93ce7cb9d8 | 3 | |
| Sissors | 27:9c93ce7cb9d8 | 4 | |
| Sissors | 27:9c93ce7cb9d8 | 5 | void MODSERIAL::setBase(void ) { |
| cduck | 43:8c8d13e1840b | 6 | #if DEVICE_SERIAL_ASYNCH |
| cduck | 43:8c8d13e1840b | 7 | switch( _serial.serial.index ) { |
| cduck | 43:8c8d13e1840b | 8 | #else |
| Sissors | 27:9c93ce7cb9d8 | 9 | switch( _serial.index ) { |
| cduck | 43:8c8d13e1840b | 10 | #endif |
| Sissors | 27:9c93ce7cb9d8 | 11 | case 0: _base = LPC_UART0; _IRQ = UART0_IRQn; break; |
| Sissors | 27:9c93ce7cb9d8 | 12 | case 1: _base = LPC_UART1; _IRQ = UART1_IRQn; break; |
| Sissors | 27:9c93ce7cb9d8 | 13 | case 2: _base = LPC_UART2; _IRQ = UART2_IRQn; break; |
| Sissors | 27:9c93ce7cb9d8 | 14 | case 3: _base = LPC_UART3; _IRQ = UART3_IRQn; break; |
| Sissors | 27:9c93ce7cb9d8 | 15 | default: _base = NULL; _IRQ = (IRQn_Type)NULL; break; |
| Sissors | 27:9c93ce7cb9d8 | 16 | } |
| Sissors | 27:9c93ce7cb9d8 | 17 | } |
| Sissors | 27:9c93ce7cb9d8 | 18 | |
| Sissors | 28:76793a84f9e5 | 19 | void MODSERIAL::initDevice(void) { |
| Sissors | 28:76793a84f9e5 | 20 | ((LPC_UART_TypeDef*)_base)->FCR = (1UL<<0) + (1UL<<1) + (1UL<<2); |
| Sissors | 28:76793a84f9e5 | 21 | } |
| Sissors | 28:76793a84f9e5 | 22 | |
| Sissors | 27:9c93ce7cb9d8 | 23 | bool MODSERIAL::txIsBusy( void ) |
| Sissors | 27:9c93ce7cb9d8 | 24 | { |
| Sissors | 33:a65f89de75c5 | 25 | return ( (((LPC_UART_TypeDef*)_base)->LSR & ( 1UL << 6 )) == 0 ) ? true : false; |
| Sissors | 27:9c93ce7cb9d8 | 26 | } |
| Sissors | 27:9c93ce7cb9d8 | 27 | |
| Sissors | 27:9c93ce7cb9d8 | 28 | #endif |
