hctl 2032 encoder for stm32

Dependencies:   FastIO

Committer:
c128
Date:
Fri Sep 05 13:31:34 2014 +0000
Revision:
4:d99e7d8ed0be
Parent:
3:b83ec916ba01

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
c128 0:b1faec368b5d 1
c128 0:b1faec368b5d 2
c128 0:b1faec368b5d 3 #include "EncoderCounter.h"
c128 0:b1faec368b5d 4
c128 0:b1faec368b5d 5 #include "FastIO.h"
c128 0:b1faec368b5d 6
c128 0:b1faec368b5d 7
c128 0:b1faec368b5d 8 FastOut<PA_0> HCTL_PIN_XY;
c128 0:b1faec368b5d 9 FastOut<PA_1> HCTL_PIN_OE; // Active LOW
c128 0:b1faec368b5d 10 FastOut<PA_4> HCTL_PIN_EN1;
c128 0:b1faec368b5d 11 FastOut<PB_3> HCTL_PIN_EN2;
c128 0:b1faec368b5d 12 FastOut<PC_10> HCTL_PIN_SEL1;
c128 0:b1faec368b5d 13 FastOut<PC_11> HCTL_PIN_SEL2;
c128 0:b1faec368b5d 14 FastOut<PB_6> HCTL_PIN_RSTX; // Active LOW
c128 0:b1faec368b5d 15 FastOut<PB_7> HCTL_PIN_RSTY; // Active LOW
c128 0:b1faec368b5d 16
c128 0:b1faec368b5d 17
c128 0:b1faec368b5d 18 FastIn<PC_0> bus0;
c128 0:b1faec368b5d 19 FastIn<PC_1> bus1;
c128 0:b1faec368b5d 20 FastIn<PC_2> bus2;
c128 0:b1faec368b5d 21 FastIn<PC_3> bus3;
c128 0:b1faec368b5d 22 FastIn<PC_4> bus4;
c128 4:d99e7d8ed0be 23 FastIn<PC_5> bus5;
c128 0:b1faec368b5d 24 FastIn<PC_6> bus6;
c128 0:b1faec368b5d 25 FastIn<PC_7> bus7;
c128 0:b1faec368b5d 26 //PortIn HCTL_DataBus(PortC, 0x00FF);
c128 0:b1faec368b5d 27
c128 0:b1faec368b5d 28
c128 0:b1faec368b5d 29
c128 0:b1faec368b5d 30 ENCODER::ENCODER(unsigned char countMode)
c128 0:b1faec368b5d 31
c128 0:b1faec368b5d 32 {
c128 0:b1faec368b5d 33
c128 0:b1faec368b5d 34
c128 0:b1faec368b5d 35 switchCountMode( countMode );
c128 0:b1faec368b5d 36
c128 0:b1faec368b5d 37
c128 0:b1faec368b5d 38
c128 0:b1faec368b5d 39 XAxisReset();
c128 0:b1faec368b5d 40 YAxisReset();
c128 0:b1faec368b5d 41
c128 0:b1faec368b5d 42 HCTL_PIN_RSTX = 1; // Active LOW
c128 0:b1faec368b5d 43 HCTL_PIN_RSTY = 1; // Active LOW
c128 0:b1faec368b5d 44 HCTL_PIN_OE = 1;
c128 0:b1faec368b5d 45 wait_ms(1);
c128 0:b1faec368b5d 46
c128 0:b1faec368b5d 47
c128 0:b1faec368b5d 48 }
c128 0:b1faec368b5d 49
c128 0:b1faec368b5d 50
c128 0:b1faec368b5d 51
c128 0:b1faec368b5d 52 // Communicates with a HCTL-2032 IC to get reset the X encoder count
c128 0:b1faec368b5d 53 // see Avago/Agilent/HP HCTL-2032 PDF for details
c128 0:b1faec368b5d 54 void ENCODER::XAxisReset()
c128 0:b1faec368b5d 55 {
c128 0:b1faec368b5d 56 HCTL_PIN_RSTX = 0;
c128 0:b1faec368b5d 57 wait_ms(0);
c128 0:b1faec368b5d 58 HCTL_PIN_RSTX = 1;
c128 0:b1faec368b5d 59 wait_ms(1);
c128 0:b1faec368b5d 60 }
c128 0:b1faec368b5d 61
c128 0:b1faec368b5d 62 void ENCODER::YAxisReset()
c128 0:b1faec368b5d 63 {
c128 0:b1faec368b5d 64 HCTL_PIN_RSTX = 0;
c128 0:b1faec368b5d 65 wait_ms(0);
c128 0:b1faec368b5d 66 HCTL_PIN_RSTX = 1;
c128 0:b1faec368b5d 67 wait_ms(1);
c128 0:b1faec368b5d 68 }
c128 0:b1faec368b5d 69
c128 0:b1faec368b5d 70 // Communicates with a HCTL-2032 IC to get the X Axis encoder count via an 8bit parallel bus
c128 0:b1faec368b5d 71 // see Avago/Agilent/HP HCTL-2032 Datasheet PDF for details
c128 0:b1faec368b5d 72 int ENCODER::XAxisGetCount( )
c128 0:b1faec368b5d 73 {
c128 0:b1faec368b5d 74
c128 0:b1faec368b5d 75 HCTL_PIN_XY = 0; //0
c128 0:b1faec368b5d 76 HCTL_PIN_OE = 0;
c128 0:b1faec368b5d 77 wait_ms(5);
c128 0:b1faec368b5d 78
c128 0:b1faec368b5d 79
c128 0:b1faec368b5d 80 //read MSB
c128 0:b1faec368b5d 81 HCTL_PIN_SEL1 = 0; //0
c128 0:b1faec368b5d 82 HCTL_PIN_SEL2 = 1; //1
c128 0:b1faec368b5d 83 wait_ms(5);
c128 0:b1faec368b5d 84 busByteMSB = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 85 countEnc = busByteMSB;
c128 0:b1faec368b5d 86 countEnc <<= 8 ;
c128 0:b1faec368b5d 87
c128 0:b1faec368b5d 88
c128 0:b1faec368b5d 89
c128 0:b1faec368b5d 90 //read 2nd byte
c128 0:b1faec368b5d 91 HCTL_PIN_SEL1 = 1;
c128 0:b1faec368b5d 92 HCTL_PIN_SEL2 = 1;
c128 0:b1faec368b5d 93 wait_ms(5);
c128 0:b1faec368b5d 94 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 95 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 96 countEnc <<= 8 ;
c128 0:b1faec368b5d 97
c128 0:b1faec368b5d 98
c128 0:b1faec368b5d 99
c128 0:b1faec368b5d 100 //read 3rd byte
c128 0:b1faec368b5d 101 HCTL_PIN_SEL1 = 0;
c128 0:b1faec368b5d 102 HCTL_PIN_SEL2 = 0;
c128 0:b1faec368b5d 103 HCTL_PIN_OE = 0;
c128 0:b1faec368b5d 104 wait_ms(5);
c128 0:b1faec368b5d 105 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 106 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 107 countEnc <<= 8;
c128 0:b1faec368b5d 108
c128 0:b1faec368b5d 109
c128 0:b1faec368b5d 110 //read LSB
c128 0:b1faec368b5d 111 HCTL_PIN_SEL1 = 1;
c128 0:b1faec368b5d 112 HCTL_PIN_SEL2 = 0;
c128 0:b1faec368b5d 113 wait_ms(5);
c128 0:b1faec368b5d 114 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 115 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 116
c128 0:b1faec368b5d 117
c128 0:b1faec368b5d 118 HCTL_PIN_OE = 1; //1
c128 0:b1faec368b5d 119
c128 0:b1faec368b5d 120
c128 0:b1faec368b5d 121 return countEnc;
c128 0:b1faec368b5d 122 }
c128 0:b1faec368b5d 123
c128 0:b1faec368b5d 124 int ENCODER::YAxisGetCount( )
c128 0:b1faec368b5d 125 {
c128 0:b1faec368b5d 126
c128 0:b1faec368b5d 127 HCTL_PIN_XY = 0; //0
c128 0:b1faec368b5d 128 HCTL_PIN_OE = 0;
c128 0:b1faec368b5d 129 wait_ms(5);
c128 0:b1faec368b5d 130
c128 0:b1faec368b5d 131
c128 0:b1faec368b5d 132 //read MSB
c128 0:b1faec368b5d 133 HCTL_PIN_SEL1 = 0; //0
c128 0:b1faec368b5d 134 HCTL_PIN_SEL2 = 1; //1
c128 0:b1faec368b5d 135 wait_ms(5);
c128 0:b1faec368b5d 136 busByteMSB = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 137 countEnc = busByteMSB;
c128 0:b1faec368b5d 138 countEnc <<= 8 ;
c128 0:b1faec368b5d 139
c128 0:b1faec368b5d 140
c128 0:b1faec368b5d 141
c128 0:b1faec368b5d 142 //read 2nd byte
c128 0:b1faec368b5d 143 HCTL_PIN_SEL1 = 1;
c128 0:b1faec368b5d 144 HCTL_PIN_SEL2 = 1;
c128 0:b1faec368b5d 145 wait_ms(5);
c128 0:b1faec368b5d 146 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 147 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 148 countEnc <<= 8 ;
c128 0:b1faec368b5d 149
c128 0:b1faec368b5d 150
c128 0:b1faec368b5d 151
c128 0:b1faec368b5d 152 //read 3rd byte
c128 0:b1faec368b5d 153 HCTL_PIN_SEL1 = 0;
c128 0:b1faec368b5d 154 HCTL_PIN_SEL2 = 0;
c128 0:b1faec368b5d 155 HCTL_PIN_OE = 0;
c128 0:b1faec368b5d 156 wait_ms(5);
c128 0:b1faec368b5d 157 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 158 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 159 countEnc <<= 8;
c128 0:b1faec368b5d 160
c128 0:b1faec368b5d 161
c128 0:b1faec368b5d 162 //read LSB
c128 0:b1faec368b5d 163 HCTL_PIN_SEL1 = 1;
c128 0:b1faec368b5d 164 HCTL_PIN_SEL2 = 0;
c128 0:b1faec368b5d 165 wait_ms(5);
c128 0:b1faec368b5d 166 busByte = (bus0 | (bus1 << 1) | (bus2 << 2) | (bus3 << 3) | (bus4 << 4) | (bus5 << 5) | (bus6 << 6) | (bus7 << 7) );
c128 0:b1faec368b5d 167 countEnc = busByte + countEnc;
c128 0:b1faec368b5d 168
c128 0:b1faec368b5d 169
c128 0:b1faec368b5d 170 HCTL_PIN_OE = 1; //1
c128 0:b1faec368b5d 171
c128 0:b1faec368b5d 172
c128 0:b1faec368b5d 173 return countEnc;
c128 0:b1faec368b5d 174 }
c128 0:b1faec368b5d 175
c128 0:b1faec368b5d 176 void ENCODER::switchCountMode( unsigned char countMode )
c128 0:b1faec368b5d 177 {
c128 0:b1faec368b5d 178 // Count Mode Illegal Mode EN1 LOW EN2 LOW
c128 0:b1faec368b5d 179 // Count Mode 4X EN1 HIGH EN2 LOW
c128 0:b1faec368b5d 180 // Count Mode 2X EN1 LOW EN2 HIGH
c128 0:b1faec368b5d 181 // Count Mode 1X EN1 HIGH EN2 HIGH
c128 0:b1faec368b5d 182 switch(countMode)
c128 0:b1faec368b5d 183 {
c128 0:b1faec368b5d 184 case 1: // 1X Count Mode
c128 0:b1faec368b5d 185 HCTL_PIN_EN1 = 1;
c128 0:b1faec368b5d 186 HCTL_PIN_EN2 = 1;
c128 0:b1faec368b5d 187 break;
c128 0:b1faec368b5d 188 case 2: // 2X Count Mode
c128 0:b1faec368b5d 189 HCTL_PIN_EN1 = 0;
c128 0:b1faec368b5d 190 HCTL_PIN_EN2 = 1;
c128 0:b1faec368b5d 191 break;
c128 0:b1faec368b5d 192 case 4: // 4X Count Mode is the default
c128 0:b1faec368b5d 193 HCTL_PIN_EN1 = 1;
c128 0:b1faec368b5d 194 HCTL_PIN_EN2 = 0;
c128 0:b1faec368b5d 195 break;
c128 0:b1faec368b5d 196 default:
c128 0:b1faec368b5d 197 HCTL_PIN_EN1 = 1;
c128 0:b1faec368b5d 198 HCTL_PIN_EN2 = 0;
c128 0:b1faec368b5d 199 break;
c128 0:b1faec368b5d 200
c128 0:b1faec368b5d 201
c128 0:b1faec368b5d 202 }
c128 0:b1faec368b5d 203 wait_ms(1);
c128 0:b1faec368b5d 204 }
c128 0:b1faec368b5d 205
c128 0:b1faec368b5d 206