Bayley Wang
/
eeprom_emulation_446
flash writing code for 446re
FlashWriter/stm32f4xx_flash.h@2:11238235cb62, 2017-02-28 (annotated)
- Committer:
- bwang
- Date:
- Tue Feb 28 21:27:10 2017 +0000
- Revision:
- 2:11238235cb62
- Parent:
- stm32f4xx_flash.h@0:2dfd987fe78d
changed FlashWriter class to have open() function
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bwang | 0:2dfd987fe78d | 1 | /** |
bwang | 0:2dfd987fe78d | 2 | ****************************************************************************** |
bwang | 0:2dfd987fe78d | 3 | * @file stm32f4xx_flash.h |
bwang | 0:2dfd987fe78d | 4 | * @author MCD Application Team |
bwang | 0:2dfd987fe78d | 5 | * @version V1.7.1 |
bwang | 0:2dfd987fe78d | 6 | * @date 20-May-2016 |
bwang | 0:2dfd987fe78d | 7 | * @brief This file contains all the functions prototypes for the FLASH |
bwang | 0:2dfd987fe78d | 8 | * firmware library. |
bwang | 0:2dfd987fe78d | 9 | ****************************************************************************** |
bwang | 0:2dfd987fe78d | 10 | * @attention |
bwang | 0:2dfd987fe78d | 11 | * |
bwang | 0:2dfd987fe78d | 12 | * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> |
bwang | 0:2dfd987fe78d | 13 | * |
bwang | 0:2dfd987fe78d | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
bwang | 0:2dfd987fe78d | 15 | * You may not use this file except in compliance with the License. |
bwang | 0:2dfd987fe78d | 16 | * You may obtain a copy of the License at: |
bwang | 0:2dfd987fe78d | 17 | * |
bwang | 0:2dfd987fe78d | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
bwang | 0:2dfd987fe78d | 19 | * |
bwang | 0:2dfd987fe78d | 20 | * Unless required by applicable law or agreed to in writing, software |
bwang | 0:2dfd987fe78d | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
bwang | 0:2dfd987fe78d | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bwang | 0:2dfd987fe78d | 23 | * See the License for the specific language governing permissions and |
bwang | 0:2dfd987fe78d | 24 | * limitations under the License. |
bwang | 0:2dfd987fe78d | 25 | * |
bwang | 0:2dfd987fe78d | 26 | ****************************************************************************** |
bwang | 0:2dfd987fe78d | 27 | */ |
bwang | 0:2dfd987fe78d | 28 | |
bwang | 0:2dfd987fe78d | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bwang | 0:2dfd987fe78d | 30 | #ifndef __STM32F4xx_FLASH_H |
bwang | 0:2dfd987fe78d | 31 | #define __STM32F4xx_FLASH_H |
bwang | 0:2dfd987fe78d | 32 | |
bwang | 0:2dfd987fe78d | 33 | #ifdef __cplusplus |
bwang | 0:2dfd987fe78d | 34 | extern "C" { |
bwang | 0:2dfd987fe78d | 35 | #endif |
bwang | 0:2dfd987fe78d | 36 | |
bwang | 0:2dfd987fe78d | 37 | /* Includes ------------------------------------------------------------------*/ |
bwang | 0:2dfd987fe78d | 38 | #include "stm32f4xx.h" |
bwang | 0:2dfd987fe78d | 39 | |
bwang | 0:2dfd987fe78d | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
bwang | 0:2dfd987fe78d | 41 | * @{ |
bwang | 0:2dfd987fe78d | 42 | */ |
bwang | 0:2dfd987fe78d | 43 | |
bwang | 0:2dfd987fe78d | 44 | /** @addtogroup FLASH |
bwang | 0:2dfd987fe78d | 45 | * @{ |
bwang | 0:2dfd987fe78d | 46 | */ |
bwang | 0:2dfd987fe78d | 47 | |
bwang | 0:2dfd987fe78d | 48 | /* Exported types ------------------------------------------------------------*/ |
bwang | 0:2dfd987fe78d | 49 | /** |
bwang | 0:2dfd987fe78d | 50 | * @brief FLASH Status |
bwang | 0:2dfd987fe78d | 51 | */ |
bwang | 0:2dfd987fe78d | 52 | typedef enum |
bwang | 0:2dfd987fe78d | 53 | { |
bwang | 0:2dfd987fe78d | 54 | FLASH_BUSY2 = 1, |
bwang | 0:2dfd987fe78d | 55 | FLASH_ERROR_RD2, |
bwang | 0:2dfd987fe78d | 56 | FLASH_ERROR_PGS2, |
bwang | 0:2dfd987fe78d | 57 | FLASH_ERROR_PGP2, |
bwang | 0:2dfd987fe78d | 58 | FLASH_ERROR_PGA2, |
bwang | 0:2dfd987fe78d | 59 | FLASH_ERROR_WRP2, |
bwang | 0:2dfd987fe78d | 60 | FLASH_ERROR_PROGRAM2, |
bwang | 0:2dfd987fe78d | 61 | FLASH_ERROR_OPERATION2, |
bwang | 0:2dfd987fe78d | 62 | FLASH_COMPLETE2 |
bwang | 0:2dfd987fe78d | 63 | }FLASH_Status; |
bwang | 0:2dfd987fe78d | 64 | |
bwang | 0:2dfd987fe78d | 65 | /* Exported constants --------------------------------------------------------*/ |
bwang | 0:2dfd987fe78d | 66 | |
bwang | 0:2dfd987fe78d | 67 | /** @defgroup FLASH_Exported_Constants |
bwang | 0:2dfd987fe78d | 68 | * @{ |
bwang | 0:2dfd987fe78d | 69 | */ |
bwang | 0:2dfd987fe78d | 70 | |
bwang | 0:2dfd987fe78d | 71 | /** @defgroup Flash_Latency |
bwang | 0:2dfd987fe78d | 72 | * @{ |
bwang | 0:2dfd987fe78d | 73 | */ |
bwang | 0:2dfd987fe78d | 74 | #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */ |
bwang | 0:2dfd987fe78d | 75 | #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */ |
bwang | 0:2dfd987fe78d | 76 | #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */ |
bwang | 0:2dfd987fe78d | 77 | #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */ |
bwang | 0:2dfd987fe78d | 78 | #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */ |
bwang | 0:2dfd987fe78d | 79 | #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */ |
bwang | 0:2dfd987fe78d | 80 | #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */ |
bwang | 0:2dfd987fe78d | 81 | #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */ |
bwang | 0:2dfd987fe78d | 82 | #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */ |
bwang | 0:2dfd987fe78d | 83 | #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */ |
bwang | 0:2dfd987fe78d | 84 | #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */ |
bwang | 0:2dfd987fe78d | 85 | #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */ |
bwang | 0:2dfd987fe78d | 86 | #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */ |
bwang | 0:2dfd987fe78d | 87 | #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */ |
bwang | 0:2dfd987fe78d | 88 | #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */ |
bwang | 0:2dfd987fe78d | 89 | #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */ |
bwang | 0:2dfd987fe78d | 90 | |
bwang | 0:2dfd987fe78d | 91 | /** |
bwang | 0:2dfd987fe78d | 92 | * @} |
bwang | 0:2dfd987fe78d | 93 | */ |
bwang | 0:2dfd987fe78d | 94 | |
bwang | 0:2dfd987fe78d | 95 | /** @defgroup FLASH_Voltage_Range |
bwang | 0:2dfd987fe78d | 96 | * @{ |
bwang | 0:2dfd987fe78d | 97 | */ |
bwang | 0:2dfd987fe78d | 98 | #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ |
bwang | 0:2dfd987fe78d | 99 | #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */ |
bwang | 0:2dfd987fe78d | 100 | #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */ |
bwang | 0:2dfd987fe78d | 101 | #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */ |
bwang | 0:2dfd987fe78d | 102 | |
bwang | 0:2dfd987fe78d | 103 | /* |
bwang | 0:2dfd987fe78d | 104 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \ |
bwang | 0:2dfd987fe78d | 105 | ((RANGE) == VoltageRange_2) || \ |
bwang | 0:2dfd987fe78d | 106 | ((RANGE) == VoltageRange_3) || \ |
bwang | 0:2dfd987fe78d | 107 | ((RANGE) == VoltageRange_4)) |
bwang | 0:2dfd987fe78d | 108 | */ |
bwang | 0:2dfd987fe78d | 109 | |
bwang | 0:2dfd987fe78d | 110 | /** |
bwang | 0:2dfd987fe78d | 111 | * @} |
bwang | 0:2dfd987fe78d | 112 | */ |
bwang | 0:2dfd987fe78d | 113 | |
bwang | 0:2dfd987fe78d | 114 | /** @defgroup FLASH_Sectors |
bwang | 0:2dfd987fe78d | 115 | * @{ |
bwang | 0:2dfd987fe78d | 116 | */ |
bwang | 0:2dfd987fe78d | 117 | #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */ |
bwang | 0:2dfd987fe78d | 118 | #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */ |
bwang | 0:2dfd987fe78d | 119 | #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */ |
bwang | 0:2dfd987fe78d | 120 | #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */ |
bwang | 0:2dfd987fe78d | 121 | #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */ |
bwang | 0:2dfd987fe78d | 122 | #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */ |
bwang | 0:2dfd987fe78d | 123 | #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */ |
bwang | 0:2dfd987fe78d | 124 | #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */ |
bwang | 0:2dfd987fe78d | 125 | #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */ |
bwang | 0:2dfd987fe78d | 126 | #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */ |
bwang | 0:2dfd987fe78d | 127 | #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */ |
bwang | 0:2dfd987fe78d | 128 | #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */ |
bwang | 0:2dfd987fe78d | 129 | #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */ |
bwang | 0:2dfd987fe78d | 130 | #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */ |
bwang | 0:2dfd987fe78d | 131 | #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */ |
bwang | 0:2dfd987fe78d | 132 | #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */ |
bwang | 0:2dfd987fe78d | 133 | #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */ |
bwang | 0:2dfd987fe78d | 134 | #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */ |
bwang | 0:2dfd987fe78d | 135 | #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */ |
bwang | 0:2dfd987fe78d | 136 | #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */ |
bwang | 0:2dfd987fe78d | 137 | #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */ |
bwang | 0:2dfd987fe78d | 138 | #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */ |
bwang | 0:2dfd987fe78d | 139 | #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */ |
bwang | 0:2dfd987fe78d | 140 | #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */ |
bwang | 0:2dfd987fe78d | 141 | |
bwang | 0:2dfd987fe78d | 142 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx) |
bwang | 0:2dfd987fe78d | 143 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\ |
bwang | 0:2dfd987fe78d | 144 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) |
bwang | 0:2dfd987fe78d | 145 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */ |
bwang | 0:2dfd987fe78d | 146 | |
bwang | 0:2dfd987fe78d | 147 | #if defined (STM32F40_41xxx) || defined(STM32F412xG) |
bwang | 0:2dfd987fe78d | 148 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\ |
bwang | 0:2dfd987fe78d | 149 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) |
bwang | 0:2dfd987fe78d | 150 | #endif /* STM32F40_41xxx || STM32F412xG */ |
bwang | 0:2dfd987fe78d | 151 | |
bwang | 0:2dfd987fe78d | 152 | #if defined (STM32F401xx) |
bwang | 0:2dfd987fe78d | 153 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\ |
bwang | 0:2dfd987fe78d | 154 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) |
bwang | 0:2dfd987fe78d | 155 | #endif /* STM32F401xx */ |
bwang | 0:2dfd987fe78d | 156 | |
bwang | 0:2dfd987fe78d | 157 | #if defined (STM32F411xE) || defined (STM32F446xx) |
bwang | 0:2dfd987fe78d | 158 | //#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\ |
bwang | 0:2dfd987fe78d | 159 | // (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) |
bwang | 0:2dfd987fe78d | 160 | #endif /* STM32F411xE || STM32F446xx */ |
bwang | 0:2dfd987fe78d | 161 | |
bwang | 0:2dfd987fe78d | 162 | #if defined (STM32F410xx) |
bwang | 0:2dfd987fe78d | 163 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\ |
bwang | 0:2dfd987fe78d | 164 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) |
bwang | 0:2dfd987fe78d | 165 | #endif /* STM32F410xx */ |
bwang | 0:2dfd987fe78d | 166 | |
bwang | 0:2dfd987fe78d | 167 | /** |
bwang | 0:2dfd987fe78d | 168 | * @} |
bwang | 0:2dfd987fe78d | 169 | */ |
bwang | 0:2dfd987fe78d | 170 | |
bwang | 0:2dfd987fe78d | 171 | /** @defgroup Option_Bytes_Write_Protection |
bwang | 0:2dfd987fe78d | 172 | * @{ |
bwang | 0:2dfd987fe78d | 173 | */ |
bwang | 0:2dfd987fe78d | 174 | #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
bwang | 0:2dfd987fe78d | 175 | #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
bwang | 0:2dfd987fe78d | 176 | #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
bwang | 0:2dfd987fe78d | 177 | #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
bwang | 0:2dfd987fe78d | 178 | #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
bwang | 0:2dfd987fe78d | 179 | #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
bwang | 0:2dfd987fe78d | 180 | #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
bwang | 0:2dfd987fe78d | 181 | #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
bwang | 0:2dfd987fe78d | 182 | #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
bwang | 0:2dfd987fe78d | 183 | #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
bwang | 0:2dfd987fe78d | 184 | #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
bwang | 0:2dfd987fe78d | 185 | #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
bwang | 0:2dfd987fe78d | 186 | #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */ |
bwang | 0:2dfd987fe78d | 187 | #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */ |
bwang | 0:2dfd987fe78d | 188 | #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */ |
bwang | 0:2dfd987fe78d | 189 | #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */ |
bwang | 0:2dfd987fe78d | 190 | #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */ |
bwang | 0:2dfd987fe78d | 191 | #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */ |
bwang | 0:2dfd987fe78d | 192 | #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */ |
bwang | 0:2dfd987fe78d | 193 | #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */ |
bwang | 0:2dfd987fe78d | 194 | #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */ |
bwang | 0:2dfd987fe78d | 195 | #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */ |
bwang | 0:2dfd987fe78d | 196 | #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */ |
bwang | 0:2dfd987fe78d | 197 | #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */ |
bwang | 0:2dfd987fe78d | 198 | #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
bwang | 0:2dfd987fe78d | 199 | |
bwang | 0:2dfd987fe78d | 200 | #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
bwang | 0:2dfd987fe78d | 201 | /** |
bwang | 0:2dfd987fe78d | 202 | * @} |
bwang | 0:2dfd987fe78d | 203 | */ |
bwang | 0:2dfd987fe78d | 204 | |
bwang | 0:2dfd987fe78d | 205 | /** @defgroup Selection_Protection_Mode |
bwang | 0:2dfd987fe78d | 206 | * @{ |
bwang | 0:2dfd987fe78d | 207 | */ |
bwang | 0:2dfd987fe78d | 208 | #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ |
bwang | 0:2dfd987fe78d | 209 | #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ |
bwang | 0:2dfd987fe78d | 210 | |
bwang | 0:2dfd987fe78d | 211 | /** |
bwang | 0:2dfd987fe78d | 212 | * @} |
bwang | 0:2dfd987fe78d | 213 | */ |
bwang | 0:2dfd987fe78d | 214 | |
bwang | 0:2dfd987fe78d | 215 | /** @defgroup Option_Bytes_PC_ReadWrite_Protection |
bwang | 0:2dfd987fe78d | 216 | * @{ |
bwang | 0:2dfd987fe78d | 217 | */ |
bwang | 0:2dfd987fe78d | 218 | #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
bwang | 0:2dfd987fe78d | 219 | #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
bwang | 0:2dfd987fe78d | 220 | #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
bwang | 0:2dfd987fe78d | 221 | #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
bwang | 0:2dfd987fe78d | 222 | #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
bwang | 0:2dfd987fe78d | 223 | #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
bwang | 0:2dfd987fe78d | 224 | #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
bwang | 0:2dfd987fe78d | 225 | #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
bwang | 0:2dfd987fe78d | 226 | #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ |
bwang | 0:2dfd987fe78d | 227 | #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ |
bwang | 0:2dfd987fe78d | 228 | #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ |
bwang | 0:2dfd987fe78d | 229 | #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ |
bwang | 0:2dfd987fe78d | 230 | #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ |
bwang | 0:2dfd987fe78d | 231 | #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ |
bwang | 0:2dfd987fe78d | 232 | #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ |
bwang | 0:2dfd987fe78d | 233 | #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ |
bwang | 0:2dfd987fe78d | 234 | #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ |
bwang | 0:2dfd987fe78d | 235 | #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ |
bwang | 0:2dfd987fe78d | 236 | #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ |
bwang | 0:2dfd987fe78d | 237 | #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ |
bwang | 0:2dfd987fe78d | 238 | #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ |
bwang | 0:2dfd987fe78d | 239 | #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ |
bwang | 0:2dfd987fe78d | 240 | #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ |
bwang | 0:2dfd987fe78d | 241 | #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ |
bwang | 0:2dfd987fe78d | 242 | #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
bwang | 0:2dfd987fe78d | 243 | |
bwang | 0:2dfd987fe78d | 244 | /** |
bwang | 0:2dfd987fe78d | 245 | * @} |
bwang | 0:2dfd987fe78d | 246 | */ |
bwang | 0:2dfd987fe78d | 247 | |
bwang | 0:2dfd987fe78d | 248 | /** @defgroup FLASH_Option_Bytes_Read_Protection |
bwang | 0:2dfd987fe78d | 249 | * @{ |
bwang | 0:2dfd987fe78d | 250 | */ |
bwang | 0:2dfd987fe78d | 251 | #define OB_RDP_Level_0 ((uint8_t)0xAA) |
bwang | 0:2dfd987fe78d | 252 | #define OB_RDP_Level_1 ((uint8_t)0x55) |
bwang | 0:2dfd987fe78d | 253 | /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 |
bwang | 0:2dfd987fe78d | 254 | it's no more possible to go back to level 1 or 0 */ |
bwang | 0:2dfd987fe78d | 255 | #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ |
bwang | 0:2dfd987fe78d | 256 | ((LEVEL) == OB_RDP_Level_1))/*||\ |
bwang | 0:2dfd987fe78d | 257 | ((LEVEL) == OB_RDP_Level_2))*/ |
bwang | 0:2dfd987fe78d | 258 | /** |
bwang | 0:2dfd987fe78d | 259 | * @} |
bwang | 0:2dfd987fe78d | 260 | */ |
bwang | 0:2dfd987fe78d | 261 | |
bwang | 0:2dfd987fe78d | 262 | /** @defgroup FLASH_Option_Bytes_IWatchdog |
bwang | 0:2dfd987fe78d | 263 | * @{ |
bwang | 0:2dfd987fe78d | 264 | */ |
bwang | 0:2dfd987fe78d | 265 | |
bwang | 0:2dfd987fe78d | 266 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
bwang | 0:2dfd987fe78d | 267 | /** |
bwang | 0:2dfd987fe78d | 268 | * @} |
bwang | 0:2dfd987fe78d | 269 | */ |
bwang | 0:2dfd987fe78d | 270 | |
bwang | 0:2dfd987fe78d | 271 | /** @defgroup FLASH_Option_Bytes_nRST_STOP |
bwang | 0:2dfd987fe78d | 272 | * @{ |
bwang | 0:2dfd987fe78d | 273 | */ |
bwang | 0:2dfd987fe78d | 274 | #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ |
bwang | 0:2dfd987fe78d | 275 | |
bwang | 0:2dfd987fe78d | 276 | /** |
bwang | 0:2dfd987fe78d | 277 | * @} |
bwang | 0:2dfd987fe78d | 278 | */ |
bwang | 0:2dfd987fe78d | 279 | |
bwang | 0:2dfd987fe78d | 280 | |
bwang | 0:2dfd987fe78d | 281 | /** @defgroup FLASH_Option_Bytes_nRST_STDBY |
bwang | 0:2dfd987fe78d | 282 | * @{ |
bwang | 0:2dfd987fe78d | 283 | */ |
bwang | 0:2dfd987fe78d | 284 | #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ |
bwang | 0:2dfd987fe78d | 285 | //#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
bwang | 0:2dfd987fe78d | 286 | //#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) |
bwang | 0:2dfd987fe78d | 287 | /** |
bwang | 0:2dfd987fe78d | 288 | * @} |
bwang | 0:2dfd987fe78d | 289 | */ |
bwang | 0:2dfd987fe78d | 290 | |
bwang | 0:2dfd987fe78d | 291 | /** @defgroup FLASH_BOR_Reset_Level |
bwang | 0:2dfd987fe78d | 292 | * @{ |
bwang | 0:2dfd987fe78d | 293 | */ |
bwang | 0:2dfd987fe78d | 294 | |
bwang | 0:2dfd987fe78d | 295 | #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
bwang | 0:2dfd987fe78d | 296 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
bwang | 0:2dfd987fe78d | 297 | /** |
bwang | 0:2dfd987fe78d | 298 | * @} |
bwang | 0:2dfd987fe78d | 299 | */ |
bwang | 0:2dfd987fe78d | 300 | |
bwang | 0:2dfd987fe78d | 301 | /** @defgroup FLASH_Dual_Boot |
bwang | 0:2dfd987fe78d | 302 | * @{ |
bwang | 0:2dfd987fe78d | 303 | */ |
bwang | 0:2dfd987fe78d | 304 | #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ |
bwang | 0:2dfd987fe78d | 305 | #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ |
bwang | 0:2dfd987fe78d | 306 | #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled)) |
bwang | 0:2dfd987fe78d | 307 | /** |
bwang | 0:2dfd987fe78d | 308 | * @} |
bwang | 0:2dfd987fe78d | 309 | */ |
bwang | 0:2dfd987fe78d | 310 | |
bwang | 0:2dfd987fe78d | 311 | /** @defgroup FLASH_Interrupts |
bwang | 0:2dfd987fe78d | 312 | * @{ |
bwang | 0:2dfd987fe78d | 313 | */ |
bwang | 0:2dfd987fe78d | 314 | |
bwang | 0:2dfd987fe78d | 315 | #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000)) |
bwang | 0:2dfd987fe78d | 316 | /** |
bwang | 0:2dfd987fe78d | 317 | * @} |
bwang | 0:2dfd987fe78d | 318 | */ |
bwang | 0:2dfd987fe78d | 319 | |
bwang | 0:2dfd987fe78d | 320 | /** @defgroup FLASH_Flags |
bwang | 0:2dfd987fe78d | 321 | * @{ |
bwang | 0:2dfd987fe78d | 322 | */ |
bwang | 0:2dfd987fe78d | 323 | |
bwang | 0:2dfd987fe78d | 324 | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000)) |
bwang | 0:2dfd987fe78d | 325 | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \ |
bwang | 0:2dfd987fe78d | 326 | ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \ |
bwang | 0:2dfd987fe78d | 327 | ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \ |
bwang | 0:2dfd987fe78d | 328 | ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR)) |
bwang | 0:2dfd987fe78d | 329 | |
bwang | 0:2dfd987fe78d | 330 | /** |
bwang | 0:2dfd987fe78d | 331 | * @brief ACR register byte 0 (Bits[7:0]) base address |
bwang | 0:2dfd987fe78d | 332 | */ |
bwang | 0:2dfd987fe78d | 333 | //#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00) |
bwang | 0:2dfd987fe78d | 334 | /** |
bwang | 0:2dfd987fe78d | 335 | * @brief OPTCR register byte 0 (Bits[7:0]) base address |
bwang | 0:2dfd987fe78d | 336 | */ |
bwang | 0:2dfd987fe78d | 337 | //#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14) |
bwang | 0:2dfd987fe78d | 338 | /** |
bwang | 0:2dfd987fe78d | 339 | * @brief OPTCR register byte 1 (Bits[15:8]) base address |
bwang | 0:2dfd987fe78d | 340 | */ |
bwang | 0:2dfd987fe78d | 341 | //#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15) |
bwang | 0:2dfd987fe78d | 342 | /** |
bwang | 0:2dfd987fe78d | 343 | * @brief OPTCR register byte 2 (Bits[23:16]) base address |
bwang | 0:2dfd987fe78d | 344 | */ |
bwang | 0:2dfd987fe78d | 345 | //#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16) |
bwang | 0:2dfd987fe78d | 346 | /** |
bwang | 0:2dfd987fe78d | 347 | * @brief OPTCR register byte 3 (Bits[31:24]) base address |
bwang | 0:2dfd987fe78d | 348 | */ |
bwang | 0:2dfd987fe78d | 349 | //#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17) |
bwang | 0:2dfd987fe78d | 350 | |
bwang | 0:2dfd987fe78d | 351 | /** |
bwang | 0:2dfd987fe78d | 352 | * @brief OPTCR1 register byte 0 (Bits[7:0]) base address |
bwang | 0:2dfd987fe78d | 353 | */ |
bwang | 0:2dfd987fe78d | 354 | #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) |
bwang | 0:2dfd987fe78d | 355 | |
bwang | 0:2dfd987fe78d | 356 | /** |
bwang | 0:2dfd987fe78d | 357 | * @} |
bwang | 0:2dfd987fe78d | 358 | */ |
bwang | 0:2dfd987fe78d | 359 | |
bwang | 0:2dfd987fe78d | 360 | /* Exported macro ------------------------------------------------------------*/ |
bwang | 0:2dfd987fe78d | 361 | /* Exported functions --------------------------------------------------------*/ |
bwang | 0:2dfd987fe78d | 362 | |
bwang | 0:2dfd987fe78d | 363 | /* FLASH Interface configuration functions ************************************/ |
bwang | 0:2dfd987fe78d | 364 | void FLASH_SetLatency(uint32_t FLASH_Latency); |
bwang | 0:2dfd987fe78d | 365 | void FLASH_PrefetchBufferCmd(FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 366 | void FLASH_InstructionCacheCmd(FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 367 | void FLASH_DataCacheCmd(FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 368 | void FLASH_InstructionCacheReset(void); |
bwang | 0:2dfd987fe78d | 369 | void FLASH_DataCacheReset(void); |
bwang | 0:2dfd987fe78d | 370 | |
bwang | 0:2dfd987fe78d | 371 | /* FLASH Memory Programming functions *****************************************/ |
bwang | 0:2dfd987fe78d | 372 | void FLASH_Unlock(void); |
bwang | 0:2dfd987fe78d | 373 | void FLASH_Lock(void); |
bwang | 0:2dfd987fe78d | 374 | FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange); |
bwang | 0:2dfd987fe78d | 375 | FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange); |
bwang | 0:2dfd987fe78d | 376 | FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange); |
bwang | 0:2dfd987fe78d | 377 | FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange); |
bwang | 0:2dfd987fe78d | 378 | FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data); |
bwang | 0:2dfd987fe78d | 379 | FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); |
bwang | 0:2dfd987fe78d | 380 | FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); |
bwang | 0:2dfd987fe78d | 381 | FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data); |
bwang | 0:2dfd987fe78d | 382 | |
bwang | 0:2dfd987fe78d | 383 | /* Option Bytes Programming functions *****************************************/ |
bwang | 0:2dfd987fe78d | 384 | void FLASH_OB_Unlock(void); |
bwang | 0:2dfd987fe78d | 385 | void FLASH_OB_Lock(void); |
bwang | 0:2dfd987fe78d | 386 | void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 387 | void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 388 | void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP); |
bwang | 0:2dfd987fe78d | 389 | void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 390 | void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 391 | void FLASH_OB_RDPConfig(uint8_t OB_RDP); |
bwang | 0:2dfd987fe78d | 392 | void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); |
bwang | 0:2dfd987fe78d | 393 | void FLASH_OB_BORConfig(uint8_t OB_BOR); |
bwang | 0:2dfd987fe78d | 394 | void FLASH_OB_BootConfig(uint8_t OB_BOOT); |
bwang | 0:2dfd987fe78d | 395 | FLASH_Status FLASH_OB_Launch(void); |
bwang | 0:2dfd987fe78d | 396 | uint8_t FLASH_OB_GetUser(void); |
bwang | 0:2dfd987fe78d | 397 | uint16_t FLASH_OB_GetWRP(void); |
bwang | 0:2dfd987fe78d | 398 | uint16_t FLASH_OB_GetWRP1(void); |
bwang | 0:2dfd987fe78d | 399 | uint16_t FLASH_OB_GetPCROP(void); |
bwang | 0:2dfd987fe78d | 400 | uint16_t FLASH_OB_GetPCROP1(void); |
bwang | 0:2dfd987fe78d | 401 | FlagStatus FLASH_OB_GetRDP(void); |
bwang | 0:2dfd987fe78d | 402 | uint8_t FLASH_OB_GetBOR(void); |
bwang | 0:2dfd987fe78d | 403 | |
bwang | 0:2dfd987fe78d | 404 | /* Interrupts and flags management functions **********************************/ |
bwang | 0:2dfd987fe78d | 405 | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); |
bwang | 0:2dfd987fe78d | 406 | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); |
bwang | 0:2dfd987fe78d | 407 | void FLASH_ClearFlag(uint32_t FLASH_FLAG); |
bwang | 0:2dfd987fe78d | 408 | FLASH_Status FLASH_GetStatus(void); |
bwang | 0:2dfd987fe78d | 409 | FLASH_Status FLASH_WaitForLastOperation2(void); |
bwang | 0:2dfd987fe78d | 410 | |
bwang | 0:2dfd987fe78d | 411 | #ifdef __cplusplus |
bwang | 0:2dfd987fe78d | 412 | } |
bwang | 0:2dfd987fe78d | 413 | #endif |
bwang | 0:2dfd987fe78d | 414 | |
bwang | 0:2dfd987fe78d | 415 | #endif /* __STM32F4xx_FLASH_H */ |
bwang | 0:2dfd987fe78d | 416 | |
bwang | 0:2dfd987fe78d | 417 | /** |
bwang | 0:2dfd987fe78d | 418 | * @} |
bwang | 0:2dfd987fe78d | 419 | */ |
bwang | 0:2dfd987fe78d | 420 | |
bwang | 0:2dfd987fe78d | 421 | /** |
bwang | 0:2dfd987fe78d | 422 | * @} |
bwang | 0:2dfd987fe78d | 423 | */ |
bwang | 0:2dfd987fe78d | 424 | |
bwang | 0:2dfd987fe78d | 425 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |