Mark Bundgus
During Deep power-down mode, the contents of the SRAM and registers are not retained except for a small amount of data which can be stored in five 32-bit general purpose registers of the power management unit block. All functional pins are tri-stated in Deep power-down mode except for the WAKEUP pin.
History
During Deep power-down mode, the contents of the SRAM and registers are not retained except for a small amount of data which can be stored in five 32-bit general purpose registers of the power management unit block. All functional pins are tri-stated
2015-01-03, by bundgus [Sat, 03 Jan 2015 17:22:30 +0000] rev 0
During Deep power-down mode, the contents of the SRAM and registers are not retained except for a small amount of data which can be stored in five 32-bit general purpose registers of the power management unit block. All functional pins are tri-stated