Nicolas Borla / Mbed OS BBR_1Ebene
Committer:
borlanic
Date:
Mon May 14 11:29:06 2018 +0000
Revision:
0:fbdae7e6d805
BBR

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borlanic 0:fbdae7e6d805 1 /*
borlanic 0:fbdae7e6d805 2 *****************************************************************************
borlanic 0:fbdae7e6d805 3 * @file: adi_i2c_data.c
borlanic 0:fbdae7e6d805 4 * @brief: Data declaration for I2C Device Driver
borlanic 0:fbdae7e6d805 5 *****************************************************************************
borlanic 0:fbdae7e6d805 6
borlanic 0:fbdae7e6d805 7 Copyright (c) 2016 Analog Devices, Inc.
borlanic 0:fbdae7e6d805 8
borlanic 0:fbdae7e6d805 9 All rights reserved.
borlanic 0:fbdae7e6d805 10
borlanic 0:fbdae7e6d805 11 Redistribution and use in source and binary forms, with or without modification,
borlanic 0:fbdae7e6d805 12 are permitted provided that the following conditions are met:
borlanic 0:fbdae7e6d805 13 - Redistributions of source code must retain the above copyright notice,
borlanic 0:fbdae7e6d805 14 this list of conditions and the following disclaimer.
borlanic 0:fbdae7e6d805 15 - Redistributions in binary form must reproduce the above copyright notice,
borlanic 0:fbdae7e6d805 16 this list of conditions and the following disclaimer in the documentation
borlanic 0:fbdae7e6d805 17 and/or other materials provided with the distribution.
borlanic 0:fbdae7e6d805 18 - Modified versions of the software must be coni2ccuously marked as such.
borlanic 0:fbdae7e6d805 19 - This software is licensed solely and exclusively for use with processors
borlanic 0:fbdae7e6d805 20 manufactured by or for Analog Devices, Inc.
borlanic 0:fbdae7e6d805 21 - This software may not be combined or merged with other code in any manner
borlanic 0:fbdae7e6d805 22 that would cause the software to become subject to terms and conditions
borlanic 0:fbdae7e6d805 23 which differ from those listed here.
borlanic 0:fbdae7e6d805 24 - Neither the name of Analog Devices, Inc. nor the names of its
borlanic 0:fbdae7e6d805 25 contributors may be used to endorse or promote products derived
borlanic 0:fbdae7e6d805 26 from this software without specific prior written permission.
borlanic 0:fbdae7e6d805 27 - The use of this software may or may not infringe the patent rights of one
borlanic 0:fbdae7e6d805 28 or more patent holders. This license does not release you from the
borlanic 0:fbdae7e6d805 29 requirement that you obtain separate licenses from these patent holders
borlanic 0:fbdae7e6d805 30 to use this software.
borlanic 0:fbdae7e6d805 31
borlanic 0:fbdae7e6d805 32 THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
borlanic 0:fbdae7e6d805 33 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
borlanic 0:fbdae7e6d805 34 INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
borlanic 0:fbdae7e6d805 35 DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
borlanic 0:fbdae7e6d805 36 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
borlanic 0:fbdae7e6d805 37 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
borlanic 0:fbdae7e6d805 38 CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
borlanic 0:fbdae7e6d805 39 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
borlanic 0:fbdae7e6d805 40 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
borlanic 0:fbdae7e6d805 41 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
borlanic 0:fbdae7e6d805 42 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
borlanic 0:fbdae7e6d805 43 POSSIBILITY OF SUCH DAMAGE.
borlanic 0:fbdae7e6d805 44
borlanic 0:fbdae7e6d805 45 *****************************************************************************/
borlanic 0:fbdae7e6d805 46
borlanic 0:fbdae7e6d805 47 #ifndef ADI_I2C_DATA_C
borlanic 0:fbdae7e6d805 48 #define ADI_I2C_DATA_C
borlanic 0:fbdae7e6d805 49
borlanic 0:fbdae7e6d805 50 /*! \cond PRIVATE */
borlanic 0:fbdae7e6d805 51
borlanic 0:fbdae7e6d805 52 #include <adi_processor.h>
borlanic 0:fbdae7e6d805 53 #include "adi_i2c_def.h"
borlanic 0:fbdae7e6d805 54 #include "adi_i2c_config.h"
borlanic 0:fbdae7e6d805 55
borlanic 0:fbdae7e6d805 56
borlanic 0:fbdae7e6d805 57 /* Stores the information about the specific device */
borlanic 0:fbdae7e6d805 58 static ADI_I2C_DEVICE_INFO i2c_device_info [ADI_I2C_NUM_INSTANCES] =
borlanic 0:fbdae7e6d805 59 {
borlanic 0:fbdae7e6d805 60 /* fixed instance data for the singular I2C0 controller */
borlanic 0:fbdae7e6d805 61 {
borlanic 0:fbdae7e6d805 62 I2C_MST_EVT_IRQn, /* pio interrupt number */
borlanic 0:fbdae7e6d805 63 (ADI_I2C_TypeDef *)pADI_I2C0, /* i2c controller pointer */
borlanic 0:fbdae7e6d805 64 NULL, /* pointer to user config data */
borlanic 0:fbdae7e6d805 65 NULL /* i2c device handle (user mem) */
borlanic 0:fbdae7e6d805 66 },
borlanic 0:fbdae7e6d805 67
borlanic 0:fbdae7e6d805 68 /* no other i2c instances at this time */
borlanic 0:fbdae7e6d805 69 };
borlanic 0:fbdae7e6d805 70
borlanic 0:fbdae7e6d805 71 /* build I2C Application configuration array */
borlanic 0:fbdae7e6d805 72 static ADI_I2C_CONFIG gConfigInfo[ADI_I2C_NUM_INSTANCES] =
borlanic 0:fbdae7e6d805 73 {
borlanic 0:fbdae7e6d805 74 /* the one-and-only (so far) instance data for I2C, I2C0... */
borlanic 0:fbdae7e6d805 75 {
borlanic 0:fbdae7e6d805 76 /**** I2C_MCTL Master Control register *** */
borlanic 0:fbdae7e6d805 77 (
borlanic 0:fbdae7e6d805 78 /* note: Master IENMTX and IENMRX (transmit and receive interrupts) are managed dynamically */
borlanic 0:fbdae7e6d805 79 ( ADI_I2C_CFG_MCTL_MXMITDEC << BITP_I2C_MCTL_MXMITDEC ) |
borlanic 0:fbdae7e6d805 80 ( ADI_I2C_CFG_MCTL_IENCMP << BITP_I2C_MCTL_IENCMP ) |
borlanic 0:fbdae7e6d805 81 ( ADI_I2C_CFG_MCTL_IENACK << BITP_I2C_MCTL_IENACK ) |
borlanic 0:fbdae7e6d805 82 ( ADI_I2C_CFG_MCTL_IENALOST << BITP_I2C_MCTL_IENALOST ) |
borlanic 0:fbdae7e6d805 83 ( ADI_I2C_CFG_MCTL_STRETCHSCL << BITP_I2C_MCTL_STRETCHSCL ) |
borlanic 0:fbdae7e6d805 84 ( ADI_I2C_CFG_MCTL_LOOPBACK << BITP_I2C_MCTL_LOOPBACK ) |
borlanic 0:fbdae7e6d805 85 ( ADI_I2C_CFG_MCTL_COMPLETE << BITP_I2C_MCTL_COMPLETE ) |
borlanic 0:fbdae7e6d805 86 ( ADI_I2C_CFG_MCTL_MASEN << BITP_I2C_MCTL_MASEN )
borlanic 0:fbdae7e6d805 87 ),
borlanic 0:fbdae7e6d805 88
borlanic 0:fbdae7e6d805 89 /**** I2C_DIV Clock Divider register *** */
borlanic 0:fbdae7e6d805 90 (
borlanic 0:fbdae7e6d805 91 ( ADI_I2C_CFG_DIV_HIGH << BITP_I2C_DIV_HIGH ) |
borlanic 0:fbdae7e6d805 92 ( ADI_I2C_CFG_DIV_LOW << BITP_I2C_DIV_LOW )
borlanic 0:fbdae7e6d805 93 ),
borlanic 0:fbdae7e6d805 94
borlanic 0:fbdae7e6d805 95 /**** I2C_SHCTL Shared Control register *** */
borlanic 0:fbdae7e6d805 96 (
borlanic 0:fbdae7e6d805 97 ( ADI_I2C_CFG_SHCTL_RST << BITP_I2C_TCTL_FILTEROFF )
borlanic 0:fbdae7e6d805 98 ),
borlanic 0:fbdae7e6d805 99
borlanic 0:fbdae7e6d805 100 /**** I2C_TCTL Timing control register *** */
borlanic 0:fbdae7e6d805 101 (
borlanic 0:fbdae7e6d805 102 ( ADI_I2C_CFG_TCTL_FILTEROFF << BITP_I2C_SHCTL_RST ) |
borlanic 0:fbdae7e6d805 103 ( ADI_I2C_CFG_TCTL_THDATIN << BITP_I2C_TCTL_THDATIN )
borlanic 0:fbdae7e6d805 104 ),
borlanic 0:fbdae7e6d805 105
borlanic 0:fbdae7e6d805 106 /**** I2C_ASTRETCH Master Clock Stretch register *** */
borlanic 0:fbdae7e6d805 107 (
borlanic 0:fbdae7e6d805 108 ( ADI_I2C_CFG_ASTRETCH_MST << BITP_I2C_ASTRETCH_SCL_MST )
borlanic 0:fbdae7e6d805 109 ),
borlanic 0:fbdae7e6d805 110
borlanic 0:fbdae7e6d805 111 /**** Target Slave configuration value (not a register) *** */
borlanic 0:fbdae7e6d805 112 (
borlanic 0:fbdae7e6d805 113 ( ADI_I2C_CFG_SLAVE_ADDRESS )
borlanic 0:fbdae7e6d805 114 ),
borlanic 0:fbdae7e6d805 115 }
borlanic 0:fbdae7e6d805 116 };
borlanic 0:fbdae7e6d805 117
borlanic 0:fbdae7e6d805 118 /*! \endcond */
borlanic 0:fbdae7e6d805 119
borlanic 0:fbdae7e6d805 120
borlanic 0:fbdae7e6d805 121 #endif /* ADI_I2C_DATA_C */