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mbed-os/hal/itm_api.h@0:fbdae7e6d805, 2018-05-14 (annotated)
- Committer:
 - borlanic
 - Date:
 - Mon May 14 11:29:06 2018 +0000
 - Revision:
 - 0:fbdae7e6d805
 
BBR
Who changed what in which revision?
| User | Revision | Line number | New contents of line | 
|---|---|---|---|
| borlanic | 0:fbdae7e6d805 | 1 | /** \addtogroup hal */ | 
| borlanic | 0:fbdae7e6d805 | 2 | /** @{*/ | 
| borlanic | 0:fbdae7e6d805 | 3 | /* mbed Microcontroller Library | 
| borlanic | 0:fbdae7e6d805 | 4 | * Copyright (c) 2017 ARM Limited | 
| borlanic | 0:fbdae7e6d805 | 5 | * | 
| borlanic | 0:fbdae7e6d805 | 6 | * Licensed under the Apache License, Version 2.0 (the "License"); | 
| borlanic | 0:fbdae7e6d805 | 7 | * you may not use this file except in compliance with the License. | 
| borlanic | 0:fbdae7e6d805 | 8 | * You may obtain a copy of the License at | 
| borlanic | 0:fbdae7e6d805 | 9 | * | 
| borlanic | 0:fbdae7e6d805 | 10 | * http://www.apache.org/licenses/LICENSE-2.0 | 
| borlanic | 0:fbdae7e6d805 | 11 | * | 
| borlanic | 0:fbdae7e6d805 | 12 | * Unless required by applicable law or agreed to in writing, software | 
| borlanic | 0:fbdae7e6d805 | 13 | * distributed under the License is distributed on an "AS IS" BASIS, | 
| borlanic | 0:fbdae7e6d805 | 14 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | 
| borlanic | 0:fbdae7e6d805 | 15 | * See the License for the specific language governing permissions and | 
| borlanic | 0:fbdae7e6d805 | 16 | * limitations under the License. | 
| borlanic | 0:fbdae7e6d805 | 17 | */ | 
| borlanic | 0:fbdae7e6d805 | 18 | |
| borlanic | 0:fbdae7e6d805 | 19 | #ifndef MBED_ITM_API_H | 
| borlanic | 0:fbdae7e6d805 | 20 | #define MBED_ITM_API_H | 
| borlanic | 0:fbdae7e6d805 | 21 | |
| borlanic | 0:fbdae7e6d805 | 22 | #if defined(DEVICE_ITM) | 
| borlanic | 0:fbdae7e6d805 | 23 | |
| borlanic | 0:fbdae7e6d805 | 24 | #include <stdint.h> | 
| borlanic | 0:fbdae7e6d805 | 25 | |
| borlanic | 0:fbdae7e6d805 | 26 | #ifdef __cplusplus | 
| borlanic | 0:fbdae7e6d805 | 27 | extern "C" { | 
| borlanic | 0:fbdae7e6d805 | 28 | #endif | 
| borlanic | 0:fbdae7e6d805 | 29 | |
| borlanic | 0:fbdae7e6d805 | 30 | /** | 
| borlanic | 0:fbdae7e6d805 | 31 | * \defgroup itm_hal Instrumented Trace Macrocell HAL API | 
| borlanic | 0:fbdae7e6d805 | 32 | * @{ | 
| borlanic | 0:fbdae7e6d805 | 33 | */ | 
| borlanic | 0:fbdae7e6d805 | 34 | |
| borlanic | 0:fbdae7e6d805 | 35 | enum { | 
| borlanic | 0:fbdae7e6d805 | 36 | ITM_PORT_SWO = 0 | 
| borlanic | 0:fbdae7e6d805 | 37 | }; | 
| borlanic | 0:fbdae7e6d805 | 38 | |
| borlanic | 0:fbdae7e6d805 | 39 | /** | 
| borlanic | 0:fbdae7e6d805 | 40 | * @brief Target specific initialization function. | 
| borlanic | 0:fbdae7e6d805 | 41 | * This function is responsible for initializing and configuring | 
| borlanic | 0:fbdae7e6d805 | 42 | * the debug clock for the ITM and setting up the SWO pin for | 
| borlanic | 0:fbdae7e6d805 | 43 | * debug output. | 
| borlanic | 0:fbdae7e6d805 | 44 | * | 
| borlanic | 0:fbdae7e6d805 | 45 | * The only Cortex-M register that should be modified is the clock | 
| borlanic | 0:fbdae7e6d805 | 46 | * prescaler in TPI->ACPR. | 
| borlanic | 0:fbdae7e6d805 | 47 | * | 
| borlanic | 0:fbdae7e6d805 | 48 | * The generic mbed_itm_init initialization function will setup: | 
| borlanic | 0:fbdae7e6d805 | 49 | * | 
| borlanic | 0:fbdae7e6d805 | 50 | * ITM->LAR | 
| borlanic | 0:fbdae7e6d805 | 51 | * ITM->TPR | 
| borlanic | 0:fbdae7e6d805 | 52 | * ITM->TCR | 
| borlanic | 0:fbdae7e6d805 | 53 | * ITM->TER | 
| borlanic | 0:fbdae7e6d805 | 54 | * TPI->SPPR | 
| borlanic | 0:fbdae7e6d805 | 55 | * TPI->FFCR | 
| borlanic | 0:fbdae7e6d805 | 56 | * DWT->CTRL | 
| borlanic | 0:fbdae7e6d805 | 57 | * | 
| borlanic | 0:fbdae7e6d805 | 58 | * for SWO output on stimulus port 0. | 
| borlanic | 0:fbdae7e6d805 | 59 | */ | 
| borlanic | 0:fbdae7e6d805 | 60 | void itm_init(void); | 
| borlanic | 0:fbdae7e6d805 | 61 | |
| borlanic | 0:fbdae7e6d805 | 62 | /** | 
| borlanic | 0:fbdae7e6d805 | 63 | * @brief Initialization function for both generic registers and target specific clock and pin. | 
| borlanic | 0:fbdae7e6d805 | 64 | */ | 
| borlanic | 0:fbdae7e6d805 | 65 | void mbed_itm_init(void); | 
| borlanic | 0:fbdae7e6d805 | 66 | |
| borlanic | 0:fbdae7e6d805 | 67 | /** | 
| borlanic | 0:fbdae7e6d805 | 68 | * @brief Send data over ITM stimulus port. | 
| borlanic | 0:fbdae7e6d805 | 69 | * | 
| borlanic | 0:fbdae7e6d805 | 70 | * @param[in] port The stimulus port to send data over. | 
| borlanic | 0:fbdae7e6d805 | 71 | * @param[in] data The data to send. | 
| borlanic | 0:fbdae7e6d805 | 72 | * | 
| borlanic | 0:fbdae7e6d805 | 73 | * @return value of data sent. | 
| borlanic | 0:fbdae7e6d805 | 74 | */ | 
| borlanic | 0:fbdae7e6d805 | 75 | uint32_t mbed_itm_send(uint32_t port, uint32_t data); | 
| borlanic | 0:fbdae7e6d805 | 76 | |
| borlanic | 0:fbdae7e6d805 | 77 | /**@}*/ | 
| borlanic | 0:fbdae7e6d805 | 78 | |
| borlanic | 0:fbdae7e6d805 | 79 | #ifdef __cplusplus | 
| borlanic | 0:fbdae7e6d805 | 80 | } | 
| borlanic | 0:fbdae7e6d805 | 81 | #endif | 
| borlanic | 0:fbdae7e6d805 | 82 | |
| borlanic | 0:fbdae7e6d805 | 83 | #endif | 
| borlanic | 0:fbdae7e6d805 | 84 | |
| borlanic | 0:fbdae7e6d805 | 85 | #endif /* MBED_ITM_API_H */ | 
| borlanic | 0:fbdae7e6d805 | 86 | |
| borlanic | 0:fbdae7e6d805 | 87 | /**@}*/ |