Revision 166:c97ed07ec1a8, committed 2017-06-08

Comitter:

AnnaBridge

Date:

Thu Jun 08 15:02:37 2017 +0100

Parent:

165:e614a9f1c9e2

Child:

167:e84263d55307

Commit message:

This updates the lib to the mbed lib v 144

Changed in this revision

--- a/cmsis/TOOLCHAIN_IAR/cmain.S	Fri May 26 12:39:01 2017 +0100
+++ b/cmsis/TOOLCHAIN_IAR/cmain.S	Thu Jun 08 15:02:37 2017 +0100
@@ -3,12 +3,27 @@
  * Part two of the system initialization code, contains C-level
  * initialization, thumb-2 only variant.
  *
- * Copyright 2006 IAR Systems. All rights reserved.
- *
  * $Revision: 59783 $
  *
  **************************************************/
+/* Copyright 2008-2017, IAR Systems AB.
+   This source code is the property of IAR Systems. The source code may only
+   be used together with the IAR Embedded Workbench. Redistribution and use
+   in source and binary forms, with or without modification, is permitted
+   provided that the following conditions are met:
+   - Redistributions of source code, in whole or in part, must retain the
+     above copyright notice, this list of conditions and the disclaimer below.
+   - IAR Systems name may not be used to endorse or promote products
+     derived from this software without specific prior written permission.
 
+   THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+   WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+   MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+   ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+   WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+   ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+   OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+*/
 
 ; --------------------------------------------------
 ; Module ?cmain, C-level initialization.

--- a/mbed.h	Fri May 26 12:39:01 2017 +0100
+++ b/mbed.h	Thu Jun 08 15:02:37 2017 +0100
@@ -16,13 +16,13 @@
 #ifndef MBED_H
 #define MBED_H
 
-#define MBED_LIBRARY_VERSION 143
+#define MBED_LIBRARY_VERSION 144
 
 #if MBED_CONF_RTOS_PRESENT
 // RTOS present, this is valid only for mbed OS 5
 #define MBED_MAJOR_VERSION 5
 #define MBED_MINOR_VERSION 4
-#define MBED_PATCH_VERSION 6
+#define MBED_PATCH_VERSION 7
 
 #else
 // mbed 2

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/TARGET_NORDIC/TARGET_NRF5/flash_api.c	Thu Jun 08 15:02:37 2017 +0100
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2017 Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ *   1. Redistributions of source code must retain the above copyright notice, this list
+ *      of conditions and the following disclaimer.
+ *
+ *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
+ *      integrated circuit in a product or a software update for such product, must reproduce
+ *      the above copyright notice, this list of conditions and the following disclaimer in
+ *      the documentation and/or other materials provided with the distribution.
+ *
+ *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
+ *      used to endorse or promote products derived from this software without specific prior
+ *      written permission.
+ *
+ *   4. This software, with or without modification, must only be used with a
+ *      Nordic Semiconductor ASA integrated circuit.
+ *
+ *   5. Any software provided in binary or object form under this license must not be reverse
+ *      engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "flash_api.h"
+#include "nrf_nvmc.h"
+#include "nrf_soc.h"
+#include "nrf_sdm.h"
+
+#if DEVICE_FLASH
+
+int32_t flash_init(flash_t *obj)
+{
+    (void)(obj);
+    uint8_t sd_enabled;
+    if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
+        return -1;
+    }
+    return 0;
+}
+
+int32_t flash_free(flash_t *obj)
+{
+    (void)(obj);
+    return 0;
+}
+
+int32_t flash_erase_sector(flash_t *obj, uint32_t address)
+{
+    (void)(obj);
+    uint8_t sd_enabled;
+    if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
+        return -1;
+    }
+    nrf_nvmc_page_erase(address);
+    return 0;
+}
+
+int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size)
+{
+    uint8_t sd_enabled;
+    if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
+        return -1;
+    }
+    /* We will use *_words function to speed up flashing code. Word means 32bit -> 4B
+     * or sizeof(uint32_t).
+     */
+    nrf_nvmc_write_words(address, (const uint32_t *) data, (size / sizeof(uint32_t)));
+    return 0;
+}
+
+uint32_t flash_get_size(const flash_t *obj)
+{
+    (void)(obj);
+    /* Just count flash size. */
+    return NRF_FICR->CODESIZE * NRF_FICR->CODEPAGESIZE;
+}
+
+uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
+{
+    (void)(obj);
+    /* Test if passed address is in flash space. */
+    if (address < flash_get_size(obj)) {
+        return NRF_FICR->CODEPAGESIZE;
+    }
+    /* Something goes wrong, return invalid size error code. */
+    return MBED_FLASH_INVALID_SIZE;
+}
+
+uint32_t flash_get_page_size(const flash_t *obj)
+{
+    (void)(obj);
+    return NRF_FICR->CODEPAGESIZE;
+}
+
+uint32_t flash_get_start_address(const flash_t *obj)
+{
+    return 0;
+}
+
+#endif
+
+/** @}*/

--- a/targets/TARGET_NORDIC/TARGET_NRF5/objects.h	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_NORDIC/TARGET_NRF5/objects.h	Thu Jun 08 15:02:37 2017 +0100
@@ -1,28 +1,28 @@
-/* 
+/*
  * Copyright (c) 2013 Nordic Semiconductor ASA
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
+ *
+ *   1. Redistributions of source code must retain the above copyright notice, this list
  *      of conditions and the following disclaimer.
  *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
+ *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
+ *      integrated circuit in a product or a software update for such product, must reproduce
+ *      the above copyright notice, this list of conditions and the following disclaimer in
  *      the documentation and/or other materials provided with the distribution.
  *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
+ *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
+ *      used to endorse or promote products derived from this software without specific prior
  *      written permission.
  *
- *   4. This software, with or without modification, must only be used with a 
+ *   4. This software, with or without modification, must only be used with a
  *      Nordic Semiconductor ASA integrated circuit.
  *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
+ *   5. Any software provided in binary or object form under this license must not be reverse
+ *      engineered, decompiled, modified and/or disassembled.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,7 +33,7 @@
  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
+ *
  */
 
 #ifndef MBED_OBJECTS_H
@@ -81,6 +81,9 @@
     uint32_t ch;
 };
 
+struct flash_s {
+    uint32_t placeholder;
+};
 
 #include "gpio_object.h"
 

--- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/cmsis_nvic.c	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/cmsis_nvic.c	Thu Jun 08 15:02:37 2017 +0100
@@ -31,14 +31,13 @@
 #include "cmsis_nvic.h"
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t *vectors = (uint32_t *)SCB->VTOR;
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {

--- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/cmsis_nvic.c	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/cmsis_nvic.c	Thu Jun 08 15:02:37 2017 +0100
@@ -31,14 +31,13 @@
 #include "cmsis_nvic.h"
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t *vectors = (uint32_t *)SCB->VTOR;
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {

--- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/cmsis_nvic.c	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/cmsis_nvic.c	Thu Jun 08 15:02:37 2017 +0100
@@ -31,14 +31,13 @@
 #include "cmsis_nvic.h"
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t *vectors = (uint32_t *)SCB->VTOR;
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {

--- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/cmsis_nvic.c	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/cmsis_nvic.c	Thu Jun 08 15:02:37 2017 +0100
@@ -31,14 +31,13 @@
 #include "cmsis_nvic.h"
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t *vectors = (uint32_t *)SCB->VTOR;
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {

--- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/cmsis_nvic.c	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/cmsis_nvic.c	Thu Jun 08 15:02:37 2017 +0100
@@ -31,14 +31,13 @@
 #include "cmsis_nvic.h"
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t *vectors = (uint32_t *)SCB->VTOR;
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {

--- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h	Fri May 26 12:39:01 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h	Thu Jun 08 15:02:37 2017 +0100
@@ -65,6 +65,7 @@
     PinName pin;
 };
 
+#define GPIO_IP_WITHOUT_BRR
 #include "common_objects.h"
 
 #ifdef __cplusplus

--- a/targets/targets.json	Fri May 26 12:39:01 2017 +0100
+++ b/targets/targets.json	Thu Jun 08 15:02:37 2017 +0100
@@ -1331,7 +1331,7 @@
         "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
         "post_binary_hook": {
             "function": "MTSCode.combine_bins_mts_dot",
-            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
+            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
         },
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
@@ -1345,7 +1345,7 @@
         "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2", "RTC_LSI=1"],
         "post_binary_hook": {
             "function": "MTSCode.combine_bins_mts_dragonfly",
-            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
+            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
         },
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
@@ -2782,7 +2782,7 @@
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF52840"],
         "macros_add": ["BOARD_PCA10056", "CONFIG_GPIO_AS_PINRESET", "SWI_DISABLE0", "NRF52_ERRATA_20"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["FLASH", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "device_name": "nRF52840_xxAA"
     },