Alejandro Ungria Hirte / GA-Test

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Dependencies:   mbed-dev

decadriver/deca_device_api.h@0:3333b6066adf, 2017-12-06 (annotated)

Committer:
aungriah
Date:
Wed Dec 06 21:42:54 2017 +0000
Revision:
0:3333b6066adf
asfaf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
aungriah 0:3333b6066adf 1 /*! ----------------------------------------------------------------------------
aungriah 0:3333b6066adf 2 * @file deca_device_api.h
aungriah 0:3333b6066adf 3 * @brief DW1000 API Functions
aungriah 0:3333b6066adf 4 *
aungriah 0:3333b6066adf 5 * @attention
aungriah 0:3333b6066adf 6 *
aungriah 0:3333b6066adf 7 * Copyright 2013 (c) Decawave Ltd, Dublin, Ireland.
aungriah 0:3333b6066adf 8 *
aungriah 0:3333b6066adf 9 * All rights reserved.
aungriah 0:3333b6066adf 10 *
aungriah 0:3333b6066adf 11 */
aungriah 0:3333b6066adf 12
aungriah 0:3333b6066adf 13 #ifndef _DECA_DEVICE_API_H_
aungriah 0:3333b6066adf 14 #define _DECA_DEVICE_API_H_
aungriah 0:3333b6066adf 15
aungriah 0:3333b6066adf 16 #ifdef __cplusplus
aungriah 0:3333b6066adf 17 extern "C" {
aungriah 0:3333b6066adf 18 #endif
aungriah 0:3333b6066adf 19
aungriah 0:3333b6066adf 20
aungriah 0:3333b6066adf 21 #ifndef uint8
aungriah 0:3333b6066adf 22 #ifndef _DECA_UINT8_
aungriah 0:3333b6066adf 23 #define _DECA_UINT8_
aungriah 0:3333b6066adf 24 typedef unsigned char uint8;
aungriah 0:3333b6066adf 25 #endif
aungriah 0:3333b6066adf 26 #endif
aungriah 0:3333b6066adf 27
aungriah 0:3333b6066adf 28 #ifndef uint16
aungriah 0:3333b6066adf 29 #ifndef _DECA_UINT16_
aungriah 0:3333b6066adf 30 #define _DECA_UINT16_
aungriah 0:3333b6066adf 31 typedef unsigned short uint16;
aungriah 0:3333b6066adf 32 #endif
aungriah 0:3333b6066adf 33 #endif
aungriah 0:3333b6066adf 34
aungriah 0:3333b6066adf 35 #ifndef uint32
aungriah 0:3333b6066adf 36 #ifndef _DECA_UINT32_
aungriah 0:3333b6066adf 37 #define _DECA_UINT32_
aungriah 0:3333b6066adf 38 typedef unsigned long uint32;
aungriah 0:3333b6066adf 39 #endif
aungriah 0:3333b6066adf 40 #endif
aungriah 0:3333b6066adf 41
aungriah 0:3333b6066adf 42 #ifndef int8
aungriah 0:3333b6066adf 43 #ifndef _DECA_INT8_
aungriah 0:3333b6066adf 44 #define _DECA_INT8_
aungriah 0:3333b6066adf 45 typedef signed char int8;
aungriah 0:3333b6066adf 46 #endif
aungriah 0:3333b6066adf 47 #endif
aungriah 0:3333b6066adf 48
aungriah 0:3333b6066adf 49 #ifndef int16
aungriah 0:3333b6066adf 50 #ifndef _DECA_INT16_
aungriah 0:3333b6066adf 51 #define _DECA_INT16_
aungriah 0:3333b6066adf 52 typedef signed short int16;
aungriah 0:3333b6066adf 53 #endif
aungriah 0:3333b6066adf 54 #endif
aungriah 0:3333b6066adf 55
aungriah 0:3333b6066adf 56 #ifndef int32
aungriah 0:3333b6066adf 57 #ifndef _DECA_INT32_
aungriah 0:3333b6066adf 58 #define _DECA_INT32_
aungriah 0:3333b6066adf 59 typedef signed long int32;
aungriah 0:3333b6066adf 60 #endif
aungriah 0:3333b6066adf 61 #endif
aungriah 0:3333b6066adf 62
aungriah 0:3333b6066adf 63 #define DWT_SUCCESS (0)
aungriah 0:3333b6066adf 64 #define DWT_ERROR (-1)
aungriah 0:3333b6066adf 65
aungriah 0:3333b6066adf 66 #define DWT_TIME_UNITS (1.0/499.2e6/128.0) //!< = 15.65e-12 s
aungriah 0:3333b6066adf 67
aungriah 0:3333b6066adf 68 #define DWT_DEVICE_ID (0xDECA0130) //!< DW1000 MP device ID
aungriah 0:3333b6066adf 69
aungriah 0:3333b6066adf 70 //! constants for selecting the bit rate for data TX (and RX)
aungriah 0:3333b6066adf 71 //! These are defined for write (with just a shift) the TX_FCTRL register
aungriah 0:3333b6066adf 72 #define DWT_BR_110K 0 //!< UWB bit rate 110 kbits/s
aungriah 0:3333b6066adf 73 #define DWT_BR_850K 1 //!< UWB bit rate 850 kbits/s
aungriah 0:3333b6066adf 74 #define DWT_BR_6M8 2 //!< UWB bit rate 6.8 Mbits/s
aungriah 0:3333b6066adf 75
aungriah 0:3333b6066adf 76 //! constants for specifying the (Nominal) mean Pulse Repetition Frequency
aungriah 0:3333b6066adf 77 //! These are defined for direct write (with a shift if necessary) to CHAN_CTRL and TX_FCTRL regs
aungriah 0:3333b6066adf 78 #define DWT_PRF_16M 1 //!< UWB PRF 16 MHz
aungriah 0:3333b6066adf 79 #define DWT_PRF_64M 2 //!< UWB PRF 64 MHz
aungriah 0:3333b6066adf 80
aungriah 0:3333b6066adf 81 //! constants for specifying Preamble Acquisition Chunk (PAC) Size in symbols
aungriah 0:3333b6066adf 82 #define DWT_PAC8 0 //!< PAC 8 (recommended for RX of preamble length 128 and below
aungriah 0:3333b6066adf 83 #define DWT_PAC16 1 //!< PAC 16 (recommended for RX of preamble length 256
aungriah 0:3333b6066adf 84 #define DWT_PAC32 2 //!< PAC 32 (recommended for RX of preamble length 512
aungriah 0:3333b6066adf 85 #define DWT_PAC64 3 //!< PAC 64 (recommended for RX of preamble length 1024 and up
aungriah 0:3333b6066adf 86
aungriah 0:3333b6066adf 87 //! constants for specifying TX Preamble length in symbols
aungriah 0:3333b6066adf 88 //! These are defined to allow them be directly written into byte 2 of the TX_FCTRL register
aungriah 0:3333b6066adf 89 //! (i.e. a four bit value destined for bits 20..18 but shifted left by 2 for byte alignment)
aungriah 0:3333b6066adf 90 #define DWT_PLEN_4096 0x0C //! Standard preamble length 4096 symbols
aungriah 0:3333b6066adf 91 #define DWT_PLEN_2048 0x28 //! Non-standard preamble length 2048 symbols
aungriah 0:3333b6066adf 92 #define DWT_PLEN_1536 0x18 //! Non-standard preamble length 1536 symbols
aungriah 0:3333b6066adf 93 #define DWT_PLEN_1024 0x08 //! Standard preamble length 1024 symbols
aungriah 0:3333b6066adf 94 #define DWT_PLEN_512 0x34 //! Non-standard preamble length 512 symbols
aungriah 0:3333b6066adf 95 #define DWT_PLEN_256 0x24 //! Non-standard preamble length 256 symbols
aungriah 0:3333b6066adf 96 #define DWT_PLEN_128 0x14 //! Non-standard preamble length 128 symbols
aungriah 0:3333b6066adf 97 #define DWT_PLEN_64 0x04 //! Standard preamble length 64 symbols
aungriah 0:3333b6066adf 98
aungriah 0:3333b6066adf 99 #define DWT_SFDTOC_DEF 0x1041 // default SFD timeout value
aungriah 0:3333b6066adf 100
aungriah 0:3333b6066adf 101 #define DWT_PHRMODE_STD 0x0 // standard PHR mode
aungriah 0:3333b6066adf 102 #define DWT_PHRMODE_EXT 0x3 // DW proprietary extended frames PHR mode
aungriah 0:3333b6066adf 103
aungriah 0:3333b6066adf 104 // Defined constants for "mode" bitmask parameter passed into dwt_starttx() function.
aungriah 0:3333b6066adf 105 #define DWT_START_TX_IMMEDIATE 0
aungriah 0:3333b6066adf 106 #define DWT_START_TX_DELAYED 1
aungriah 0:3333b6066adf 107 #define DWT_RESPONSE_EXPECTED 2
aungriah 0:3333b6066adf 108
aungriah 0:3333b6066adf 109 #define DWT_START_RX_IMMEDIATE 0
aungriah 0:3333b6066adf 110 #define DWT_START_RX_DELAYED 1 // Set up delayed RX, if "late" error triggers, then the RX will be enabled immediately
aungriah 0:3333b6066adf 111 #define DWT_IDLE_ON_DLY_ERR 2 // If delayed RX failed due to "late" error then if this
aungriah 0:3333b6066adf 112 // flag is set the RX will not be re-enabled immediately, and device will be in IDLE when function exits
aungriah 0:3333b6066adf 113 #define DWT_NO_SYNC_PTRS 4 // Do not try to sync IC side and Host side buffer pointers when enabling RX. This is used to perform manual RX
aungriah 0:3333b6066adf 114 // re-enabling when receiving a frame in double buffer mode.
aungriah 0:3333b6066adf 115
aungriah 0:3333b6066adf 116 // Defined constants for "mode" bit field parameter passed to dwt_setleds() function.
aungriah 0:3333b6066adf 117 #define DWT_LEDS_DISABLE 0x00
aungriah 0:3333b6066adf 118 #define DWT_LEDS_ENABLE 0x01
aungriah 0:3333b6066adf 119 #define DWT_LEDS_INIT_BLINK 0x02
aungriah 0:3333b6066adf 120
aungriah 0:3333b6066adf 121 //frame filtering configuration options
aungriah 0:3333b6066adf 122 #define DWT_FF_NOTYPE_EN 0x000 // no frame types allowed (FF disabled)
aungriah 0:3333b6066adf 123 #define DWT_FF_COORD_EN 0x002 // behave as coordinator (can receive frames with no dest address (PAN ID has to match))
aungriah 0:3333b6066adf 124 #define DWT_FF_BEACON_EN 0x004 // beacon frames allowed
aungriah 0:3333b6066adf 125 #define DWT_FF_DATA_EN 0x008 // data frames allowed
aungriah 0:3333b6066adf 126 #define DWT_FF_ACK_EN 0x010 // ack frames allowed
aungriah 0:3333b6066adf 127 #define DWT_FF_MAC_EN 0x020 // mac control frames allowed
aungriah 0:3333b6066adf 128 #define DWT_FF_RSVD_EN 0x040 // reserved frame types allowed
aungriah 0:3333b6066adf 129
aungriah 0:3333b6066adf 130 //DW1000 interrupt events
aungriah 0:3333b6066adf 131 #define DWT_INT_TFRS 0x00000080 // frame sent
aungriah 0:3333b6066adf 132 #define DWT_INT_LDED 0x00000400 // micro-code has finished execution
aungriah 0:3333b6066adf 133 #define DWT_INT_RFCG 0x00004000 // frame received with good CRC
aungriah 0:3333b6066adf 134 #define DWT_INT_RPHE 0x00001000 // receiver PHY header error
aungriah 0:3333b6066adf 135 #define DWT_INT_RFCE 0x00008000 // receiver CRC error
aungriah 0:3333b6066adf 136 #define DWT_INT_RFSL 0x00010000 // receiver sync loss error
aungriah 0:3333b6066adf 137 #define DWT_INT_RFTO 0x00020000 // frame wait timeout
aungriah 0:3333b6066adf 138 #define DWT_INT_RXOVRR 0x00100000 // receiver overrun
aungriah 0:3333b6066adf 139 #define DWT_INT_RXPTO 0x00200000 // preamble detect timeout
aungriah 0:3333b6066adf 140 #define DWT_INT_SFDT 0x04000000 // SFD timeout
aungriah 0:3333b6066adf 141 #define DWT_INT_ARFE 0x20000000 // frame rejected (due to frame filtering configuration)
aungriah 0:3333b6066adf 142
aungriah 0:3333b6066adf 143
aungriah 0:3333b6066adf 144 //DW1000 SLEEP and WAKEUP configuration parameters
aungriah 0:3333b6066adf 145 #define DWT_PRESRV_SLEEP 0x0100 // PRES_SLEEP - on wakeup preserve sleep bit
aungriah 0:3333b6066adf 146 #define DWT_LOADOPSET 0x0080 // ONW_L64P - on wakeup load operating parameter set for 64 PSR
aungriah 0:3333b6066adf 147 #define DWT_CONFIG 0x0040 // ONW_LDC - on wakeup restore (load) the saved configurations (from AON array into HIF)
aungriah 0:3333b6066adf 148 #define DWT_RX_EN 0x0002 // ONW_RX - on wakeup activate reception
aungriah 0:3333b6066adf 149 #define DWT_TANDV 0x0001 // ONW_RADC - on wakeup run ADC to sample temperature and voltage sensor values
aungriah 0:3333b6066adf 150
aungriah 0:3333b6066adf 151 #define DWT_XTAL_EN 0x10 // keep XTAL running during sleep
aungriah 0:3333b6066adf 152 #define DWT_WAKE_SLPCNT 0x8 // wake up after sleep count
aungriah 0:3333b6066adf 153 #define DWT_WAKE_CS 0x4 // wake up on chip select
aungriah 0:3333b6066adf 154 #define DWT_WAKE_WK 0x2 // wake up on WAKEUP PIN
aungriah 0:3333b6066adf 155 #define DWT_SLP_EN 0x1 // enable sleep/deep sleep functionality
aungriah 0:3333b6066adf 156
aungriah 0:3333b6066adf 157 //DW1000 INIT configuration parameters
aungriah 0:3333b6066adf 158 #define DWT_LOADUCODE 0x1
aungriah 0:3333b6066adf 159 #define DWT_LOADNONE 0x0
aungriah 0:3333b6066adf 160
aungriah 0:3333b6066adf 161 //DW1000 OTP operating parameter set selection
aungriah 0:3333b6066adf 162 #define DWT_OPSET_64LEN 0x0
aungriah 0:3333b6066adf 163 #define DWT_OPSET_TIGHT 0x1
aungriah 0:3333b6066adf 164 #define DWT_OPSET_DEFLT 0x2
aungriah 0:3333b6066adf 165
aungriah 0:3333b6066adf 166 // Call-back data RX frames flags
aungriah 0:3333b6066adf 167 #define DWT_CB_DATA_RX_FLAG_RNG 0x1 // Ranging bit
aungriah 0:3333b6066adf 168
aungriah 0:3333b6066adf 169 // TX/RX call-back data
aungriah 0:3333b6066adf 170 typedef struct
aungriah 0:3333b6066adf 171 {
aungriah 0:3333b6066adf 172 uint32 status; //initial value of register as ISR is entered
aungriah 0:3333b6066adf 173 uint16 datalength; //length of frame
aungriah 0:3333b6066adf 174 uint8 fctrl[2]; //frame control bytes
aungriah 0:3333b6066adf 175 uint8 rx_flags; //RX frame flags, see above
aungriah 0:3333b6066adf 176 } dwt_cb_data_t;
aungriah 0:3333b6066adf 177
aungriah 0:3333b6066adf 178 // Call-back type for all events
aungriah 0:3333b6066adf 179 typedef void (*dwt_cb_t)(const dwt_cb_data_t *);
aungriah 0:3333b6066adf 180
aungriah 0:3333b6066adf 181 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 182 * Structure typedef: dwt_config_t
aungriah 0:3333b6066adf 183 *
aungriah 0:3333b6066adf 184 * Structure for setting device configuration via dwt_configure() function
aungriah 0:3333b6066adf 185 *
aungriah 0:3333b6066adf 186 */
aungriah 0:3333b6066adf 187 typedef struct
aungriah 0:3333b6066adf 188 {
aungriah 0:3333b6066adf 189 uint8 chan ; //!< channel number {1, 2, 3, 4, 5, 7 }
aungriah 0:3333b6066adf 190 uint8 prf ; //!< Pulse Repetition Frequency {DWT_PRF_16M or DWT_PRF_64M}
aungriah 0:3333b6066adf 191 uint8 txPreambLength ; //!< DWT_PLEN_64..DWT_PLEN_4096
aungriah 0:3333b6066adf 192 uint8 rxPAC ; //!< Acquisition Chunk Size (Relates to RX preamble length)
aungriah 0:3333b6066adf 193 uint8 txCode ; //!< TX preamble code
aungriah 0:3333b6066adf 194 uint8 rxCode ; //!< RX preamble code
aungriah 0:3333b6066adf 195 uint8 nsSFD ; //!< Boolean should we use non-standard SFD for better performance
aungriah 0:3333b6066adf 196 uint8 dataRate ; //!< Data Rate {DWT_BR_110K, DWT_BR_850K or DWT_BR_6M8}
aungriah 0:3333b6066adf 197 uint8 phrMode ; //!< PHR mode {0x0 - standard DWT_PHRMODE_STD, 0x3 - extended frames DWT_PHRMODE_EXT}
aungriah 0:3333b6066adf 198 uint16 sfdTO ; //!< SFD timeout value (in symbols)
aungriah 0:3333b6066adf 199 } dwt_config_t ;
aungriah 0:3333b6066adf 200
aungriah 0:3333b6066adf 201
aungriah 0:3333b6066adf 202 typedef struct
aungriah 0:3333b6066adf 203 {
aungriah 0:3333b6066adf 204 uint8 PGdly;
aungriah 0:3333b6066adf 205 //TX POWER
aungriah 0:3333b6066adf 206 //31:24 BOOST_0.125ms_PWR
aungriah 0:3333b6066adf 207 //23:16 BOOST_0.25ms_PWR-TX_SHR_PWR
aungriah 0:3333b6066adf 208 //15:8 BOOST_0.5ms_PWR-TX_PHR_PWR
aungriah 0:3333b6066adf 209 //7:0 DEFAULT_PWR-TX_DATA_PWR
aungriah 0:3333b6066adf 210 uint32 power;
aungriah 0:3333b6066adf 211 }
aungriah 0:3333b6066adf 212 dwt_txconfig_t ;
aungriah 0:3333b6066adf 213
aungriah 0:3333b6066adf 214
aungriah 0:3333b6066adf 215 typedef struct
aungriah 0:3333b6066adf 216 {
aungriah 0:3333b6066adf 217
aungriah 0:3333b6066adf 218 uint16 maxNoise ; // LDE max value of noise
aungriah 0:3333b6066adf 219 uint16 firstPathAmp1 ; // Amplitude at floor(index FP) + 1
aungriah 0:3333b6066adf 220 uint16 stdNoise ; // Standard deviation of noise
aungriah 0:3333b6066adf 221 uint16 firstPathAmp2 ; // Amplitude at floor(index FP) + 2
aungriah 0:3333b6066adf 222 uint16 firstPathAmp3 ; // Amplitude at floor(index FP) + 3
aungriah 0:3333b6066adf 223 uint16 maxGrowthCIR ; // Channel Impulse Response max growth CIR
aungriah 0:3333b6066adf 224 uint16 rxPreamCount ; // Count of preamble symbols accumulated
aungriah 0:3333b6066adf 225 uint16 firstPath ; // First p ath index (10.6 bits fixed point integer)
aungriah 0:3333b6066adf 226 }dwt_rxdiag_t ;
aungriah 0:3333b6066adf 227
aungriah 0:3333b6066adf 228
aungriah 0:3333b6066adf 229 typedef struct
aungriah 0:3333b6066adf 230 {
aungriah 0:3333b6066adf 231 //all of the below are mapped to a 12-bit register in DW1000
aungriah 0:3333b6066adf 232 uint16 PHE ; //number of received header errors
aungriah 0:3333b6066adf 233 uint16 RSL ; //number of received frame sync loss events
aungriah 0:3333b6066adf 234 uint16 CRCG ; //number of good CRC received frames
aungriah 0:3333b6066adf 235 uint16 CRCB ; //number of bad CRC (CRC error) received frames
aungriah 0:3333b6066adf 236 uint16 ARFE ; //number of address filter errors
aungriah 0:3333b6066adf 237 uint16 OVER ; //number of receiver overflows (used in double buffer mode)
aungriah 0:3333b6066adf 238 uint16 SFDTO ; //SFD timeouts
aungriah 0:3333b6066adf 239 uint16 PTO ; //Preamble timeouts
aungriah 0:3333b6066adf 240 uint16 RTO ; //RX frame wait timeouts
aungriah 0:3333b6066adf 241 uint16 TXF ; //number of transmitted frames
aungriah 0:3333b6066adf 242 uint16 HPW ; //half period warn
aungriah 0:3333b6066adf 243 uint16 TXW ; //power up warn
aungriah 0:3333b6066adf 244
aungriah 0:3333b6066adf 245 } dwt_deviceentcnts_t ;
aungriah 0:3333b6066adf 246
aungriah 0:3333b6066adf 247
aungriah 0:3333b6066adf 248 /********************************************************************************************************************/
aungriah 0:3333b6066adf 249 /* REMOVED API LIST */
aungriah 0:3333b6066adf 250 /********************************************************************************************************************/
aungriah 0:3333b6066adf 251 /*
aungriah 0:3333b6066adf 252 * From version 4.0.0:
aungriah 0:3333b6066adf 253 * - dwt_setGPIOforEXTTRX: Replaced by dwt_setlnapamode to get equivalent functionality.
aungriah 0:3333b6066adf 254 * - dwt_setGPIOdirection: Renamed to dwt_setgpiodirection.
aungriah 0:3333b6066adf 255 * - dwt_setGPIOvalue: Renamed to dwt_setgpiovalue.
aungriah 0:3333b6066adf 256 * - dwt_setrxmode: Replaced by dwt_setsniffmode and dwt_setlowpowerlistening depending on the RX mode the user
aungriah 0:3333b6066adf 257 * wants to set up.
aungriah 0:3333b6066adf 258 * - dwt_checkoverrun: As automatic RX re-enabling is not supported anymore, this functions has become useless.
aungriah 0:3333b6066adf 259 * - dwt_setautorxreenable: As automatic RX re-enabling is not supported anymore, this functions has become
aungriah 0:3333b6066adf 260 * useless.
aungriah 0:3333b6066adf 261 * - dwt_getrangebias: Range bias correction values are platform dependent and should therefore be managed at user
aungriah 0:3333b6066adf 262 * application level.
aungriah 0:3333b6066adf 263 * - dwt_xtaltrim: Renamed to dwt_setxtaltrim.
aungriah 0:3333b6066adf 264 * - dwt_checkIRQ: Renamed to dwt_checkirq.
aungriah 0:3333b6066adf 265 *
aungriah 0:3333b6066adf 266 * From version 3.0.0:
aungriah 0:3333b6066adf 267 * - dwt_getldotune: As LDO loading is now automatically managed by the driver, this function has become useless.
aungriah 0:3333b6066adf 268 * - dwt_getotptxpower: TX power values and location in OTP memory are platform dependent and should therefore be
aungriah 0:3333b6066adf 269 * managed at user application level.
aungriah 0:3333b6066adf 270 * - dwt_readantennadelay: Antenna delay values and location in OTP memory are platform dependent and should
aungriah 0:3333b6066adf 271 * therefore be managed at user application level.
aungriah 0:3333b6066adf 272 * - dwt_readdignostics: Renamed to dwt_readdiagnostics.
aungriah 0:3333b6066adf 273 */
aungriah 0:3333b6066adf 274
aungriah 0:3333b6066adf 275 /********************************************************************************************************************/
aungriah 0:3333b6066adf 276 /* API LIST */
aungriah 0:3333b6066adf 277 /********************************************************************************************************************/
aungriah 0:3333b6066adf 278
aungriah 0:3333b6066adf 279 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 280 * @fn dwt_getpartid()
aungriah 0:3333b6066adf 281 *
aungriah 0:3333b6066adf 282 * @brief This is used to return the read part ID of the device
aungriah 0:3333b6066adf 283 *
aungriah 0:3333b6066adf 284 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.
aungriah 0:3333b6066adf 285 *
aungriah 0:3333b6066adf 286 * input parameters
aungriah 0:3333b6066adf 287 *
aungriah 0:3333b6066adf 288 * output parameters
aungriah 0:3333b6066adf 289 *
aungriah 0:3333b6066adf 290 * returns the 32 bit part ID value as programmed in the factory
aungriah 0:3333b6066adf 291 */
aungriah 0:3333b6066adf 292 uint32 dwt_getpartid(void);
aungriah 0:3333b6066adf 293
aungriah 0:3333b6066adf 294 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 295 * @fn dwt_getlotid()
aungriah 0:3333b6066adf 296 *
aungriah 0:3333b6066adf 297 * @brief This is used to return the read lot ID of the device
aungriah 0:3333b6066adf 298 *
aungriah 0:3333b6066adf 299 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.
aungriah 0:3333b6066adf 300 *
aungriah 0:3333b6066adf 301 * input parameters
aungriah 0:3333b6066adf 302 *
aungriah 0:3333b6066adf 303 * output parameters
aungriah 0:3333b6066adf 304 *
aungriah 0:3333b6066adf 305 * returns the 32 bit lot ID value as programmed in the factory
aungriah 0:3333b6066adf 306 */
aungriah 0:3333b6066adf 307 uint32 dwt_getlotid(void);
aungriah 0:3333b6066adf 308
aungriah 0:3333b6066adf 309 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 310 * @fn dwt_readdevid()
aungriah 0:3333b6066adf 311 *
aungriah 0:3333b6066adf 312 * @brief This is used to return the read device type and revision information of the DW1000 device (MP part is 0xDECA0130)
aungriah 0:3333b6066adf 313 *
aungriah 0:3333b6066adf 314 * input parameters
aungriah 0:3333b6066adf 315 *
aungriah 0:3333b6066adf 316 * output parameters
aungriah 0:3333b6066adf 317 *
aungriah 0:3333b6066adf 318 * returns the read value which for DW1000 is 0xDECA0130
aungriah 0:3333b6066adf 319 */
aungriah 0:3333b6066adf 320 uint32 dwt_readdevid(void);
aungriah 0:3333b6066adf 321
aungriah 0:3333b6066adf 322 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 323 * @fn dwt_otprevision()
aungriah 0:3333b6066adf 324 *
aungriah 0:3333b6066adf 325 * @brief This is used to return the read OTP revision
aungriah 0:3333b6066adf 326 *
aungriah 0:3333b6066adf 327 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.
aungriah 0:3333b6066adf 328 *
aungriah 0:3333b6066adf 329 * input parameters
aungriah 0:3333b6066adf 330 *
aungriah 0:3333b6066adf 331 * output parameters
aungriah 0:3333b6066adf 332 *
aungriah 0:3333b6066adf 333 * returns the read OTP revision value
aungriah 0:3333b6066adf 334 */
aungriah 0:3333b6066adf 335 uint8 dwt_otprevision(void);
aungriah 0:3333b6066adf 336
aungriah 0:3333b6066adf 337 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 338 * @fn dwt_setfinegraintxseq()
aungriah 0:3333b6066adf 339 *
aungriah 0:3333b6066adf 340 * @brief This function enables/disables the fine grain TX sequencing (enabled by default).
aungriah 0:3333b6066adf 341 *
aungriah 0:3333b6066adf 342 * input parameters
aungriah 0:3333b6066adf 343 * @param enable - 1 to enable fine grain TX sequencing, 0 to disable it.
aungriah 0:3333b6066adf 344 *
aungriah 0:3333b6066adf 345 * output parameters none
aungriah 0:3333b6066adf 346 *
aungriah 0:3333b6066adf 347 * no return value
aungriah 0:3333b6066adf 348 */
aungriah 0:3333b6066adf 349 void dwt_setfinegraintxseq(int enable);
aungriah 0:3333b6066adf 350
aungriah 0:3333b6066adf 351 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 352 * @fn dwt_setlnapamode()
aungriah 0:3333b6066adf 353 *
aungriah 0:3333b6066adf 354 * @brief This is used to enable GPIO for external LNA or PA functionality - HW dependent, consult the DW1000 User Manual.
aungriah 0:3333b6066adf 355 * This can also be used for debug as enabling TX and RX GPIOs is quite handy to monitor DW1000's activity.
aungriah 0:3333b6066adf 356 *
aungriah 0:3333b6066adf 357 * NOTE: Enabling PA functionality requires that fine grain TX sequencing is deactivated. This can be done using
aungriah 0:3333b6066adf 358 * dwt_setfinegraintxseq().
aungriah 0:3333b6066adf 359 *
aungriah 0:3333b6066adf 360 * input parameters
aungriah 0:3333b6066adf 361 * @param lna - 1 to enable LNA functionality, 0 to disable it
aungriah 0:3333b6066adf 362 * @param pa - 1 to enable PA functionality, 0 to disable it
aungriah 0:3333b6066adf 363 *
aungriah 0:3333b6066adf 364 * output parameters
aungriah 0:3333b6066adf 365 *
aungriah 0:3333b6066adf 366 * no return value
aungriah 0:3333b6066adf 367 */
aungriah 0:3333b6066adf 368 void dwt_setlnapamode(int lna, int pa);
aungriah 0:3333b6066adf 369
aungriah 0:3333b6066adf 370 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 371 * @fn dwt_setgpiodirection()
aungriah 0:3333b6066adf 372 *
aungriah 0:3333b6066adf 373 * @brief This is used to set GPIO direction as an input (1) or output (0)
aungriah 0:3333b6066adf 374 *
aungriah 0:3333b6066adf 375 * input parameters
aungriah 0:3333b6066adf 376 * @param gpioNum - this is the GPIO to configure - see GxM0... GxM8 in the deca_regs.h file
aungriah 0:3333b6066adf 377 * @param direction - this sets the GPIO direction - see GxP0... GxP8 in the deca_regs.h file
aungriah 0:3333b6066adf 378 *
aungriah 0:3333b6066adf 379 * output parameters
aungriah 0:3333b6066adf 380 *
aungriah 0:3333b6066adf 381 * no return value
aungriah 0:3333b6066adf 382 */
aungriah 0:3333b6066adf 383 void dwt_setgpiodirection(uint32 gpioNum, uint32 direction);
aungriah 0:3333b6066adf 384
aungriah 0:3333b6066adf 385 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 386 * @fn dwt_setgpiovalue()
aungriah 0:3333b6066adf 387 *
aungriah 0:3333b6066adf 388 * @brief This is used to set GPIO value as (1) or (0) only applies if the GPIO is configured as output
aungriah 0:3333b6066adf 389 *
aungriah 0:3333b6066adf 390 * input parameters
aungriah 0:3333b6066adf 391 * @param gpioNum - this is the GPIO to configure - see GxM0... GxM8 in the deca_regs.h file
aungriah 0:3333b6066adf 392 * @param value - this sets the GPIO value - see GDP0... GDP8 in the deca_regs.h file
aungriah 0:3333b6066adf 393 *
aungriah 0:3333b6066adf 394 * output parameters
aungriah 0:3333b6066adf 395 *
aungriah 0:3333b6066adf 396 * no return value
aungriah 0:3333b6066adf 397 */
aungriah 0:3333b6066adf 398 void dwt_setgpiovalue(uint32 gpioNum, uint32 value);
aungriah 0:3333b6066adf 399
aungriah 0:3333b6066adf 400 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 401 * @fn dwt_initialise()
aungriah 0:3333b6066adf 402 *
aungriah 0:3333b6066adf 403 * @brief This function initiates communications with the DW1000 transceiver
aungriah 0:3333b6066adf 404 * and reads its DEV_ID register (address 0x00) to verify the IC is one supported
aungriah 0:3333b6066adf 405 * by this software (e.g. DW1000 32-bit device ID value is 0xDECA0130). Then it
aungriah 0:3333b6066adf 406 * does any initial once only device configurations needed for use and initialises
aungriah 0:3333b6066adf 407 * as necessary any static data items belonging to this low-level driver.
aungriah 0:3333b6066adf 408 *
aungriah 0:3333b6066adf 409 * NOTES:
aungriah 0:3333b6066adf 410 * 1.this function needs to be run before dwt_configuresleep, also the SPI frequency has to be < 3MHz
aungriah 0:3333b6066adf 411 * 2.it also reads and applies LDO tune and crystal trim values from OTP memory
aungriah 0:3333b6066adf 412 *
aungriah 0:3333b6066adf 413 * input parameters
aungriah 0:3333b6066adf 414 * @param config - specifies what configuration to load
aungriah 0:3333b6066adf 415 * DWT_LOADUCODE 0x1 - load the LDE microcode from ROM - enabled accurate RX timestamp
aungriah 0:3333b6066adf 416 * DWT_LOADNONE 0x0 - do not load any values from OTP memory
aungriah 0:3333b6066adf 417 *
aungriah 0:3333b6066adf 418 * output parameters
aungriah 0:3333b6066adf 419 *
aungriah 0:3333b6066adf 420 * returns DWT_SUCCESS for success, or DWT_ERROR for error
aungriah 0:3333b6066adf 421 */
aungriah 0:3333b6066adf 422 int dwt_initialise(uint16 config) ;
aungriah 0:3333b6066adf 423
aungriah 0:3333b6066adf 424 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 425 * @fn dwt_configure()
aungriah 0:3333b6066adf 426 *
aungriah 0:3333b6066adf 427 * @brief This function provides the main API for the configuration of the
aungriah 0:3333b6066adf 428 * DW1000 and this low-level driver. The input is a pointer to the data structure
aungriah 0:3333b6066adf 429 * of type dwt_config_t that holds all the configurable items.
aungriah 0:3333b6066adf 430 * The dwt_config_t structure shows which ones are supported
aungriah 0:3333b6066adf 431 *
aungriah 0:3333b6066adf 432 * input parameters
aungriah 0:3333b6066adf 433 * @param config - pointer to the configuration structure, which contains the device configuration data.
aungriah 0:3333b6066adf 434 *
aungriah 0:3333b6066adf 435 * output parameters
aungriah 0:3333b6066adf 436 *
aungriah 0:3333b6066adf 437 * no return value
aungriah 0:3333b6066adf 438 */
aungriah 0:3333b6066adf 439 void dwt_configure(dwt_config_t *config) ;
aungriah 0:3333b6066adf 440
aungriah 0:3333b6066adf 441 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 442 * @fn dwt_configuretxrf()
aungriah 0:3333b6066adf 443 *
aungriah 0:3333b6066adf 444 * @brief This function provides the API for the configuration of the TX spectrum
aungriah 0:3333b6066adf 445 * including the power and pulse generator delay. The input is a pointer to the data structure
aungriah 0:3333b6066adf 446 * of type dwt_txconfig_t that holds all the configurable items.
aungriah 0:3333b6066adf 447 *
aungriah 0:3333b6066adf 448 * input parameters
aungriah 0:3333b6066adf 449 * @param config - pointer to the txrf configuration structure, which contains the tx rf config data
aungriah 0:3333b6066adf 450 *
aungriah 0:3333b6066adf 451 * output parameters
aungriah 0:3333b6066adf 452 *
aungriah 0:3333b6066adf 453 * no return value
aungriah 0:3333b6066adf 454 */
aungriah 0:3333b6066adf 455 void dwt_configuretxrf(dwt_txconfig_t *config) ;
aungriah 0:3333b6066adf 456
aungriah 0:3333b6066adf 457 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 458 * @fn dwt_setrxantennadelay()
aungriah 0:3333b6066adf 459 *
aungriah 0:3333b6066adf 460 * @brief This API function writes the antenna delay (in time units) to RX registers
aungriah 0:3333b6066adf 461 *
aungriah 0:3333b6066adf 462 * input parameters:
aungriah 0:3333b6066adf 463 * @param rxDelay - this is the total (RX) antenna delay value, which
aungriah 0:3333b6066adf 464 * will be programmed into the RX register
aungriah 0:3333b6066adf 465 *
aungriah 0:3333b6066adf 466 * output parameters
aungriah 0:3333b6066adf 467 *
aungriah 0:3333b6066adf 468 * no return value
aungriah 0:3333b6066adf 469 */
aungriah 0:3333b6066adf 470 void dwt_setrxantennadelay(uint16 antennaDly);
aungriah 0:3333b6066adf 471
aungriah 0:3333b6066adf 472 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 473 * @fn dwt_settxantennadelay()
aungriah 0:3333b6066adf 474 *
aungriah 0:3333b6066adf 475 * @brief This API function writes the antenna delay (in time units) to TX registers
aungriah 0:3333b6066adf 476 *
aungriah 0:3333b6066adf 477 * input parameters:
aungriah 0:3333b6066adf 478 * @param txDelay - this is the total (TX) antenna delay value, which
aungriah 0:3333b6066adf 479 * will be programmed into the TX delay register
aungriah 0:3333b6066adf 480 *
aungriah 0:3333b6066adf 481 * output parameters
aungriah 0:3333b6066adf 482 *
aungriah 0:3333b6066adf 483 * no return value
aungriah 0:3333b6066adf 484 */
aungriah 0:3333b6066adf 485 void dwt_settxantennadelay(uint16 antennaDly);
aungriah 0:3333b6066adf 486
aungriah 0:3333b6066adf 487 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 488 * @fn dwt_setsmarttxpower()
aungriah 0:3333b6066adf 489 *
aungriah 0:3333b6066adf 490 * @brief This call enables or disables the smart TX power feature.
aungriah 0:3333b6066adf 491 *
aungriah 0:3333b6066adf 492 * input parameters
aungriah 0:3333b6066adf 493 * @param enable - this enables or disables the TX smart power (1 = enable, 0 = disable)
aungriah 0:3333b6066adf 494 *
aungriah 0:3333b6066adf 495 * output parameters
aungriah 0:3333b6066adf 496 *
aungriah 0:3333b6066adf 497 * no return value
aungriah 0:3333b6066adf 498 */
aungriah 0:3333b6066adf 499 void dwt_setsmarttxpower(int enable);
aungriah 0:3333b6066adf 500
aungriah 0:3333b6066adf 501 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 502 * @fn dwt_writetxdata()
aungriah 0:3333b6066adf 503 *
aungriah 0:3333b6066adf 504 * @brief This API function writes the supplied TX data into the DW1000's
aungriah 0:3333b6066adf 505 * TX buffer. The input parameters are the data length in bytes and a pointer
aungriah 0:3333b6066adf 506 * to those data bytes.
aungriah 0:3333b6066adf 507 *
aungriah 0:3333b6066adf 508 * input parameters
aungriah 0:3333b6066adf 509 * @param txFrameLength - This is the total frame length, including the two byte CRC.
aungriah 0:3333b6066adf 510 * Note: this is the length of TX message (including the 2 byte CRC) - max is 1023
aungriah 0:3333b6066adf 511 * standard PHR mode allows up to 127 bytes
aungriah 0:3333b6066adf 512 * if > 127 is programmed, DWT_PHRMODE_EXT needs to be set in the phrMode configuration
aungriah 0:3333b6066adf 513 * see dwt_configure function
aungriah 0:3333b6066adf 514 * @param txFrameBytes - Pointer to the user’s buffer containing the data to send.
aungriah 0:3333b6066adf 515 * @param txBufferOffset - This specifies an offset in the DW1000’s TX Buffer at which to start writing data.
aungriah 0:3333b6066adf 516 *
aungriah 0:3333b6066adf 517 * output parameters
aungriah 0:3333b6066adf 518 *
aungriah 0:3333b6066adf 519 * returns DWT_SUCCESS for success, or DWT_ERROR for error
aungriah 0:3333b6066adf 520 */
aungriah 0:3333b6066adf 521 int dwt_writetxdata(uint16 txFrameLength, uint8 *txFrameBytes, uint16 txBufferOffset) ;
aungriah 0:3333b6066adf 522
aungriah 0:3333b6066adf 523 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 524 * @fn dwt_writetxfctrl()
aungriah 0:3333b6066adf 525 *
aungriah 0:3333b6066adf 526 * @brief This API function configures the TX frame control register before the transmission of a frame
aungriah 0:3333b6066adf 527 *
aungriah 0:3333b6066adf 528 * input parameters:
aungriah 0:3333b6066adf 529 * @param txFrameLength - this is the length of TX message (including the 2 byte CRC) - max is 1023
aungriah 0:3333b6066adf 530 * NOTE: standard PHR mode allows up to 127 bytes
aungriah 0:3333b6066adf 531 * if > 127 is programmed, DWT_PHRMODE_EXT needs to be set in the phrMode configuration
aungriah 0:3333b6066adf 532 * see dwt_configure function
aungriah 0:3333b6066adf 533 * @param txBufferOffset - the offset in the tx buffer to start writing the data
aungriah 0:3333b6066adf 534 * @param ranging - 1 if this is a ranging frame, else 0
aungriah 0:3333b6066adf 535 *
aungriah 0:3333b6066adf 536 * output parameters
aungriah 0:3333b6066adf 537 *
aungriah 0:3333b6066adf 538 * no return value
aungriah 0:3333b6066adf 539 */
aungriah 0:3333b6066adf 540 void dwt_writetxfctrl(uint16 txFrameLength, uint16 txBufferOffset, int ranging);
aungriah 0:3333b6066adf 541
aungriah 0:3333b6066adf 542 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 543 * @fn dwt_starttx()
aungriah 0:3333b6066adf 544 *
aungriah 0:3333b6066adf 545 * @brief This call initiates the transmission, input parameter indicates which TX mode is used see below
aungriah 0:3333b6066adf 546 *
aungriah 0:3333b6066adf 547 * input parameters:
aungriah 0:3333b6066adf 548 * @param mode - if 0 immediate TX (no response expected)
aungriah 0:3333b6066adf 549 * if 1 delayed TX (no response expected)
aungriah 0:3333b6066adf 550 * if 2 immediate TX (response expected - so the receiver will be automatically turned on after TX is done)
aungriah 0:3333b6066adf 551 * if 3 delayed TX (response expected - so the receiver will be automatically turned on after TX is done)
aungriah 0:3333b6066adf 552 *
aungriah 0:3333b6066adf 553 * output parameters
aungriah 0:3333b6066adf 554 *
aungriah 0:3333b6066adf 555 * returns DWT_SUCCESS for success, or DWT_ERROR for error (e.g. a delayed transmission will fail if the delayed time has passed)
aungriah 0:3333b6066adf 556 */
aungriah 0:3333b6066adf 557 int dwt_starttx(uint8 mode) ;
aungriah 0:3333b6066adf 558
aungriah 0:3333b6066adf 559 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 560 * @fn dwt_setdelayedtrxtime()
aungriah 0:3333b6066adf 561 *
aungriah 0:3333b6066adf 562 * @brief This API function configures the delayed transmit time or the delayed RX on time
aungriah 0:3333b6066adf 563 *
aungriah 0:3333b6066adf 564 * input parameters
aungriah 0:3333b6066adf 565 * @param starttime - the TX/RX start time (the 32 bits should be the high 32 bits of the system time at which to send the message,
aungriah 0:3333b6066adf 566 * or at which to turn on the receiver)
aungriah 0:3333b6066adf 567 *
aungriah 0:3333b6066adf 568 * output parameters none
aungriah 0:3333b6066adf 569 *
aungriah 0:3333b6066adf 570 * no return value
aungriah 0:3333b6066adf 571 */
aungriah 0:3333b6066adf 572 void dwt_setdelayedtrxtime(uint32 starttime) ;
aungriah 0:3333b6066adf 573
aungriah 0:3333b6066adf 574 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 575 * @fn dwt_readtxtimestamp()
aungriah 0:3333b6066adf 576 *
aungriah 0:3333b6066adf 577 * @brief This is used to read the TX timestamp (adjusted with the programmed antenna delay)
aungriah 0:3333b6066adf 578 *
aungriah 0:3333b6066adf 579 * input parameters
aungriah 0:3333b6066adf 580 * @param timestamp - a pointer to a 5-byte buffer which will store the read TX timestamp time
aungriah 0:3333b6066adf 581 *
aungriah 0:3333b6066adf 582 * output parameters - the timestamp buffer will contain the value after the function call
aungriah 0:3333b6066adf 583 *
aungriah 0:3333b6066adf 584 * no return value
aungriah 0:3333b6066adf 585 */
aungriah 0:3333b6066adf 586 void dwt_readtxtimestamp(uint8 * timestamp);
aungriah 0:3333b6066adf 587
aungriah 0:3333b6066adf 588 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 589 * @fn dwt_readtxtimestamphi32()
aungriah 0:3333b6066adf 590 *
aungriah 0:3333b6066adf 591 * @brief This is used to read the high 32-bits of the TX timestamp (adjusted with the programmed antenna delay)
aungriah 0:3333b6066adf 592 *
aungriah 0:3333b6066adf 593 * input parameters
aungriah 0:3333b6066adf 594 *
aungriah 0:3333b6066adf 595 * output parameters
aungriah 0:3333b6066adf 596 *
aungriah 0:3333b6066adf 597 * returns high 32-bits of TX timestamp
aungriah 0:3333b6066adf 598 */
aungriah 0:3333b6066adf 599 uint32 dwt_readtxtimestamphi32(void);
aungriah 0:3333b6066adf 600
aungriah 0:3333b6066adf 601 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 602 * @fn dwt_readtxtimestamplo32()
aungriah 0:3333b6066adf 603 *
aungriah 0:3333b6066adf 604 * @brief This is used to read the low 32-bits of the TX timestamp (adjusted with the programmed antenna delay)
aungriah 0:3333b6066adf 605 *
aungriah 0:3333b6066adf 606 * input parameters
aungriah 0:3333b6066adf 607 *
aungriah 0:3333b6066adf 608 * output parameters
aungriah 0:3333b6066adf 609 *
aungriah 0:3333b6066adf 610 * returns low 32-bits of TX timestamp
aungriah 0:3333b6066adf 611 */
aungriah 0:3333b6066adf 612 uint32 dwt_readtxtimestamplo32(void);
aungriah 0:3333b6066adf 613
aungriah 0:3333b6066adf 614 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 615 * @fn dwt_readrxtimestamp()
aungriah 0:3333b6066adf 616 *
aungriah 0:3333b6066adf 617 * @brief This is used to read the RX timestamp (adjusted time of arrival)
aungriah 0:3333b6066adf 618 *
aungriah 0:3333b6066adf 619 * input parameters
aungriah 0:3333b6066adf 620 * @param timestamp - a pointer to a 5-byte buffer which will store the read RX timestamp time
aungriah 0:3333b6066adf 621 *
aungriah 0:3333b6066adf 622 * output parameters - the timestamp buffer will contain the value after the function call
aungriah 0:3333b6066adf 623 *
aungriah 0:3333b6066adf 624 * no return value
aungriah 0:3333b6066adf 625 */
aungriah 0:3333b6066adf 626 void dwt_readrxtimestamp(uint8 * timestamp);
aungriah 0:3333b6066adf 627
aungriah 0:3333b6066adf 628 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 629 * @fn dwt_readrxtimestamphi32()
aungriah 0:3333b6066adf 630 *
aungriah 0:3333b6066adf 631 * @brief This is used to read the high 32-bits of the RX timestamp (adjusted with the programmed antenna delay)
aungriah 0:3333b6066adf 632 *
aungriah 0:3333b6066adf 633 * input parameters
aungriah 0:3333b6066adf 634 *
aungriah 0:3333b6066adf 635 * output parameters
aungriah 0:3333b6066adf 636 *
aungriah 0:3333b6066adf 637 * returns high 32-bits of RX timestamp
aungriah 0:3333b6066adf 638 */
aungriah 0:3333b6066adf 639 uint32 dwt_readrxtimestamphi32(void);
aungriah 0:3333b6066adf 640
aungriah 0:3333b6066adf 641 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 642 * @fn dwt_readrxtimestamplo32()
aungriah 0:3333b6066adf 643 *
aungriah 0:3333b6066adf 644 * @brief This is used to read the low 32-bits of the RX timestamp (adjusted with the programmed antenna delay)
aungriah 0:3333b6066adf 645 *
aungriah 0:3333b6066adf 646 * input parameters
aungriah 0:3333b6066adf 647 *
aungriah 0:3333b6066adf 648 * output parameters
aungriah 0:3333b6066adf 649 *
aungriah 0:3333b6066adf 650 * returns low 32-bits of RX timestamp
aungriah 0:3333b6066adf 651 */
aungriah 0:3333b6066adf 652 uint32 dwt_readrxtimestamplo32(void);
aungriah 0:3333b6066adf 653
aungriah 0:3333b6066adf 654 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 655 * @fn dwt_readsystimestamphi32()
aungriah 0:3333b6066adf 656 *
aungriah 0:3333b6066adf 657 * @brief This is used to read the high 32-bits of the system time
aungriah 0:3333b6066adf 658 *
aungriah 0:3333b6066adf 659 * input parameters
aungriah 0:3333b6066adf 660 *
aungriah 0:3333b6066adf 661 * output parameters
aungriah 0:3333b6066adf 662 *
aungriah 0:3333b6066adf 663 * returns high 32-bits of system time timestamp
aungriah 0:3333b6066adf 664 */
aungriah 0:3333b6066adf 665 uint32 dwt_readsystimestamphi32(void);
aungriah 0:3333b6066adf 666
aungriah 0:3333b6066adf 667 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 668 * @fn dwt_readsystime()
aungriah 0:3333b6066adf 669 *
aungriah 0:3333b6066adf 670 * @brief This is used to read the system time
aungriah 0:3333b6066adf 671 *
aungriah 0:3333b6066adf 672 * input parameters
aungriah 0:3333b6066adf 673 * @param timestamp - a pointer to a 5-byte buffer which will store the read system time
aungriah 0:3333b6066adf 674 *
aungriah 0:3333b6066adf 675 * output parameters
aungriah 0:3333b6066adf 676 * @param timestamp - the timestamp buffer will contain the value after the function call
aungriah 0:3333b6066adf 677 *
aungriah 0:3333b6066adf 678 * no return value
aungriah 0:3333b6066adf 679 */
aungriah 0:3333b6066adf 680 void dwt_readsystime(uint8 * timestamp);
aungriah 0:3333b6066adf 681
aungriah 0:3333b6066adf 682 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 683 * @fn dwt_forcetrxoff()
aungriah 0:3333b6066adf 684 *
aungriah 0:3333b6066adf 685 * @brief This is used to turn off the transceiver
aungriah 0:3333b6066adf 686 *
aungriah 0:3333b6066adf 687 * input parameters
aungriah 0:3333b6066adf 688 *
aungriah 0:3333b6066adf 689 * output parameters
aungriah 0:3333b6066adf 690 *
aungriah 0:3333b6066adf 691 * no return value
aungriah 0:3333b6066adf 692 */
aungriah 0:3333b6066adf 693 void dwt_forcetrxoff(void);
aungriah 0:3333b6066adf 694
aungriah 0:3333b6066adf 695 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 696 * @fn dwt_syncrxbufptrs()
aungriah 0:3333b6066adf 697 *
aungriah 0:3333b6066adf 698 * @brief this function synchronizes rx buffer pointers
aungriah 0:3333b6066adf 699 * need to make sure that the host/IC buffer pointers are aligned before starting RX
aungriah 0:3333b6066adf 700 *
aungriah 0:3333b6066adf 701 * input parameters:
aungriah 0:3333b6066adf 702 *
aungriah 0:3333b6066adf 703 * output parameters
aungriah 0:3333b6066adf 704 *
aungriah 0:3333b6066adf 705 * no return value
aungriah 0:3333b6066adf 706 */
aungriah 0:3333b6066adf 707 void dwt_syncrxbufptrs(void);
aungriah 0:3333b6066adf 708
aungriah 0:3333b6066adf 709 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 710 * @fn dwt_rxenable()
aungriah 0:3333b6066adf 711 *
aungriah 0:3333b6066adf 712 * @brief This call turns on the receiver, can be immediate or delayed (depending on the mode parameter). In the case of a
aungriah 0:3333b6066adf 713 * "late" error the receiver will only be turned on if the DWT_IDLE_ON_DLY_ERR is not set.
aungriah 0:3333b6066adf 714 * The receiver will stay turned on, listening to any messages until
aungriah 0:3333b6066adf 715 * it either receives a good frame, an error (CRC, PHY header, Reed Solomon) or it times out (SFD, Preamble or Frame).
aungriah 0:3333b6066adf 716 *
aungriah 0:3333b6066adf 717 * input parameters
aungriah 0:3333b6066adf 718 * @param mode - this can be one of the following allowed values:
aungriah 0:3333b6066adf 719 *
aungriah 0:3333b6066adf 720 * DWT_START_RX_IMMEDIATE 0 used to enbale receiver immediately
aungriah 0:3333b6066adf 721 * DWT_START_RX_DELAYED 1 used to set up delayed RX, if "late" error triggers, then the RX will be enabled immediately
aungriah 0:3333b6066adf 722 * (DWT_START_RX_DELAYED | DWT_IDLE_ON_DLY_ERR) 3 used to disable re-enabling of receiver if delayed RX failed due to "late" error
aungriah 0:3333b6066adf 723 * (DWT_START_RX_IMMEDIATE | DWT_NO_SYNC_PTRS) 4 used to re-enable RX without trying to sync IC and host side buffer pointers, typically when
aungriah 0:3333b6066adf 724 * performing manual RX re-enabling in double buffering mode
aungriah 0:3333b6066adf 725 *
aungriah 0:3333b6066adf 726 * returns DWT_SUCCESS for success, or DWT_ERROR for error (e.g. a delayed receive enable will be too far in the future if delayed time has passed)
aungriah 0:3333b6066adf 727 */
aungriah 0:3333b6066adf 728 int dwt_rxenable(int mode);
aungriah 0:3333b6066adf 729
aungriah 0:3333b6066adf 730 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 731 * @fn dwt_setsniffmode()
aungriah 0:3333b6066adf 732 *
aungriah 0:3333b6066adf 733 * @brief enable/disable and configure SNIFF mode.
aungriah 0:3333b6066adf 734 *
aungriah 0:3333b6066adf 735 * SNIFF mode is a low-power reception mode where the receiver is sequenced on and off instead of being on all the time.
aungriah 0:3333b6066adf 736 * The time spent in each state (on/off) is specified through the parameters below.
aungriah 0:3333b6066adf 737 * See DW1000 User Manual section 4.5 "Low-Power SNIFF mode" for more details.
aungriah 0:3333b6066adf 738 *
aungriah 0:3333b6066adf 739 * input parameters:
aungriah 0:3333b6066adf 740 * @param enable - 1 to enable SNIFF mode, 0 to disable. When 0, all other parameters are not taken into account.
aungriah 0:3333b6066adf 741 * @param timeOn - duration of receiver ON phase, expressed in multiples of PAC size. The counter automatically adds 1 PAC
aungriah 0:3333b6066adf 742 * size to the value set. Min value that can be set is 1 (i.e. an ON time of 2 PAC size), max value is 15.
aungriah 0:3333b6066adf 743 * @param timeOff - duration of receiver OFF phase, expressed in multiples of 128/125 µs (~1 µs). Max value is 255.
aungriah 0:3333b6066adf 744 *
aungriah 0:3333b6066adf 745 * output parameters
aungriah 0:3333b6066adf 746 *
aungriah 0:3333b6066adf 747 * no return value
aungriah 0:3333b6066adf 748 */
aungriah 0:3333b6066adf 749 void dwt_setsniffmode(int enable, uint8 timeOn, uint8 timeOff);
aungriah 0:3333b6066adf 750
aungriah 0:3333b6066adf 751 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 752 * @fn dwt_setlowpowerlistening()
aungriah 0:3333b6066adf 753 *
aungriah 0:3333b6066adf 754 * @brief enable/disable low-power listening mode.
aungriah 0:3333b6066adf 755 *
aungriah 0:3333b6066adf 756 * Low-power listening is a feature whereby the DW1000 is predominantly in the SLEEP state but wakes periodically, (after
aungriah 0:3333b6066adf 757 * this "long sleep"), for a very short time to sample the air for a preamble sequence. This preamble sampling "listening"
aungriah 0:3333b6066adf 758 * phase is actually two reception phases separated by a "short sleep" time. See DW1000 User Manual section "Low-Power
aungriah 0:3333b6066adf 759 * Listening" for more details.
aungriah 0:3333b6066adf 760 *
aungriah 0:3333b6066adf 761 * NOTE: Before enabling low-power listening, the following functions have to be called to fully configure it:
aungriah 0:3333b6066adf 762 * - dwt_configuresleep() to configure long sleep phase. "mode" parameter should at least have DWT_PRESRV_SLEEP,
aungriah 0:3333b6066adf 763 * DWT_CONFIG and DWT_RX_EN set and "wake" parameter should at least have both DWT_WAKE_SLPCNT and DWT_SLP_EN set.
aungriah 0:3333b6066adf 764 * - dwt_calibratesleepcnt() and dwt_configuresleepcnt() to define the "long sleep" phase duration.
aungriah 0:3333b6066adf 765 * - dwt_setsnoozetime() to define the "short sleep" phase duration.
aungriah 0:3333b6066adf 766 * - dwt_setpreambledetecttimeout() to define the reception phases duration.
aungriah 0:3333b6066adf 767 * - dwt_setinterrupt() to activate RX good frame interrupt (DWT_INT_RFCG) only.
aungriah 0:3333b6066adf 768 * When configured, low-power listening mode can be triggered either by putting the DW1000 to sleep (using
aungriah 0:3333b6066adf 769 * dwt_entersleep()) or by activating reception (using dwt_rxenable()).
aungriah 0:3333b6066adf 770 *
aungriah 0:3333b6066adf 771 * Please refer to the low-power listening examples (examples 8a/8b accompanying the API distribution on Decawave's
aungriah 0:3333b6066adf 772 * website). They form a working example code that shows how to use low-power listening correctly.
aungriah 0:3333b6066adf 773 *
aungriah 0:3333b6066adf 774 * input parameters:
aungriah 0:3333b6066adf 775 * @param enable - 1 to enable low-power listening, 0 to disable.
aungriah 0:3333b6066adf 776 *
aungriah 0:3333b6066adf 777 * output parameters
aungriah 0:3333b6066adf 778 *
aungriah 0:3333b6066adf 779 * no return value
aungriah 0:3333b6066adf 780 */
aungriah 0:3333b6066adf 781 void dwt_setlowpowerlistening(int enable);
aungriah 0:3333b6066adf 782
aungriah 0:3333b6066adf 783 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 784 * @fn dwt_setsnoozetime()
aungriah 0:3333b6066adf 785 *
aungriah 0:3333b6066adf 786 * @brief Set duration of "short sleep" phase when in low-power listening mode.
aungriah 0:3333b6066adf 787 *
aungriah 0:3333b6066adf 788 * input parameters:
aungriah 0:3333b6066adf 789 * @param snooze_time - "short sleep" phase duration, expressed in multiples of 512/19.2 µs (~26.7 µs). The counter
aungriah 0:3333b6066adf 790 * automatically adds 1 to the value set. The smallest working value that should be set is 1,
aungriah 0:3333b6066adf 791 * i.e. giving a snooze time of 2 units (or ~53 µs).
aungriah 0:3333b6066adf 792 *
aungriah 0:3333b6066adf 793 * output parameters
aungriah 0:3333b6066adf 794 *
aungriah 0:3333b6066adf 795 * no return value
aungriah 0:3333b6066adf 796 */
aungriah 0:3333b6066adf 797 void dwt_setsnoozetime(uint8 snooze_time);
aungriah 0:3333b6066adf 798
aungriah 0:3333b6066adf 799 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 800 * @fn dwt_setdblrxbuffmode()
aungriah 0:3333b6066adf 801 *
aungriah 0:3333b6066adf 802 * @brief This call enables the double receive buffer mode
aungriah 0:3333b6066adf 803 *
aungriah 0:3333b6066adf 804 * input parameters
aungriah 0:3333b6066adf 805 * @param enable - 1 to enable, 0 to disable the double buffer mode
aungriah 0:3333b6066adf 806 *
aungriah 0:3333b6066adf 807 * output parameters
aungriah 0:3333b6066adf 808 *
aungriah 0:3333b6066adf 809 * no return value
aungriah 0:3333b6066adf 810 */
aungriah 0:3333b6066adf 811 void dwt_setdblrxbuffmode(int enable);
aungriah 0:3333b6066adf 812
aungriah 0:3333b6066adf 813 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 814 * @fn dwt_setrxtimeout()
aungriah 0:3333b6066adf 815 *
aungriah 0:3333b6066adf 816 * @brief This call enables RX timeout (SY_STAT_RFTO event)
aungriah 0:3333b6066adf 817 *
aungriah 0:3333b6066adf 818 * input parameters
aungriah 0:3333b6066adf 819 * @param time - how long the receiver remains on from the RX enable command
aungriah 0:3333b6066adf 820 * The time parameter used here is in 1.0256 us (512/499.2MHz) units
aungriah 0:3333b6066adf 821 * If set to 0 the timeout is disabled.
aungriah 0:3333b6066adf 822 *
aungriah 0:3333b6066adf 823 * output parameters
aungriah 0:3333b6066adf 824 *
aungriah 0:3333b6066adf 825 * no return value
aungriah 0:3333b6066adf 826 */
aungriah 0:3333b6066adf 827 void dwt_setrxtimeout(uint16 time);
aungriah 0:3333b6066adf 828
aungriah 0:3333b6066adf 829 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 830 * @fn dwt_setpreambledetecttimeout()
aungriah 0:3333b6066adf 831 *
aungriah 0:3333b6066adf 832 * @brief This call enables preamble timeout (SY_STAT_RXPTO event)
aungriah 0:3333b6066adf 833 *
aungriah 0:3333b6066adf 834 * input parameters
aungriah 0:3333b6066adf 835 * @param timeout - Preamble detection timeout, expressed in multiples of PAC size. The counter automatically adds 1 PAC
aungriah 0:3333b6066adf 836 * size to the value set. Min value that can be set is 1 (i.e. a timeout of 2 PAC size).
aungriah 0:3333b6066adf 837 *
aungriah 0:3333b6066adf 838 * output parameters
aungriah 0:3333b6066adf 839 *
aungriah 0:3333b6066adf 840 * no return value
aungriah 0:3333b6066adf 841 */
aungriah 0:3333b6066adf 842 void dwt_setpreambledetecttimeout(uint16 timeout);
aungriah 0:3333b6066adf 843
aungriah 0:3333b6066adf 844
aungriah 0:3333b6066adf 845 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 846 * @fn dwt_calibratesleepcnt()
aungriah 0:3333b6066adf 847 *
aungriah 0:3333b6066adf 848 * @brief calibrates the local oscillator as its frequency can vary between 7 and 13kHz depending on temp and voltage
aungriah 0:3333b6066adf 849 *
aungriah 0:3333b6066adf 850 * NOTE: this function needs to be run before dwt_configuresleepcnt, so that we know what the counter units are
aungriah 0:3333b6066adf 851 *
aungriah 0:3333b6066adf 852 * input parameters
aungriah 0:3333b6066adf 853 *
aungriah 0:3333b6066adf 854 * output parameters
aungriah 0:3333b6066adf 855 *
aungriah 0:3333b6066adf 856 * returns the number of XTAL/2 cycles per low-power oscillator cycle. LP OSC frequency = 19.2 MHz/return value
aungriah 0:3333b6066adf 857 */
aungriah 0:3333b6066adf 858 uint16 dwt_calibratesleepcnt(void);
aungriah 0:3333b6066adf 859
aungriah 0:3333b6066adf 860 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 861 * @fn dwt_configuresleepcnt()
aungriah 0:3333b6066adf 862 *
aungriah 0:3333b6066adf 863 * @brief sets the sleep counter to new value, this function programs the high 16-bits of the 28-bit counter
aungriah 0:3333b6066adf 864 *
aungriah 0:3333b6066adf 865 * NOTE: this function needs to be run before dwt_configuresleep, also the SPI frequency has to be < 3MHz
aungriah 0:3333b6066adf 866 *
aungriah 0:3333b6066adf 867 * input parameters
aungriah 0:3333b6066adf 868 * @param sleepcnt - this it value of the sleep counter to program
aungriah 0:3333b6066adf 869 *
aungriah 0:3333b6066adf 870 * output parameters
aungriah 0:3333b6066adf 871 *
aungriah 0:3333b6066adf 872 * no return value
aungriah 0:3333b6066adf 873 */
aungriah 0:3333b6066adf 874 void dwt_configuresleepcnt(uint16 sleepcnt);
aungriah 0:3333b6066adf 875
aungriah 0:3333b6066adf 876 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 877 * @fn dwt_configuresleep()
aungriah 0:3333b6066adf 878 *
aungriah 0:3333b6066adf 879 * @brief configures the device for both DEEP_SLEEP and SLEEP modes, and on-wake mode
aungriah 0:3333b6066adf 880 * i.e. before entering the sleep, the device should be programmed for TX or RX, then upon "waking up" the TX/RX settings
aungriah 0:3333b6066adf 881 * will be preserved and the device can immediately perform the desired action TX/RX
aungriah 0:3333b6066adf 882 *
aungriah 0:3333b6066adf 883 * NOTE: e.g. Tag operation - after deep sleep, the device needs to just load the TX buffer and send the frame
aungriah 0:3333b6066adf 884 *
aungriah 0:3333b6066adf 885 *
aungriah 0:3333b6066adf 886 * mode: the array and LDE code (OTP/ROM) and LDO tune, and set sleep persist
aungriah 0:3333b6066adf 887 * DWT_PRESRV_SLEEP 0x0100 - preserve sleep
aungriah 0:3333b6066adf 888 * DWT_LOADOPSET 0x0080 - load operating parameter set on wakeup
aungriah 0:3333b6066adf 889 * DWT_CONFIG 0x0040 - download the AON array into the HIF (configuration download)
aungriah 0:3333b6066adf 890 * DWT_LOADEUI 0x0008
aungriah 0:3333b6066adf 891 * DWT_GOTORX 0x0002
aungriah 0:3333b6066adf 892 * DWT_TANDV 0x0001
aungriah 0:3333b6066adf 893 *
aungriah 0:3333b6066adf 894 * wake: wake up parameters
aungriah 0:3333b6066adf 895 * DWT_XTAL_EN 0x10 - keep XTAL running during sleep
aungriah 0:3333b6066adf 896 * DWT_WAKE_SLPCNT 0x8 - wake up after sleep count
aungriah 0:3333b6066adf 897 * DWT_WAKE_CS 0x4 - wake up on chip select
aungriah 0:3333b6066adf 898 * DWT_WAKE_WK 0x2 - wake up on WAKEUP PIN
aungriah 0:3333b6066adf 899 * DWT_SLP_EN 0x1 - enable sleep/deep sleep functionality
aungriah 0:3333b6066adf 900 *
aungriah 0:3333b6066adf 901 * input parameters
aungriah 0:3333b6066adf 902 * @param mode - config on-wake parameters
aungriah 0:3333b6066adf 903 * @param wake - config wake up parameters
aungriah 0:3333b6066adf 904 *
aungriah 0:3333b6066adf 905 * output parameters
aungriah 0:3333b6066adf 906 *
aungriah 0:3333b6066adf 907 * no return value
aungriah 0:3333b6066adf 908 */
aungriah 0:3333b6066adf 909 void dwt_configuresleep(uint16 mode, uint8 wake);
aungriah 0:3333b6066adf 910
aungriah 0:3333b6066adf 911 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 912 * @fn dwt_entersleep()
aungriah 0:3333b6066adf 913 *
aungriah 0:3333b6066adf 914 * @brief This function puts the device into deep sleep or sleep. dwt_configuresleep() should be called first
aungriah 0:3333b6066adf 915 * to configure the sleep and on-wake/wake-up parameters
aungriah 0:3333b6066adf 916 *
aungriah 0:3333b6066adf 917 * input parameters
aungriah 0:3333b6066adf 918 *
aungriah 0:3333b6066adf 919 * output parameters
aungriah 0:3333b6066adf 920 *
aungriah 0:3333b6066adf 921 * no return value
aungriah 0:3333b6066adf 922 */
aungriah 0:3333b6066adf 923 void dwt_entersleep(void);
aungriah 0:3333b6066adf 924
aungriah 0:3333b6066adf 925 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 926 * @fn dwt_entersleepaftertx(int enable)
aungriah 0:3333b6066adf 927 *
aungriah 0:3333b6066adf 928 * @brief sets the auto TX to sleep bit. This means that after a frame
aungriah 0:3333b6066adf 929 * transmission the device will enter deep sleep mode. The dwt_configuresleep() function
aungriah 0:3333b6066adf 930 * needs to be called before this to configure the on-wake settings
aungriah 0:3333b6066adf 931 *
aungriah 0:3333b6066adf 932 * NOTE: the IRQ line has to be low/inactive (i.e. no pending events)
aungriah 0:3333b6066adf 933 *
aungriah 0:3333b6066adf 934 * input parameters
aungriah 0:3333b6066adf 935 * @param enable - 1 to configure the device to enter deep sleep after TX, 0 - disables the configuration
aungriah 0:3333b6066adf 936 *
aungriah 0:3333b6066adf 937 * output parameters
aungriah 0:3333b6066adf 938 *
aungriah 0:3333b6066adf 939 * no return value
aungriah 0:3333b6066adf 940 */
aungriah 0:3333b6066adf 941 void dwt_entersleepaftertx(int enable);
aungriah 0:3333b6066adf 942
aungriah 0:3333b6066adf 943 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 944 * @fn dwt_spicswakeup()
aungriah 0:3333b6066adf 945 *
aungriah 0:3333b6066adf 946 * @brief wake up the device from sleep mode using the SPI read,
aungriah 0:3333b6066adf 947 * the device will wake up on chip select line going low if the line is held low for at least 500us.
aungriah 0:3333b6066adf 948 * To define the length depending on the time one wants to hold
aungriah 0:3333b6066adf 949 * the chip select line low, use the following formula:
aungriah 0:3333b6066adf 950 *
aungriah 0:3333b6066adf 951 * length (bytes) = time (s) * byte_rate (Hz)
aungriah 0:3333b6066adf 952 *
aungriah 0:3333b6066adf 953 * where fastest byte_rate is spi_rate (Hz) / 8 if the SPI is sending the bytes back-to-back.
aungriah 0:3333b6066adf 954 * To save time and power, a system designer could determine byte_rate value more precisely.
aungriah 0:3333b6066adf 955 *
aungriah 0:3333b6066adf 956 * NOTE: Alternatively the device can be waken up with WAKE_UP pin if configured for that operation
aungriah 0:3333b6066adf 957 *
aungriah 0:3333b6066adf 958 * input parameters
aungriah 0:3333b6066adf 959 * @param buff - this is a pointer to the dummy buffer which will be used in the SPI read transaction used for the WAKE UP of the device
aungriah 0:3333b6066adf 960 * @param length - this is the length of the dummy buffer
aungriah 0:3333b6066adf 961 *
aungriah 0:3333b6066adf 962 * output parameters
aungriah 0:3333b6066adf 963 *
aungriah 0:3333b6066adf 964 * returns DWT_SUCCESS for success, or DWT_ERROR for error
aungriah 0:3333b6066adf 965 */
aungriah 0:3333b6066adf 966 int dwt_spicswakeup(uint8 *buff, uint16 length);
aungriah 0:3333b6066adf 967
aungriah 0:3333b6066adf 968 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 969 * @fn dwt_setcallbacks()
aungriah 0:3333b6066adf 970 *
aungriah 0:3333b6066adf 971 * @brief This function is used to register the different callbacks called when one of the corresponding event occurs.
aungriah 0:3333b6066adf 972 *
aungriah 0:3333b6066adf 973 * NOTE: Callbacks can be undefined (set to NULL). In this case, dwt_isr() will process the event as usual but the 'null'
aungriah 0:3333b6066adf 974 * callback will not be called.
aungriah 0:3333b6066adf 975 *
aungriah 0:3333b6066adf 976 * input parameters
aungriah 0:3333b6066adf 977 * @param cbTxDone - the pointer to the TX confirmation event callback function
aungriah 0:3333b6066adf 978 * @param cbRxOk - the pointer to the RX good frame event callback function
aungriah 0:3333b6066adf 979 * @param cbRxTo - the pointer to the RX timeout events callback function
aungriah 0:3333b6066adf 980 * @param cbRxErr - the pointer to the RX error events callback function
aungriah 0:3333b6066adf 981 *
aungriah 0:3333b6066adf 982 * output parameters
aungriah 0:3333b6066adf 983 *
aungriah 0:3333b6066adf 984 * no return value
aungriah 0:3333b6066adf 985 */
aungriah 0:3333b6066adf 986 void dwt_setcallbacks(dwt_cb_t cbTxDone, dwt_cb_t cbRxOk, dwt_cb_t cbRxTo, dwt_cb_t cbRxErr);
aungriah 0:3333b6066adf 987
aungriah 0:3333b6066adf 988 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 989 * @fn dwt_checkirq()
aungriah 0:3333b6066adf 990 *
aungriah 0:3333b6066adf 991 * @brief This function checks if the IRQ line is active - this is used instead of interrupt handler
aungriah 0:3333b6066adf 992 *
aungriah 0:3333b6066adf 993 * input parameters
aungriah 0:3333b6066adf 994 *
aungriah 0:3333b6066adf 995 * output parameters
aungriah 0:3333b6066adf 996 *
aungriah 0:3333b6066adf 997 * return value is 1 if the IRQS bit is set and 0 otherwise
aungriah 0:3333b6066adf 998 */
aungriah 0:3333b6066adf 999 uint8 dwt_checkirq(void);
aungriah 0:3333b6066adf 1000
aungriah 0:3333b6066adf 1001 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1002 * @fn dwt_isr()
aungriah 0:3333b6066adf 1003 *
aungriah 0:3333b6066adf 1004 * @brief This is the DW1000's general Interrupt Service Routine. It will process/report the following events:
aungriah 0:3333b6066adf 1005 * - RXFCG (through cbRxOk callback)
aungriah 0:3333b6066adf 1006 * - TXFRS (through cbTxDone callback)
aungriah 0:3333b6066adf 1007 * - RXRFTO/RXPTO (through cbRxTo callback)
aungriah 0:3333b6066adf 1008 * - RXPHE/RXFCE/RXRFSL/RXSFDTO/AFFREJ/LDEERR (through cbRxTo cbRxErr)
aungriah 0:3333b6066adf 1009 * For all events, corresponding interrupts are cleared and necessary resets are performed. In addition, in the RXFCG case,
aungriah 0:3333b6066adf 1010 * received frame information and frame control are read before calling the callback. If double buffering is activated, it
aungriah 0:3333b6066adf 1011 * will also toggle between reception buffers once the reception callback processing has ended.
aungriah 0:3333b6066adf 1012 *
aungriah 0:3333b6066adf 1013 * /!\ This version of the ISR supports double buffering but does not support automatic RX re-enabling!
aungriah 0:3333b6066adf 1014 *
aungriah 0:3333b6066adf 1015 * NOTE: In PC based system using (Cheetah or ARM) USB to SPI converter there can be no interrupts, however we still need something
aungriah 0:3333b6066adf 1016 * to take the place of it and operate in a polled way. In an embedded system this function should be configured to be triggered
aungriah 0:3333b6066adf 1017 * on any of the interrupts described above.
aungriah 0:3333b6066adf 1018
aungriah 0:3333b6066adf 1019 * input parameters
aungriah 0:3333b6066adf 1020 *
aungriah 0:3333b6066adf 1021 * output parameters
aungriah 0:3333b6066adf 1022 *
aungriah 0:3333b6066adf 1023 * no return value
aungriah 0:3333b6066adf 1024 */
aungriah 0:3333b6066adf 1025 void dwt_isr(void);
aungriah 0:3333b6066adf 1026
aungriah 0:3333b6066adf 1027 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1028 * @fn dwt_isr_lplisten()
aungriah 0:3333b6066adf 1029 *
aungriah 0:3333b6066adf 1030 * @brief This is the DW1000's Interrupt Service Routine to use when low-power listening scheme is implemented. It will
aungriah 0:3333b6066adf 1031 * only process/report the RXFCG event (through cbRxOk callback).
aungriah 0:3333b6066adf 1032 * It clears RXFCG interrupt and reads received frame information and frame control before calling the callback.
aungriah 0:3333b6066adf 1033 *
aungriah 0:3333b6066adf 1034 * /!\ This version of the ISR is designed for single buffering case only!
aungriah 0:3333b6066adf 1035 *
aungriah 0:3333b6066adf 1036 * input parameters
aungriah 0:3333b6066adf 1037 *
aungriah 0:3333b6066adf 1038 * output parameters
aungriah 0:3333b6066adf 1039 *
aungriah 0:3333b6066adf 1040 * no return value
aungriah 0:3333b6066adf 1041 */
aungriah 0:3333b6066adf 1042 void dwt_lowpowerlistenisr(void);
aungriah 0:3333b6066adf 1043
aungriah 0:3333b6066adf 1044 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1045 * @fn void dwt_setinterrupt()
aungriah 0:3333b6066adf 1046 *
aungriah 0:3333b6066adf 1047 * @brief This function enables the specified events to trigger an interrupt.
aungriah 0:3333b6066adf 1048 * The following events can be enabled:
aungriah 0:3333b6066adf 1049 * DWT_INT_TFRS 0x00000080 // frame sent
aungriah 0:3333b6066adf 1050 * DWT_INT_RFCG 0x00004000 // frame received with good CRC
aungriah 0:3333b6066adf 1051 * DWT_INT_RPHE 0x00001000 // receiver PHY header error
aungriah 0:3333b6066adf 1052 * DWT_INT_RFCE 0x00008000 // receiver CRC error
aungriah 0:3333b6066adf 1053 * DWT_INT_RFSL 0x00010000 // receiver sync loss error
aungriah 0:3333b6066adf 1054 * DWT_INT_RFTO 0x00020000 // frame wait timeout
aungriah 0:3333b6066adf 1055 * DWT_INT_RXPTO 0x00200000 // preamble detect timeout
aungriah 0:3333b6066adf 1056 * DWT_INT_SFDT 0x04000000 // SFD timeout
aungriah 0:3333b6066adf 1057 * DWT_INT_ARFE 0x20000000 // frame rejected (due to frame filtering configuration)
aungriah 0:3333b6066adf 1058 *
aungriah 0:3333b6066adf 1059 *
aungriah 0:3333b6066adf 1060 * input parameters:
aungriah 0:3333b6066adf 1061 * @param bitmask - sets the events which will generate interrupt
aungriah 0:3333b6066adf 1062 * @param enable - if set the interrupts are enabled else they are cleared
aungriah 0:3333b6066adf 1063 *
aungriah 0:3333b6066adf 1064 * output parameters
aungriah 0:3333b6066adf 1065 *
aungriah 0:3333b6066adf 1066 * no return value
aungriah 0:3333b6066adf 1067 */
aungriah 0:3333b6066adf 1068 void dwt_setinterrupt( uint32 bitmask, uint8 enable);
aungriah 0:3333b6066adf 1069
aungriah 0:3333b6066adf 1070 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1071 * @fn dwt_setpanid()
aungriah 0:3333b6066adf 1072 *
aungriah 0:3333b6066adf 1073 * @brief This is used to set the PAN ID
aungriah 0:3333b6066adf 1074 *
aungriah 0:3333b6066adf 1075 * input parameters
aungriah 0:3333b6066adf 1076 * @param panID - this is the PAN ID
aungriah 0:3333b6066adf 1077 *
aungriah 0:3333b6066adf 1078 * output parameters
aungriah 0:3333b6066adf 1079 *
aungriah 0:3333b6066adf 1080 * no return value
aungriah 0:3333b6066adf 1081 */
aungriah 0:3333b6066adf 1082 void dwt_setpanid(uint16 panID);
aungriah 0:3333b6066adf 1083
aungriah 0:3333b6066adf 1084 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1085 * @fn dwt_setaddress16()
aungriah 0:3333b6066adf 1086 *
aungriah 0:3333b6066adf 1087 * @brief This is used to set 16-bit (short) address
aungriah 0:3333b6066adf 1088 *
aungriah 0:3333b6066adf 1089 * input parameters
aungriah 0:3333b6066adf 1090 * @param shortAddress - this sets the 16 bit short address
aungriah 0:3333b6066adf 1091 *
aungriah 0:3333b6066adf 1092 * output parameters
aungriah 0:3333b6066adf 1093 *
aungriah 0:3333b6066adf 1094 * no return value
aungriah 0:3333b6066adf 1095 */
aungriah 0:3333b6066adf 1096 void dwt_setaddress16(uint16 shortAddress);
aungriah 0:3333b6066adf 1097
aungriah 0:3333b6066adf 1098 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1099 * @fn dwt_seteui()
aungriah 0:3333b6066adf 1100 *
aungriah 0:3333b6066adf 1101 * @brief This is used to set the EUI 64-bit (long) address
aungriah 0:3333b6066adf 1102 *
aungriah 0:3333b6066adf 1103 * input parameters
aungriah 0:3333b6066adf 1104 * @param eui64 - this is the pointer to a buffer that contains the 64bit address
aungriah 0:3333b6066adf 1105 *
aungriah 0:3333b6066adf 1106 * output parameters
aungriah 0:3333b6066adf 1107 *
aungriah 0:3333b6066adf 1108 * no return value
aungriah 0:3333b6066adf 1109 */
aungriah 0:3333b6066adf 1110 void dwt_seteui(uint8 *eui64);
aungriah 0:3333b6066adf 1111
aungriah 0:3333b6066adf 1112 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1113 * @fn dwt_geteui()
aungriah 0:3333b6066adf 1114 *
aungriah 0:3333b6066adf 1115 * @brief This is used to get the EUI 64-bit from the DW1000
aungriah 0:3333b6066adf 1116 *
aungriah 0:3333b6066adf 1117 * input parameters
aungriah 0:3333b6066adf 1118 * @param eui64 - this is the pointer to a buffer that will contain the read 64-bit EUI value
aungriah 0:3333b6066adf 1119 *
aungriah 0:3333b6066adf 1120 * output parameters
aungriah 0:3333b6066adf 1121 *
aungriah 0:3333b6066adf 1122 * no return value
aungriah 0:3333b6066adf 1123 */
aungriah 0:3333b6066adf 1124 void dwt_geteui(uint8 *eui64);
aungriah 0:3333b6066adf 1125
aungriah 0:3333b6066adf 1126 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1127 * @fn dwt_otpread()
aungriah 0:3333b6066adf 1128 *
aungriah 0:3333b6066adf 1129 * @brief This is used to read the OTP data from given address into provided array
aungriah 0:3333b6066adf 1130 *
aungriah 0:3333b6066adf 1131 * input parameters
aungriah 0:3333b6066adf 1132 * @param address - this is the OTP address to read from
aungriah 0:3333b6066adf 1133 * @param array - this is the pointer to the array into which to read the data
aungriah 0:3333b6066adf 1134 * @param length - this is the number of 32 bit words to read (array needs to be at least this length)
aungriah 0:3333b6066adf 1135 *
aungriah 0:3333b6066adf 1136 * output parameters
aungriah 0:3333b6066adf 1137 *
aungriah 0:3333b6066adf 1138 * no return value
aungriah 0:3333b6066adf 1139 */
aungriah 0:3333b6066adf 1140 void dwt_otpread(uint32 address, uint32 *array, uint8 length);
aungriah 0:3333b6066adf 1141
aungriah 0:3333b6066adf 1142 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1143 * @fn dwt_enableframefilter()
aungriah 0:3333b6066adf 1144 *
aungriah 0:3333b6066adf 1145 * @brief This is used to enable the frame filtering - (the default option is to
aungriah 0:3333b6066adf 1146 * accept any data and ACK frames with correct destination address
aungriah 0:3333b6066adf 1147 *
aungriah 0:3333b6066adf 1148 * input parameters
aungriah 0:3333b6066adf 1149 * @param - bitmask - enables/disables the frame filtering options according to
aungriah 0:3333b6066adf 1150 * DWT_FF_NOTYPE_EN 0x000 no frame types allowed
aungriah 0:3333b6066adf 1151 * DWT_FF_COORD_EN 0x002 behave as coordinator (can receive frames with no destination address (PAN ID has to match))
aungriah 0:3333b6066adf 1152 * DWT_FF_BEACON_EN 0x004 beacon frames allowed
aungriah 0:3333b6066adf 1153 * DWT_FF_DATA_EN 0x008 data frames allowed
aungriah 0:3333b6066adf 1154 * DWT_FF_ACK_EN 0x010 ack frames allowed
aungriah 0:3333b6066adf 1155 * DWT_FF_MAC_EN 0x020 mac control frames allowed
aungriah 0:3333b6066adf 1156 * DWT_FF_RSVD_EN 0x040 reserved frame types allowed
aungriah 0:3333b6066adf 1157 *
aungriah 0:3333b6066adf 1158 * output parameters
aungriah 0:3333b6066adf 1159 *
aungriah 0:3333b6066adf 1160 * no return value
aungriah 0:3333b6066adf 1161 */
aungriah 0:3333b6066adf 1162 void dwt_enableframefilter(uint16 bitmask);
aungriah 0:3333b6066adf 1163
aungriah 0:3333b6066adf 1164 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1165 * @fn dwt_enableautoack()
aungriah 0:3333b6066adf 1166 *
aungriah 0:3333b6066adf 1167 * @brief This call enables the auto-ACK feature. If the responseDelayTime (parameter) is 0, the ACK will be sent a.s.a.p.
aungriah 0:3333b6066adf 1168 * otherwise it will be sent with a programmed delay (in symbols), max is 255.
aungriah 0:3333b6066adf 1169 * NOTE: needs to have frame filtering enabled as well
aungriah 0:3333b6066adf 1170 *
aungriah 0:3333b6066adf 1171 * input parameters
aungriah 0:3333b6066adf 1172 * @param responseDelayTime - if non-zero the ACK is sent after this delay, max is 255.
aungriah 0:3333b6066adf 1173 *
aungriah 0:3333b6066adf 1174 * output parameters
aungriah 0:3333b6066adf 1175 *
aungriah 0:3333b6066adf 1176 * no return value
aungriah 0:3333b6066adf 1177 */
aungriah 0:3333b6066adf 1178 void dwt_enableautoack(uint8 responseDelayTime);
aungriah 0:3333b6066adf 1179
aungriah 0:3333b6066adf 1180 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1181 * @fn dwt_setrxaftertxdelay()
aungriah 0:3333b6066adf 1182 *
aungriah 0:3333b6066adf 1183 * @brief This sets the receiver turn on delay time after a transmission of a frame
aungriah 0:3333b6066adf 1184 *
aungriah 0:3333b6066adf 1185 * input parameters
aungriah 0:3333b6066adf 1186 * @param rxDelayTime - (20 bits) - the delay is in UWB microseconds
aungriah 0:3333b6066adf 1187 *
aungriah 0:3333b6066adf 1188 * output parameters
aungriah 0:3333b6066adf 1189 *
aungriah 0:3333b6066adf 1190 * no return value
aungriah 0:3333b6066adf 1191 */
aungriah 0:3333b6066adf 1192 void dwt_setrxaftertxdelay(uint32 rxDelayTime);
aungriah 0:3333b6066adf 1193
aungriah 0:3333b6066adf 1194 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1195 * @fn dwt_rxreset()
aungriah 0:3333b6066adf 1196 *
aungriah 0:3333b6066adf 1197 * @brief this function resets the receiver of the DW1000
aungriah 0:3333b6066adf 1198 *
aungriah 0:3333b6066adf 1199 * input parameters:
aungriah 0:3333b6066adf 1200 *
aungriah 0:3333b6066adf 1201 * output parameters
aungriah 0:3333b6066adf 1202 *
aungriah 0:3333b6066adf 1203 * no return value
aungriah 0:3333b6066adf 1204 */
aungriah 0:3333b6066adf 1205 void dwt_rxreset(void);
aungriah 0:3333b6066adf 1206
aungriah 0:3333b6066adf 1207 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1208 * @fn dwt_softreset()
aungriah 0:3333b6066adf 1209 *
aungriah 0:3333b6066adf 1210 * @brief this function resets the DW1000
aungriah 0:3333b6066adf 1211 *
aungriah 0:3333b6066adf 1212 * input parameters:
aungriah 0:3333b6066adf 1213 *
aungriah 0:3333b6066adf 1214 * output parameters
aungriah 0:3333b6066adf 1215 *
aungriah 0:3333b6066adf 1216 * no return value
aungriah 0:3333b6066adf 1217 */
aungriah 0:3333b6066adf 1218 void dwt_softreset(void) ;
aungriah 0:3333b6066adf 1219
aungriah 0:3333b6066adf 1220 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1221 * @fn dwt_readrxdata()
aungriah 0:3333b6066adf 1222 *
aungriah 0:3333b6066adf 1223 * @brief This is used to read the data from the RX buffer, from an offset location give by offset parameter
aungriah 0:3333b6066adf 1224 *
aungriah 0:3333b6066adf 1225 * input parameters
aungriah 0:3333b6066adf 1226 * @param buffer - the buffer into which the data will be read
aungriah 0:3333b6066adf 1227 * @param length - the length of data to read (in bytes)
aungriah 0:3333b6066adf 1228 * @param rxBufferOffset - the offset in the rx buffer from which to read the data
aungriah 0:3333b6066adf 1229 *
aungriah 0:3333b6066adf 1230 * output parameters
aungriah 0:3333b6066adf 1231 *
aungriah 0:3333b6066adf 1232 * no return value
aungriah 0:3333b6066adf 1233 */
aungriah 0:3333b6066adf 1234 void dwt_readrxdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset);
aungriah 0:3333b6066adf 1235
aungriah 0:3333b6066adf 1236 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1237 * @fn dwt_readaccdata()
aungriah 0:3333b6066adf 1238 *
aungriah 0:3333b6066adf 1239 * @brief This is used to read the data from the Accumulator buffer, from an offset location give by offset parameter
aungriah 0:3333b6066adf 1240 *
aungriah 0:3333b6066adf 1241 * NOTE: Because of an internal memory access delay when reading the accumulator the first octet output is a dummy octet
aungriah 0:3333b6066adf 1242 * that should be discarded. This is true no matter what sub-index the read begins at.
aungriah 0:3333b6066adf 1243 *
aungriah 0:3333b6066adf 1244 * input parameters
aungriah 0:3333b6066adf 1245 * @param buffer - the buffer into which the data will be read
aungriah 0:3333b6066adf 1246 * @param length - the length of data to read (in bytes)
aungriah 0:3333b6066adf 1247 * @param accOffset - the offset in the acc buffer from which to read the data
aungriah 0:3333b6066adf 1248 *
aungriah 0:3333b6066adf 1249 * output parameters
aungriah 0:3333b6066adf 1250 *
aungriah 0:3333b6066adf 1251 * no return value
aungriah 0:3333b6066adf 1252 */
aungriah 0:3333b6066adf 1253 void dwt_readaccdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset);
aungriah 0:3333b6066adf 1254
aungriah 0:3333b6066adf 1255 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1256 * @fn dwt_readdiagnostics()
aungriah 0:3333b6066adf 1257 *
aungriah 0:3333b6066adf 1258 * @brief this function reads the RX signal quality diagnostic data
aungriah 0:3333b6066adf 1259 *
aungriah 0:3333b6066adf 1260 * input parameters
aungriah 0:3333b6066adf 1261 * @param diagnostics - diagnostic structure pointer, this will contain the diagnostic data read from the DW1000
aungriah 0:3333b6066adf 1262 *
aungriah 0:3333b6066adf 1263 * output parameters
aungriah 0:3333b6066adf 1264 *
aungriah 0:3333b6066adf 1265 * no return value
aungriah 0:3333b6066adf 1266 */
aungriah 0:3333b6066adf 1267 void dwt_readdiagnostics(dwt_rxdiag_t * diagnostics);
aungriah 0:3333b6066adf 1268
aungriah 0:3333b6066adf 1269 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1270 * @fn dwt_loadopsettabfromotp()
aungriah 0:3333b6066adf 1271 *
aungriah 0:3333b6066adf 1272 * @brief This is used to select which Operational Parameter Set table to load from OTP memory
aungriah 0:3333b6066adf 1273 *
aungriah 0:3333b6066adf 1274 * input parameters
aungriah 0:3333b6066adf 1275 * @param ops_sel - Operational Parameter Set table to load:
aungriah 0:3333b6066adf 1276 * DWT_OPSET_64LEN = 0x0 - load the operational parameter set table for 64 length preamble configuration
aungriah 0:3333b6066adf 1277 * DWT_OPSET_TIGHT = 0x1 - load the operational parameter set table for tight xtal offsets (<1ppm)
aungriah 0:3333b6066adf 1278 * DWT_OPSET_DEFLT = 0x2 - load the default operational parameter set table (this is loaded from reset)
aungriah 0:3333b6066adf 1279 *
aungriah 0:3333b6066adf 1280 * output parameters
aungriah 0:3333b6066adf 1281 *
aungriah 0:3333b6066adf 1282 * no return value
aungriah 0:3333b6066adf 1283 */
aungriah 0:3333b6066adf 1284 void dwt_loadopsettabfromotp(uint8 ops_sel);
aungriah 0:3333b6066adf 1285
aungriah 0:3333b6066adf 1286 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1287 * @fn dwt_configeventcounters()
aungriah 0:3333b6066adf 1288 *
aungriah 0:3333b6066adf 1289 * @brief This is used to enable/disable the event counter in the IC
aungriah 0:3333b6066adf 1290 *
aungriah 0:3333b6066adf 1291 * input parameters
aungriah 0:3333b6066adf 1292 * @param - enable - 1 enables (and reset), 0 disables the event counters
aungriah 0:3333b6066adf 1293 * output parameters
aungriah 0:3333b6066adf 1294 *
aungriah 0:3333b6066adf 1295 * no return value
aungriah 0:3333b6066adf 1296 */
aungriah 0:3333b6066adf 1297 void dwt_configeventcounters(int enable);
aungriah 0:3333b6066adf 1298
aungriah 0:3333b6066adf 1299 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1300 * @fn dwt_readeventcounters()
aungriah 0:3333b6066adf 1301 *
aungriah 0:3333b6066adf 1302 * @brief This is used to read the event counters in the IC
aungriah 0:3333b6066adf 1303 *
aungriah 0:3333b6066adf 1304 * input parameters
aungriah 0:3333b6066adf 1305 * @param counters - pointer to the dwt_deviceentcnts_t structure which will hold the read data
aungriah 0:3333b6066adf 1306 *
aungriah 0:3333b6066adf 1307 * output parameters
aungriah 0:3333b6066adf 1308 *
aungriah 0:3333b6066adf 1309 * no return value
aungriah 0:3333b6066adf 1310 */
aungriah 0:3333b6066adf 1311 void dwt_readeventcounters(dwt_deviceentcnts_t *counters);
aungriah 0:3333b6066adf 1312
aungriah 0:3333b6066adf 1313 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1314 * @fn dwt_otpwriteandverify()
aungriah 0:3333b6066adf 1315 *
aungriah 0:3333b6066adf 1316 * @brief This is used to program 32-bit value into the DW1000 OTP memory.
aungriah 0:3333b6066adf 1317 *
aungriah 0:3333b6066adf 1318 * input parameters
aungriah 0:3333b6066adf 1319 * @param value - this is the 32-bit value to be programmed into OTP
aungriah 0:3333b6066adf 1320 * @param address - this is the 16-bit OTP address into which the 32-bit value is programmed
aungriah 0:3333b6066adf 1321 *
aungriah 0:3333b6066adf 1322 * output parameters
aungriah 0:3333b6066adf 1323 *
aungriah 0:3333b6066adf 1324 * returns DWT_SUCCESS for success, or DWT_ERROR for error
aungriah 0:3333b6066adf 1325 */
aungriah 0:3333b6066adf 1326 uint32 dwt_otpwriteandverify(uint32 value, uint16 address);
aungriah 0:3333b6066adf 1327
aungriah 0:3333b6066adf 1328 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1329 * @fn dwt_setleds()
aungriah 0:3333b6066adf 1330 *
aungriah 0:3333b6066adf 1331 * @brief This is used to set up Tx/Rx GPIOs which could be used to control LEDs
aungriah 0:3333b6066adf 1332 * Note: not completely IC dependent, also needs board with LEDS fitted on right I/O lines
aungriah 0:3333b6066adf 1333 * this function enables GPIOs 2 and 3 which are connected to LED3 and LED4 on EVB1000
aungriah 0:3333b6066adf 1334 *
aungriah 0:3333b6066adf 1335 * input parameters
aungriah 0:3333b6066adf 1336 * @param mode - this is a bit field interpreted as follows:
aungriah 0:3333b6066adf 1337 * - bit 0: 1 to enable LEDs, 0 to disable them
aungriah 0:3333b6066adf 1338 * - bit 1: 1 to make LEDs blink once on init. Only valid if bit 0 is set (enable LEDs)
aungriah 0:3333b6066adf 1339 * - bit 2 to 7: reserved
aungriah 0:3333b6066adf 1340 *
aungriah 0:3333b6066adf 1341 * output parameters none
aungriah 0:3333b6066adf 1342 *
aungriah 0:3333b6066adf 1343 * no return value
aungriah 0:3333b6066adf 1344 */
aungriah 0:3333b6066adf 1345 void dwt_setleds(uint8 mode);
aungriah 0:3333b6066adf 1346
aungriah 0:3333b6066adf 1347 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1348 * @fn dwt_setxtaltrim()
aungriah 0:3333b6066adf 1349 *
aungriah 0:3333b6066adf 1350 * @brief This is used to adjust the crystal frequency
aungriah 0:3333b6066adf 1351 *
aungriah 0:3333b6066adf 1352 * input parameters:
aungriah 0:3333b6066adf 1353 * @param value - crystal trim value (in range 0x0 to 0x1F) 31 steps (~1.5ppm per step)
aungriah 0:3333b6066adf 1354 *
aungriah 0:3333b6066adf 1355 * output parameters
aungriah 0:3333b6066adf 1356 *
aungriah 0:3333b6066adf 1357 * no return value
aungriah 0:3333b6066adf 1358 */
aungriah 0:3333b6066adf 1359 void dwt_setxtaltrim(uint8 value);
aungriah 0:3333b6066adf 1360
aungriah 0:3333b6066adf 1361 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1362 * @fn dwt_getinitxtaltrim()
aungriah 0:3333b6066adf 1363 *
aungriah 0:3333b6066adf 1364 * @brief This function returns the value of XTAL trim that has been applied during initialisation (dwt_init). This can
aungriah 0:3333b6066adf 1365 * be either the value read in OTP memory or a default value.
aungriah 0:3333b6066adf 1366 *
aungriah 0:3333b6066adf 1367 * NOTE: The value returned by this function is the initial value only! It is not updated on dwt_setxtaltrim calls.
aungriah 0:3333b6066adf 1368 *
aungriah 0:3333b6066adf 1369 * input parameters
aungriah 0:3333b6066adf 1370 *
aungriah 0:3333b6066adf 1371 * output parameters
aungriah 0:3333b6066adf 1372 *
aungriah 0:3333b6066adf 1373 * returns the XTAL trim value set upon initialisation
aungriah 0:3333b6066adf 1374 */
aungriah 0:3333b6066adf 1375 uint8 dwt_getinitxtaltrim(void);
aungriah 0:3333b6066adf 1376
aungriah 0:3333b6066adf 1377 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1378 * @fn dwt_configcwmode()
aungriah 0:3333b6066adf 1379 *
aungriah 0:3333b6066adf 1380 * @brief this function sets the DW1000 to transmit cw signal at specific channel frequency
aungriah 0:3333b6066adf 1381 *
aungriah 0:3333b6066adf 1382 * input parameters:
aungriah 0:3333b6066adf 1383 * @param chan - specifies the operating channel (e.g. 1, 2, 3, 4, 5, 6 or 7)
aungriah 0:3333b6066adf 1384 *
aungriah 0:3333b6066adf 1385 * output parameters
aungriah 0:3333b6066adf 1386 *
aungriah 0:3333b6066adf 1387 * no return value
aungriah 0:3333b6066adf 1388 */
aungriah 0:3333b6066adf 1389 void dwt_configcwmode(uint8 chan);
aungriah 0:3333b6066adf 1390
aungriah 0:3333b6066adf 1391 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1392 * @fn dwt_configcontinuousframemode()
aungriah 0:3333b6066adf 1393 *
aungriah 0:3333b6066adf 1394 * @brief this function sets the DW1000 to continuous tx frame mode for regulatory approvals testing.
aungriah 0:3333b6066adf 1395 *
aungriah 0:3333b6066adf 1396 * input parameters:
aungriah 0:3333b6066adf 1397 * @param framerepetitionrate - This is a 32-bit value that is used to set the interval between transmissions.
aungriah 0:3333b6066adf 1398 * The minimum value is 4. The units are approximately 8 ns. (or more precisely 512/(499.2e6*128) seconds)).
aungriah 0:3333b6066adf 1399 *
aungriah 0:3333b6066adf 1400 * output parameters
aungriah 0:3333b6066adf 1401 *
aungriah 0:3333b6066adf 1402 * no return value
aungriah 0:3333b6066adf 1403 */
aungriah 0:3333b6066adf 1404 void dwt_configcontinuousframemode(uint32 framerepetitionrate);
aungriah 0:3333b6066adf 1405
aungriah 0:3333b6066adf 1406 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1407 * @fn dwt_readtempvbat()
aungriah 0:3333b6066adf 1408 *
aungriah 0:3333b6066adf 1409 * @brief this function reads the battery voltage and temperature of the MP
aungriah 0:3333b6066adf 1410 * The values read here will be the current values sampled by DW1000 AtoD converters.
aungriah 0:3333b6066adf 1411 * Note on Temperature: the temperature value needs to be converted to give the real temperature
aungriah 0:3333b6066adf 1412 * the formula is: 1.13 * reading - 113.0
aungriah 0:3333b6066adf 1413 * Note on Voltage: the voltage value needs to be converted to give the real voltage
aungriah 0:3333b6066adf 1414 * the formula is: 0.0057 * reading + 2.3
aungriah 0:3333b6066adf 1415 *
aungriah 0:3333b6066adf 1416 * NB: To correctly read the temperature this read should be done with xtal clock
aungriah 0:3333b6066adf 1417 * however that means that the receiver will be switched off, if receiver needs to be on then
aungriah 0:3333b6066adf 1418 * the timer is used to make sure the value is stable before reading
aungriah 0:3333b6066adf 1419 *
aungriah 0:3333b6066adf 1420 * input parameters:
aungriah 0:3333b6066adf 1421 * @param fastSPI - set to 1 if SPI rate > than 3MHz is used
aungriah 0:3333b6066adf 1422 *
aungriah 0:3333b6066adf 1423 * output parameters
aungriah 0:3333b6066adf 1424 *
aungriah 0:3333b6066adf 1425 * returns (temp_raw<<8)|(vbat_raw)
aungriah 0:3333b6066adf 1426 */
aungriah 0:3333b6066adf 1427 uint16 dwt_readtempvbat(uint8 fastSPI);
aungriah 0:3333b6066adf 1428
aungriah 0:3333b6066adf 1429 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1430 * @fn dwt_readwakeuptemp()
aungriah 0:3333b6066adf 1431 *
aungriah 0:3333b6066adf 1432 * @brief this function reads the temperature of the DW1000 that was sampled
aungriah 0:3333b6066adf 1433 * on waking from Sleep/Deepsleep. They are not current values, but read on last
aungriah 0:3333b6066adf 1434 * wakeup if DWT_TANDV bit is set in mode parameter of dwt_configuresleep
aungriah 0:3333b6066adf 1435 *
aungriah 0:3333b6066adf 1436 * input parameters:
aungriah 0:3333b6066adf 1437 *
aungriah 0:3333b6066adf 1438 * output parameters:
aungriah 0:3333b6066adf 1439 *
aungriah 0:3333b6066adf 1440 * returns: 8-bit raw temperature sensor value
aungriah 0:3333b6066adf 1441 */
aungriah 0:3333b6066adf 1442 uint8 dwt_readwakeuptemp(void) ;
aungriah 0:3333b6066adf 1443
aungriah 0:3333b6066adf 1444 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1445 * @fn dwt_readwakeupvbat()
aungriah 0:3333b6066adf 1446 *
aungriah 0:3333b6066adf 1447 * @brief this function reads the battery voltage of the DW1000 that was sampled
aungriah 0:3333b6066adf 1448 * on waking from Sleep/Deepsleep. They are not current values, but read on last
aungriah 0:3333b6066adf 1449 * wakeup if DWT_TANDV bit is set in mode parameter of dwt_configuresleep
aungriah 0:3333b6066adf 1450 *
aungriah 0:3333b6066adf 1451 * input parameters:
aungriah 0:3333b6066adf 1452 *
aungriah 0:3333b6066adf 1453 * output parameters:
aungriah 0:3333b6066adf 1454 *
aungriah 0:3333b6066adf 1455 * returns: 8-bit raw battery voltage sensor value
aungriah 0:3333b6066adf 1456 */
aungriah 0:3333b6066adf 1457 uint8 dwt_readwakeupvbat(void) ;
aungriah 0:3333b6066adf 1458
aungriah 0:3333b6066adf 1459 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1460 * @fn dwt_writetodevice()
aungriah 0:3333b6066adf 1461 *
aungriah 0:3333b6066adf 1462 * @brief this function is used to write to the DW1000 device registers
aungriah 0:3333b6066adf 1463 * Notes:
aungriah 0:3333b6066adf 1464 * 1. Firstly we create a header (the first byte is a header byte)
aungriah 0:3333b6066adf 1465 * a. check if sub index is used, if subindexing is used - set bit-6 to 1 to signify that the sub-index address follows the register index byte
aungriah 0:3333b6066adf 1466 * b. set bit-7 (or with 0x80) for write operation
aungriah 0:3333b6066adf 1467 * c. if extended sub address index is used (i.e. if index > 127) set bit-7 of the first sub-index byte following the first header byte
aungriah 0:3333b6066adf 1468 *
aungriah 0:3333b6066adf 1469 * 2. Write the header followed by the data bytes to the DW1000 device
aungriah 0:3333b6066adf 1470 *
aungriah 0:3333b6066adf 1471 *
aungriah 0:3333b6066adf 1472 * input parameters:
aungriah 0:3333b6066adf 1473 * @param recordNumber - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1474 * @param index - byte index into register file or buffer being accessed
aungriah 0:3333b6066adf 1475 * @param length - number of bytes being written
aungriah 0:3333b6066adf 1476 * @param buffer - pointer to buffer containing the 'length' bytes to be written
aungriah 0:3333b6066adf 1477 *
aungriah 0:3333b6066adf 1478 * output parameters
aungriah 0:3333b6066adf 1479 *
aungriah 0:3333b6066adf 1480 * no return value
aungriah 0:3333b6066adf 1481 */
aungriah 0:3333b6066adf 1482 void dwt_writetodevice
aungriah 0:3333b6066adf 1483 (
aungriah 0:3333b6066adf 1484 uint16 recordNumber, // input parameter - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1485 uint16 index, // input parameter - byte index into register file or buffer being accessed
aungriah 0:3333b6066adf 1486 uint32 length, // input parameter - number of bytes being written
aungriah 0:3333b6066adf 1487 const uint8 *buffer // input parameter - pointer to buffer containing the 'length' bytes to be written
aungriah 0:3333b6066adf 1488 ) ;
aungriah 0:3333b6066adf 1489
aungriah 0:3333b6066adf 1490 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1491 * @fn dwt_readfromdevice()
aungriah 0:3333b6066adf 1492 *
aungriah 0:3333b6066adf 1493 * @brief this function is used to read from the DW1000 device registers
aungriah 0:3333b6066adf 1494 * Notes:
aungriah 0:3333b6066adf 1495 * 1. Firstly we create a header (the first byte is a header byte)
aungriah 0:3333b6066adf 1496 * a. check if sub index is used, if subindexing is used - set bit-6 to 1 to signify that the sub-index address follows the register index byte
aungriah 0:3333b6066adf 1497 * b. set bit-7 (or with 0x80) for write operation
aungriah 0:3333b6066adf 1498 * c. if extended sub address index is used (i.e. if index > 127) set bit-7 of the first sub-index byte following the first header byte
aungriah 0:3333b6066adf 1499 *
aungriah 0:3333b6066adf 1500 * 2. Write the header followed by the data bytes to the DW1000 device
aungriah 0:3333b6066adf 1501 * 3. Store the read data in the input buffer
aungriah 0:3333b6066adf 1502 *
aungriah 0:3333b6066adf 1503 * input parameters:
aungriah 0:3333b6066adf 1504 * @param recordNumber - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1505 * @param index - byte index into register file or buffer being accessed
aungriah 0:3333b6066adf 1506 * @param length - number of bytes being read
aungriah 0:3333b6066adf 1507 * @param buffer - pointer to buffer in which to return the read data.
aungriah 0:3333b6066adf 1508 *
aungriah 0:3333b6066adf 1509 * output parameters
aungriah 0:3333b6066adf 1510 *
aungriah 0:3333b6066adf 1511 * no return value
aungriah 0:3333b6066adf 1512 */
aungriah 0:3333b6066adf 1513 void dwt_readfromdevice
aungriah 0:3333b6066adf 1514 (
aungriah 0:3333b6066adf 1515 uint16 recordNumber, // input parameter - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1516 uint16 index, // input parameter - byte index into register file or buffer being accessed
aungriah 0:3333b6066adf 1517 uint32 length, // input parameter - number of bytes being read
aungriah 0:3333b6066adf 1518 uint8 *buffer // input parameter - pointer to buffer in which to return the read data.
aungriah 0:3333b6066adf 1519 ) ;
aungriah 0:3333b6066adf 1520
aungriah 0:3333b6066adf 1521 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1522 * @fn dwt_read32bitoffsetreg()
aungriah 0:3333b6066adf 1523 *
aungriah 0:3333b6066adf 1524 * @brief this function is used to read 32-bit value from the DW1000 device registers
aungriah 0:3333b6066adf 1525 *
aungriah 0:3333b6066adf 1526 * input parameters:
aungriah 0:3333b6066adf 1527 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1528 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1529 *
aungriah 0:3333b6066adf 1530 * output parameters
aungriah 0:3333b6066adf 1531 *
aungriah 0:3333b6066adf 1532 * returns 32 bit register value
aungriah 0:3333b6066adf 1533 */
aungriah 0:3333b6066adf 1534 uint32 dwt_read32bitoffsetreg(int regFileID, int regOffset) ;
aungriah 0:3333b6066adf 1535
aungriah 0:3333b6066adf 1536 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1537 * @fn dwt_write32bitoffsetreg()
aungriah 0:3333b6066adf 1538 *
aungriah 0:3333b6066adf 1539 * @brief this function is used to write 32-bit value to the DW1000 device registers
aungriah 0:3333b6066adf 1540 *
aungriah 0:3333b6066adf 1541 * input parameters:
aungriah 0:3333b6066adf 1542 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1543 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1544 * @param regval - the value to write
aungriah 0:3333b6066adf 1545 *
aungriah 0:3333b6066adf 1546 * output parameters
aungriah 0:3333b6066adf 1547 *
aungriah 0:3333b6066adf 1548 * no return value
aungriah 0:3333b6066adf 1549 */
aungriah 0:3333b6066adf 1550 void dwt_write32bitoffsetreg(int regFileID, int regOffset, uint32 regval);
aungriah 0:3333b6066adf 1551
aungriah 0:3333b6066adf 1552 #define dwt_write32bitreg(x,y) dwt_write32bitoffsetreg(x,0,y)
aungriah 0:3333b6066adf 1553 #define dwt_read32bitreg(x) dwt_read32bitoffsetreg(x,0)
aungriah 0:3333b6066adf 1554
aungriah 0:3333b6066adf 1555 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1556 * @fn dwt_read16bitoffsetreg()
aungriah 0:3333b6066adf 1557 *
aungriah 0:3333b6066adf 1558 * @brief this function is used to read 16-bit value from the DW1000 device registers
aungriah 0:3333b6066adf 1559 *
aungriah 0:3333b6066adf 1560 * input parameters:
aungriah 0:3333b6066adf 1561 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1562 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1563 *
aungriah 0:3333b6066adf 1564 * output parameters
aungriah 0:3333b6066adf 1565 *
aungriah 0:3333b6066adf 1566 * returns 16 bit register value
aungriah 0:3333b6066adf 1567 */
aungriah 0:3333b6066adf 1568 uint16 dwt_read16bitoffsetreg(int regFileID, int regOffset);
aungriah 0:3333b6066adf 1569
aungriah 0:3333b6066adf 1570 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1571 * @fn dwt_write16bitoffsetreg()
aungriah 0:3333b6066adf 1572 *
aungriah 0:3333b6066adf 1573 * @brief this function is used to write 16-bit value to the DW1000 device registers
aungriah 0:3333b6066adf 1574 *
aungriah 0:3333b6066adf 1575 * input parameters:
aungriah 0:3333b6066adf 1576 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1577 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1578 * @param regval - the value to write
aungriah 0:3333b6066adf 1579 *
aungriah 0:3333b6066adf 1580 * output parameters
aungriah 0:3333b6066adf 1581 *
aungriah 0:3333b6066adf 1582 * no return value
aungriah 0:3333b6066adf 1583 */
aungriah 0:3333b6066adf 1584 void dwt_write16bitoffsetreg(int regFileID, int regOffset, uint16 regval) ;
aungriah 0:3333b6066adf 1585
aungriah 0:3333b6066adf 1586 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1587 * @fn dwt_read8bitoffsetreg()
aungriah 0:3333b6066adf 1588 *
aungriah 0:3333b6066adf 1589 * @brief this function is used to read an 8-bit value from the DW1000 device registers
aungriah 0:3333b6066adf 1590 *
aungriah 0:3333b6066adf 1591 * input parameters:
aungriah 0:3333b6066adf 1592 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1593 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1594 *
aungriah 0:3333b6066adf 1595 * output parameters
aungriah 0:3333b6066adf 1596 *
aungriah 0:3333b6066adf 1597 * returns 8-bit register value
aungriah 0:3333b6066adf 1598 */
aungriah 0:3333b6066adf 1599 uint8 dwt_read8bitoffsetreg(int regFileID, int regOffset);
aungriah 0:3333b6066adf 1600
aungriah 0:3333b6066adf 1601 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1602 * @fn dwt_write8bitoffsetreg()
aungriah 0:3333b6066adf 1603 *
aungriah 0:3333b6066adf 1604 * @brief this function is used to write an 8-bit value to the DW1000 device registers
aungriah 0:3333b6066adf 1605 *
aungriah 0:3333b6066adf 1606 * input parameters:
aungriah 0:3333b6066adf 1607 * @param regFileID - ID of register file or buffer being accessed
aungriah 0:3333b6066adf 1608 * @param regOffset - the index into register file or buffer being accessed
aungriah 0:3333b6066adf 1609 * @param regval - the value to write
aungriah 0:3333b6066adf 1610 *
aungriah 0:3333b6066adf 1611 * output parameters
aungriah 0:3333b6066adf 1612 *
aungriah 0:3333b6066adf 1613 * no return value
aungriah 0:3333b6066adf 1614 */
aungriah 0:3333b6066adf 1615 void dwt_write8bitoffsetreg(int regFileID, int regOffset, uint8 regval);
aungriah 0:3333b6066adf 1616
aungriah 0:3333b6066adf 1617
aungriah 0:3333b6066adf 1618 /****************************************************************************************************************************************************
aungriah 0:3333b6066adf 1619 *
aungriah 0:3333b6066adf 1620 * Declaration of platform-dependent lower level functions.
aungriah 0:3333b6066adf 1621 *
aungriah 0:3333b6066adf 1622 ****************************************************************************************************************************************************/
aungriah 0:3333b6066adf 1623
aungriah 0:3333b6066adf 1624
aungriah 0:3333b6066adf 1625 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1626 * @fn writetospi()
aungriah 0:3333b6066adf 1627 *
aungriah 0:3333b6066adf 1628 * @brief
aungriah 0:3333b6066adf 1629 * NB: In porting this to a particular microprocessor, the implementer needs to define the two low
aungriah 0:3333b6066adf 1630 * level abstract functions to write to and read from the SPI the definitions should be in deca_spi.c file.
aungriah 0:3333b6066adf 1631 * Low level abstract function to write to the SPI
aungriah 0:3333b6066adf 1632 * Takes two separate byte buffers for write header and write data
aungriah 0:3333b6066adf 1633 * returns 0 for success, or -1 for error
aungriah 0:3333b6066adf 1634 *
aungriah 0:3333b6066adf 1635 * Note: The body of this function is defined in deca_spi.c and is platform specific
aungriah 0:3333b6066adf 1636 *
aungriah 0:3333b6066adf 1637 * input parameters:
aungriah 0:3333b6066adf 1638 * @param headerLength - number of bytes header being written
aungriah 0:3333b6066adf 1639 * @param headerBuffer - pointer to buffer containing the 'headerLength' bytes of header to be written
aungriah 0:3333b6066adf 1640 * @param bodylength - number of bytes data being written
aungriah 0:3333b6066adf 1641 * @param bodyBuffer - pointer to buffer containing the 'bodylength' bytes od data to be written
aungriah 0:3333b6066adf 1642 *
aungriah 0:3333b6066adf 1643 * output parameters
aungriah 0:3333b6066adf 1644 *
aungriah 0:3333b6066adf 1645 * returns DWT_SUCCESS for success, or DWT_ERROR for error
aungriah 0:3333b6066adf 1646 */
aungriah 0:3333b6066adf 1647 int writetospi(uint16 headerLength, const uint8 *headerBuffer, uint32 bodylength, const uint8 *bodyBuffer);
aungriah 0:3333b6066adf 1648
aungriah 0:3333b6066adf 1649 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1650 * @fn readfromspi()
aungriah 0:3333b6066adf 1651 *
aungriah 0:3333b6066adf 1652 * @brief
aungriah 0:3333b6066adf 1653 * NB: In porting this to a particular microprocessor, the implementer needs to define the two low
aungriah 0:3333b6066adf 1654 * level abstract functions to write to and read from the SPI the definitions should be in deca_spi.c file.
aungriah 0:3333b6066adf 1655 * Low level abstract function to write to the SPI
aungriah 0:3333b6066adf 1656 * Takes two separate byte buffers for write header and write data
aungriah 0:3333b6066adf 1657 * returns 0 for success, or -1 for error
aungriah 0:3333b6066adf 1658 *
aungriah 0:3333b6066adf 1659 * Note: The body of this function is defined in deca_spi.c and is platform specific
aungriah 0:3333b6066adf 1660 *
aungriah 0:3333b6066adf 1661 * input parameters:
aungriah 0:3333b6066adf 1662 * @param headerLength - number of bytes header to write
aungriah 0:3333b6066adf 1663 * @param headerBuffer - pointer to buffer containing the 'headerLength' bytes of header to write
aungriah 0:3333b6066adf 1664 * @param readlength - number of bytes data being read
aungriah 0:3333b6066adf 1665 * @param readBuffer - pointer to buffer containing to return the data (NB: size required = headerLength + readlength)
aungriah 0:3333b6066adf 1666 *
aungriah 0:3333b6066adf 1667 * output parameters
aungriah 0:3333b6066adf 1668 *
aungriah 0:3333b6066adf 1669 * returns DWT_SUCCESS for success (and the position in the buffer at which data begins), or DWT_ERROR for error
aungriah 0:3333b6066adf 1670 */
aungriah 0:3333b6066adf 1671 int readfromspi(uint16 headerLength, const uint8 *headerBuffer, uint32 readlength, uint8 *readBuffer);
aungriah 0:3333b6066adf 1672
aungriah 0:3333b6066adf 1673 // ---------------------------------------------------------------------------
aungriah 0:3333b6066adf 1674 //
aungriah 0:3333b6066adf 1675 // NB: The purpose of the deca_mutex.c file is to provide for microprocessor interrupt enable/disable, this is used for
aungriah 0:3333b6066adf 1676 // controlling mutual exclusion from critical sections in the code where interrupts and background
aungriah 0:3333b6066adf 1677 // processing may interact. The code using this is kept to a minimum and the disabling time is also
aungriah 0:3333b6066adf 1678 // kept to a minimum, so blanket interrupt disable may be the easiest way to provide this. But at a
aungriah 0:3333b6066adf 1679 // minimum those interrupts coming from the decawave device should be disabled/re-enabled by this activity.
aungriah 0:3333b6066adf 1680 //
aungriah 0:3333b6066adf 1681 // In porting this to a particular microprocessor, the implementer may choose to use #defines here
aungriah 0:3333b6066adf 1682 // to map these calls transparently to the target system. Alternatively the appropriate code may
aungriah 0:3333b6066adf 1683 // be embedded in the functions provided in the deca_irq.c file.
aungriah 0:3333b6066adf 1684 //
aungriah 0:3333b6066adf 1685 // ---------------------------------------------------------------------------
aungriah 0:3333b6066adf 1686
aungriah 0:3333b6066adf 1687 typedef int decaIrqStatus_t ; // Type for remembering IRQ status
aungriah 0:3333b6066adf 1688
aungriah 0:3333b6066adf 1689
aungriah 0:3333b6066adf 1690 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1691 * @fn decamutexon()
aungriah 0:3333b6066adf 1692 *
aungriah 0:3333b6066adf 1693 * @brief This function should disable interrupts. This is called at the start of a critical section
aungriah 0:3333b6066adf 1694 * It returns the IRQ state before disable, this value is used to re-enable in decamutexoff call
aungriah 0:3333b6066adf 1695 *
aungriah 0:3333b6066adf 1696 * Note: The body of this function is defined in deca_mutex.c and is platform specific
aungriah 0:3333b6066adf 1697 *
aungriah 0:3333b6066adf 1698 * input parameters:
aungriah 0:3333b6066adf 1699 *
aungriah 0:3333b6066adf 1700 * output parameters
aungriah 0:3333b6066adf 1701 *
aungriah 0:3333b6066adf 1702 * returns the state of the DW1000 interrupt
aungriah 0:3333b6066adf 1703 */
aungriah 0:3333b6066adf 1704 decaIrqStatus_t decamutexon(void) ;
aungriah 0:3333b6066adf 1705
aungriah 0:3333b6066adf 1706 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1707 * @fn decamutexoff()
aungriah 0:3333b6066adf 1708 *
aungriah 0:3333b6066adf 1709 * @brief This function should re-enable interrupts, or at least restore their state as returned(&saved) by decamutexon
aungriah 0:3333b6066adf 1710 * This is called at the end of a critical section
aungriah 0:3333b6066adf 1711 *
aungriah 0:3333b6066adf 1712 * Note: The body of this function is defined in deca_mutex.c and is platform specific
aungriah 0:3333b6066adf 1713 *
aungriah 0:3333b6066adf 1714 * input parameters:
aungriah 0:3333b6066adf 1715 * @param s - the state of the DW1000 interrupt as returned by decamutexon
aungriah 0:3333b6066adf 1716 *
aungriah 0:3333b6066adf 1717 * output parameters
aungriah 0:3333b6066adf 1718 *
aungriah 0:3333b6066adf 1719 * returns the state of the DW1000 interrupt
aungriah 0:3333b6066adf 1720 */
aungriah 0:3333b6066adf 1721 void decamutexoff(decaIrqStatus_t s) ;
aungriah 0:3333b6066adf 1722
aungriah 0:3333b6066adf 1723 /*! ------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 1724 * @fn deca_sleep()
aungriah 0:3333b6066adf 1725 *
aungriah 0:3333b6066adf 1726 * @brief Wait for a given amount of time.
aungriah 0:3333b6066adf 1727 * NB: The body of this function is defined in deca_sleep.c and is platform specific
aungriah 0:3333b6066adf 1728 *
aungriah 0:3333b6066adf 1729 * input parameters:
aungriah 0:3333b6066adf 1730 * @param time_ms - time to wait in milliseconds
aungriah 0:3333b6066adf 1731 *
aungriah 0:3333b6066adf 1732 * output parameters
aungriah 0:3333b6066adf 1733 *
aungriah 0:3333b6066adf 1734 * no return value
aungriah 0:3333b6066adf 1735 */
aungriah 0:3333b6066adf 1736 void deca_sleep(unsigned int time_ms);
aungriah 0:3333b6066adf 1737
aungriah 0:3333b6066adf 1738 #ifdef __cplusplus
aungriah 0:3333b6066adf 1739 }
aungriah 0:3333b6066adf 1740 #endif
aungriah 0:3333b6066adf 1741
aungriah 0:3333b6066adf 1742 #endif /* _DECA_DEVICE_API_H_ */
aungriah 0:3333b6066adf 1743
aungriah 0:3333b6066adf 1744
aungriah 0:3333b6066adf 1745