System Clock Frequency

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System Clock Frequency

Page last updated 14 Aug 2014, by Aung KL. 1 reply

Question about 'standard' values loaded for cclk and pclk

http://mbed.org/forum/mbed/topic/229/?page=1#comment-1225

I am developing some code and need to know what values are loaded into the mbed for programs compiled. I konw you have the basic 'startup' of the PLL, etc. via a linked .o file, but I cannot find any reference to what the values are.
Specifically, I need to know what cclk is, and the pclks for the timer 1 and A/D converter.
If you need the Cortex-M3 part, see SystemInit() function in the CMSIS package (\CMSIS_V1P30\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c).

Here is a simple program to dump them out. It'll also show the changes made when I bump the LPC1768 frequency up.

#include "mbed.h"

int main() {
    int Fin = 12000000; // 12MHz XTAL
    
    printf("PLL Registers:\n");
    printf(" - PLL0CFG = 0x%08X\n", LPC_SC->PLL0CFG);
    printf(" - CLKCFG  = 0x%08X\n", LPC_SC->CCLKCFG);
    
    int M = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
    int N = (LPC_SC->PLL0CFG >> 16) + 1;
    int CCLKDIV = LPC_SC->CCLKCFG + 1;

    printf("Clock Variables:\n");
    printf(" - Fin = %d\n", Fin);
    printf(" - M   = %d\n", M);
    printf(" - N   = %d\n", N);
    printf(" - CCLKDIV = %d\n", CCLKDIV);

    int Fcco = (2 * M * 12000000) / N;
    int CCLK = Fcco / CCLKDIV;

    printf("Clock Results:\n");    
    printf(" - Fcco = %d\n", Fcco);
    printf(" - CCLK = %d\n", CCLK);    
}

PLL
Currently the results are...
mbed NXP LPC2368:

PLL Registers:
 - PLL0CFG = 0x00000013
 - CLKCFG  = 0x00000007
Clock Variables:
 - Fin = 12000000
 - M   = 20
 - N   = 1
 - CCLKDIV = 8
Clock Results:
 - Fcco = 480000000
 - CCLK = 60000000

mbed NXP LPC1768:

PLL Registers:
 - PLL0CFG = 0x0000000B
 - CLKCFG  = 0x00000003
Clock Variables:
 - Fin = 12000000
 - M   = 12
 - N   = 1
 - CCLKDIV = 4
Clock Results:
 - Fcco = 288000000
 - CCLK = 72000000

From this you'll see it is not one of the example configurations in the manual, but hopefully clear how it is setup.

Nucleo F103 - System Clock - #define SYSCLK_FREQ_72MHz

https://mbed.org/questions/2777/Nucleo-F103-System-Clock-define-SYSCLK_F/

According to the source files, when the Nucleo board resets...it always goes back to using the HSI for a clock source. It does appear however that there is a way to define the clock frequency so that (ie. #define SYSCLK_FREQ_72MHz) that when the program actually begins to run, this will gen up the PLL, etc. Is that correct or not?

I have seen a few other posts indicating that these boards are running at the HSI speed (8mhz for the F103, and 16mhz for the F401),

STM32 Nucleo-F401RE - Which clock source?

https://mbed.org/questions/2697/STM32-Nucleo-F401RE-Which-clock-source/

The Nucleo F401 on the other hand shows 16000000 Hz which is way below what it should be. Obviously this needs to be fixed.

http://mbed.org/users/mbed_official/code/mbed-src/file/6937b19af361/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/system_stm32f4xx.c

/*
  * This file configures the system clock as follows:
  *-----------------------------------------------------------------------------
  * System clock source                | 1- PLL_HSE_EXTC        | 3- PLL_HSI
  *                                    | (external 8 MHz clock) | (internal 16 MHz)
  *                                    | 2- PLL_HSE_XTAL        |
  *                                    | (external 8 MHz xtal)  |
  *-----------------------------------------------------------------------------
  * SYSCLK(MHz)                        | 84                     | 84
  *-----------------------------------------------------------------------------
  * AHBCLK (MHz)                       | 84                     | 84
  *-----------------------------------------------------------------------------
  * APB1CLK (MHz)                      | 42                     | 42
  *-----------------------------------------------------------------------------
  * APB2CLK (MHz)                      | 84                     | 84
  *-----------------------------------------------------------------------------
  * USB capable (48 MHz precise clock) | YES                    | NO
  *-----------------------------------------------------------------------------  
  ******************************************************************************/

http://mbed.org/users/dreschpe/code/ST_401_84MHZ/issues/2

#include "stm32f4xx_hal.h"
#include "mbed.h"
 
void setup(void)
{
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;
 
    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
    RCC_OscInitStruct.PLL.PLLM = 18;
    RCC_OscInitStruct.PLL.PLLN = 302;
    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
    RCC_OscInitStruct.PLL.PLLQ = 4;
    HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
    
    SystemCoreClockUpdate();
    SystemCoreClock = 83890000;
    
    //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_1);        // output SYSCLOCK to pin PC9 to monitor frequency
};
 
void loop() {
    Serial pc(SERIAL_TX,SERIAL_RX);
 
    while(1) {
        pc.printf("huhu\n");
    }
}
 
int main()
{
    setup();
    loop(); 
}

hal/TARGET_STM/TARGET_NUCLEO_F401RE

http://mbed.org/users/mbed_official/code/mbed-src/file/6937b19af361/targets/hal/TARGET_STM/TARGET_NUCLEO_F401RE

cmsis/TARGET_STM/TARGET_NUCLEO_F401RE

http://mbed.org/users/mbed_official/code/mbed-src/file/6937b19af361/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE

ST_401_84MHZ

https://mbed.org/users/dreschpe/code/ST_401_84MHZ/

The ST Nucleo board is running on 16 MHz out of the box. To speed up the cpu to the maximum speed we have to change the clock setting.

https://mbed.org/forum/platform-34-ST-Nucleo-F401RE-community/topic/4770/

The timer problem is fixed. A call to SystemCoreClockUpdate(); has updated the SystemCoreClock var.

System Core Clock

http://mbed.org/users/simon/code/SystemCoreClock/file/b1c25b546356/main.cpp

#include "mbed.h"
 
int main() {
    printf("SystemCoreClock = %d Hz\n", SystemCoreClock);
}

1 comment on System Clock Frequency:

Khiem Do

# 13 Aug 2017

So what is your question????

Last time, I was also curious about the clock configuration in mbed, so i did a little research. I can summarize here about the procedures. For STM vendor, all the clock configuration are carried out in mbed_sdk_init(). The function will call SystemCoreClockUpdate() and SetSysClock() in mbed-os\targets\TARGET_VENDOR\TARGET_MCU_FAMILY\TARGET_MCUNAME\TARGET_BOARD\system_clock.c

You need to look into SetSysClock() because it is where you choose HSI or HSE, PPL scales and bus clock dividers. You can change the numbers to suite your project.

One more catch is you need to define HSE_VALUE somewhere (maybe at the application layer) so that it can calculate systemclock correctly

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