Angus Galloway / MMA8451Q-configurable

edits to standard MMA8451Q lib

Dependents:   KL05_accel-test

Fork of MMA8451Q by Emilio Monti

MMA8451Q.cpp@6:aca483d0fa8d, 2015-11-19 (annotated)

Committer:
angusg
Date:
Thu Nov 19 21:39:51 2015 +0000
Revision:
6:aca483d0fa8d
Parent:
5:4e7dd6eb7829 
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samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
samux 1:d2630136d51e 18
emilmont 0:6149091f755d 19 #include "MMA8451Q.h"
emilmont 0:6149091f755d 20
angusg 5:4e7dd6eb7829 21 #define REG_WHO_AM_I 0x0D //13
samux 1:d2630136d51e 22 #define REG_CTRL_REG_1 0x2A
angusg 6:aca483d0fa8d 23 #define REG_CTRL_REG_2 0x2B
emilmont 0:6149091f755d 24 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 25 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 26 #define REG_OUT_Z_MSB 0x05
emilmont 0:6149091f755d 27
angusg 6:aca483d0fa8d 28 #define XYZ_DATA_CFG 0x0E
angusg 6:aca483d0fa8d 29 #define HP_FILTER_CUTOFF 0x0F
angusg 6:aca483d0fa8d 30 #define PL_CFG 0x11 //configure
angusg 6:aca483d0fa8d 31 #define TRANSIENT_COUNT 0x20
angusg 6:aca483d0fa8d 32
samux 1:d2630136d51e 33 #define UINT14_MAX 16383
emilmont 0:6149091f755d 34
angusg 6:aca483d0fa8d 35 //#define LNOISE
angusg 6:aca483d0fa8d 36
angusg 6:aca483d0fa8d 37 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
angusg 6:aca483d0fa8d 38
angusg 6:aca483d0fa8d 39 #ifdef LNOISE
angusg 6:aca483d0fa8d 40
angusg 6:aca483d0fa8d 41 // LNOISE
angusg 6:aca483d0fa8d 42 uint8_t dataExt[3];
angusg 6:aca483d0fa8d 43 uint8_t data[2] = {REG_CTRL_REG_1, 0x0c}; // 0x1100 = DR0 & LNOISE (2.5ms b/w samples)
angusg 6:aca483d0fa8d 44 writeRegs(data, 2);
angusg 6:aca483d0fa8d 45
angusg 6:aca483d0fa8d 46 /*
angusg 6:aca483d0fa8d 47 data[0] = REG_CTRL_REG_2;
angusg 6:aca483d0fa8d 48 data[1] = 0x02; // Set MODS[1:0] to 0b10 for High Res mode
angusg 6:aca483d0fa8d 49 writeRegs(data, 3);
angusg 6:aca483d0fa8d 50 */
angusg 6:aca483d0fa8d 51
emilmont 0:6149091f755d 52 // activate the peripheral
angusg 6:aca483d0fa8d 53 dataExt[0] = HP_FILTER_CUTOFF;
angusg 6:aca483d0fa8d 54 dataExt[1] = 0x00;
angusg 6:aca483d0fa8d 55 dataExt[2] = 0x01; /* Set the Pulse_LPF_EN */
angusg 6:aca483d0fa8d 56 writeRegs(dataExt, 3);
angusg 6:aca483d0fa8d 57
angusg 6:aca483d0fa8d 58 // activate the peripheral
angusg 6:aca483d0fa8d 59 data[1] = 0x01;
angusg 6:aca483d0fa8d 60 writeRegs(data, 2);
angusg 6:aca483d0fa8d 61
angusg 6:aca483d0fa8d 62 #else
angusg 6:aca483d0fa8d 63
angusg 6:aca483d0fa8d 64 // activate
angusg 6:aca483d0fa8d 65 //uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
angusg 6:aca483d0fa8d 66 //writeRegs(data, 2);
angusg 6:aca483d0fa8d 67
angusg 6:aca483d0fa8d 68 // activate
angusg 6:aca483d0fa8d 69 uint8_t data[2] = {REG_CTRL_REG_1, 0x08};
angusg 6:aca483d0fa8d 70 writeRegs(data, 2);
angusg 6:aca483d0fa8d 71
angusg 6:aca483d0fa8d 72 // activate the peripheral
angusg 6:aca483d0fa8d 73 data[1] = 0x01;
angusg 6:aca483d0fa8d 74 writeRegs(data, 2);
angusg 6:aca483d0fa8d 75
angusg 6:aca483d0fa8d 76
angusg 6:aca483d0fa8d 77
angusg 6:aca483d0fa8d 78 #endif
angusg 6:aca483d0fa8d 79
emilmont 0:6149091f755d 80 }
emilmont 0:6149091f755d 81
emilmont 0:6149091f755d 82 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 83
emilmont 0:6149091f755d 84 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 85 uint8_t who_am_i = 0;
samux 1:d2630136d51e 86 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 87 return who_am_i;
emilmont 0:6149091f755d 88 }
emilmont 0:6149091f755d 89
chris 3:db7126dbd63f 90 float MMA8451Q::getAccX() {
chris 3:db7126dbd63f 91 return (float(getAccAxis(REG_OUT_X_MSB))/4096.0);
emilmont 0:6149091f755d 92 }
emilmont 0:6149091f755d 93
chris 3:db7126dbd63f 94 float MMA8451Q::getAccY() {
chris 3:db7126dbd63f 95 return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0);
emilmont 0:6149091f755d 96 }
emilmont 0:6149091f755d 97
chris 3:db7126dbd63f 98 float MMA8451Q::getAccZ() {
chris 3:db7126dbd63f 99 return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0);
emilmont 0:6149091f755d 100 }
emilmont 0:6149091f755d 101
chris 3:db7126dbd63f 102 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 103 res[0] = getAccX();
emilmont 0:6149091f755d 104 res[1] = getAccY();
emilmont 0:6149091f755d 105 res[2] = getAccZ();
emilmont 0:6149091f755d 106 }
emilmont 0:6149091f755d 107
emilmont 0:6149091f755d 108 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 109 int16_t acc;
emilmont 0:6149091f755d 110 uint8_t res[2];
samux 1:d2630136d51e 111 readRegs(addr, res, 2);
emilmont 0:6149091f755d 112
emilmont 0:6149091f755d 113 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 114 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 115 acc -= UINT14_MAX;
emilmont 0:6149091f755d 116
emilmont 0:6149091f755d 117 return acc;
emilmont 0:6149091f755d 118 }
emilmont 0:6149091f755d 119
samux 1:d2630136d51e 120 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 121 char t[1] = {addr};
emilmont 0:6149091f755d 122 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 123 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 124 }
emilmont 0:6149091f755d 125
samux 1:d2630136d51e 126 void MMA8451Q::writeRegs(uint8_t * data, int len) {
emilmont 0:6149091f755d 127 m_i2c.write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 128 }