Diff: targets/TARGET_TOSHIBA/TARGET_TMPM066/device/system_TMPM066.h

Revision:

173:7d866c31b3c5

diff -r 89b338f31ef1 -r 7d866c31b3c5 targets/TARGET_TOSHIBA/TARGET_TMPM066/device/system_TMPM066.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/system_TMPM066.h	Thu Aug 31 17:27:04 2017 +0100
@@ -0,0 +1,49 @@
+/**
+ *****************************************************************************
+ * @file     system_TMPM066.h
+ * @brief    CMSIS Cortex-M0 Device Peripheral Access Layer Header File for the
+ *           TOSHIBA 'TMPM066' Device Series 
+ * @version  V2.0.2.1 (Tentative)
+ * @date     2015/8/13
+ *
+ * (C)Copyright TOSHIBA CORPORATION 2015 All rights reserved
+ *****************************************************************************
+ */
+
+#include <stdint.h>
+
+#ifndef __SYSTEM_TMPM066_H
+#define __SYSTEM_TMPM066_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+    extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+    extern void SystemInit(void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+    extern void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif