main.cpp

00001 #include "mbed.h"
00002 
00003 //------------------------------------
00004 // Hyperterminal configuration
00005 // 9600 bauds, 8-bit data, no parity
00006 //------------------------------------
00007 
00008 Serial pc(SERIAL_TX, SERIAL_RX);
00009 
00010 // DigitalOut myled(LED1);
00011 //DigitalOut myled(D8);
00012 
00013 uint8_t MY_SetSysClock_PLL_HSE(uint8_t bypass)
00014 {
00015     RCC_ClkInitTypeDef RCC_ClkInitStruct;
00016     RCC_OscInitTypeDef RCC_OscInitStruct;
00017     RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit;
00018 
00019     /* Used to gain time after DeepSleep in case HSI is used */
00020     if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
00021         return 0;
00022     }
00023 
00024     /* The voltage scaling allows optimizing the power consumption when the device is
00025        clocked below the maximum system frequency, to update the voltage scaling value
00026        regarding system frequency refer to product datasheet. */
00027     __PWR_CLK_ENABLE();
00028     __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
00029 
00030     /* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */
00031     RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_HSI48;
00032     if (bypass == 0) {
00033         RCC_OscInitStruct.HSEState          = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
00034     } else {
00035         RCC_OscInitStruct.HSEState          = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
00036     }
00037     RCC_OscInitStruct.HSIState            = RCC_HSI_OFF;
00038     RCC_OscInitStruct.HSI48State          = RCC_HSI48_ON; /* For USB and RNG clock */
00039     // PLLCLK = (8 MHz * 8)/2 = 32 MHz
00040     RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
00041     RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
00042     RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLLMUL_8;
00043     RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLLDIV_2;
00044     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
00045         return 0; // FAIL
00046     }
00047 
00048     /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
00049     RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
00050     RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
00051     RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 32 MHz
00052     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
00053     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
00054     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
00055         return 0; // FAIL
00056     }
00057 
00058     RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
00059     RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
00060     if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
00061         return 0; // FAIL
00062     }
00063 
00064     return 1; // OK
00065 }
00066 
00067 int main()
00068 {
00069 // RCC->CR|= (uint32_t)0x03030300U;
00070 
00071  //RCC->CR &= (uint32_t)0xFCFCFCFFU;
00072  
00073  //RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEBYP | RCC_CR_HSEON;
00074  
00075  //RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEON;
00076  
00077 //  RCC->CR &= (uint32_t)0xFEF4FFFFU;
00078  // RCC->CR |= (uint32_t)0x00000100U;
00079      
00080  
00081  HAL_RCC_DeInit();
00082 // RCC->CR |= RCC_CR_CSSHSEON | RCC_CR_HSEON; 
00083 // while(1
00084 MY_SetSysClock_PLL_HSE(0);
00085 
00086  pc.printf("\n 2SystemCoreClock of PCB= %d, %08X", SystemCoreClock, RCC->CR);
00087 
00088     
00089 }