Template for group 4

Dependencies:   mbed

Fork of RT2_P3_students by RT2_P3_students

Committer:
altb
Date:
Fri Apr 27 06:34:29 2018 +0000
Revision:
10:85840c065e00
Parent:
0:78ca29b4c49e
group 4, 1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
altb 0:78ca29b4c49e 1 /*
altb 0:78ca29b4c49e 2 * EncoderCounter.cpp
altb 0:78ca29b4c49e 3 * Copyright (c) 2017, ZHAW
altb 0:78ca29b4c49e 4 * All rights reserved.
altb 0:78ca29b4c49e 5 */
altb 0:78ca29b4c49e 6
altb 0:78ca29b4c49e 7 #include "EncoderCounter.h"
altb 0:78ca29b4c49e 8
altb 0:78ca29b4c49e 9 using namespace std;
altb 0:78ca29b4c49e 10
altb 0:78ca29b4c49e 11 /**
altb 0:78ca29b4c49e 12 * Creates and initializes the driver to read the quadrature
altb 0:78ca29b4c49e 13 * encoder counter of the STM32 microcontroller.
altb 0:78ca29b4c49e 14 * @param a the input pin for the channel A.
altb 0:78ca29b4c49e 15 * @param b the input pin for the channel B.
altb 0:78ca29b4c49e 16 */
altb 0:78ca29b4c49e 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
altb 0:78ca29b4c49e 18
altb 0:78ca29b4c49e 19 // check pins
altb 0:78ca29b4c49e 20
altb 0:78ca29b4c49e 21 if ((a == PA_6) && (b == PC_7)) {
altb 0:78ca29b4c49e 22
altb 0:78ca29b4c49e 23 // pinmap OK for TIM3 CH1 and CH2
altb 0:78ca29b4c49e 24
altb 0:78ca29b4c49e 25 TIM = TIM3;
altb 0:78ca29b4c49e 26
altb 0:78ca29b4c49e 27 // configure reset and clock control registers
altb 0:78ca29b4c49e 28
altb 0:78ca29b4c49e 29 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
altb 0:78ca29b4c49e 30
altb 0:78ca29b4c49e 31 // configure general purpose I/O registers
altb 0:78ca29b4c49e 32
altb 0:78ca29b4c49e 33 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
altb 0:78ca29b4c49e 34 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
altb 0:78ca29b4c49e 35 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
altb 0:78ca29b4c49e 36 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb 0:78ca29b4c49e 37 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
altb 0:78ca29b4c49e 38 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
altb 0:78ca29b4c49e 39
altb 0:78ca29b4c49e 40 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
altb 0:78ca29b4c49e 41 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
altb 0:78ca29b4c49e 42 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
altb 0:78ca29b4c49e 43 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb 0:78ca29b4c49e 44 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
altb 0:78ca29b4c49e 45 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
altb 0:78ca29b4c49e 46
altb 0:78ca29b4c49e 47 // configure reset and clock control registers
altb 0:78ca29b4c49e 48
altb 0:78ca29b4c49e 49 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
altb 0:78ca29b4c49e 50 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
altb 0:78ca29b4c49e 51
altb 0:78ca29b4c49e 52 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
altb 0:78ca29b4c49e 53
altb 0:78ca29b4c49e 54 } else if ((a == PB_6) && (b == PB_7)) {
altb 0:78ca29b4c49e 55
altb 0:78ca29b4c49e 56 // pinmap OK for TIM4 CH1 and CH2
altb 0:78ca29b4c49e 57
altb 0:78ca29b4c49e 58 TIM = TIM4;
altb 0:78ca29b4c49e 59
altb 0:78ca29b4c49e 60 // configure reset and clock control registers
altb 0:78ca29b4c49e 61
altb 0:78ca29b4c49e 62 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
altb 0:78ca29b4c49e 63
altb 0:78ca29b4c49e 64 // configure general purpose I/O registers
altb 0:78ca29b4c49e 65
altb 0:78ca29b4c49e 66 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
altb 0:78ca29b4c49e 67 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
altb 0:78ca29b4c49e 68 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
altb 0:78ca29b4c49e 69 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb 0:78ca29b4c49e 70 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
altb 0:78ca29b4c49e 71 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
altb 0:78ca29b4c49e 72
altb 0:78ca29b4c49e 73 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
altb 0:78ca29b4c49e 74 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
altb 0:78ca29b4c49e 75 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
altb 0:78ca29b4c49e 76 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb 0:78ca29b4c49e 77 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
altb 0:78ca29b4c49e 78 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
altb 0:78ca29b4c49e 79
altb 0:78ca29b4c49e 80 // configure reset and clock control registers
altb 0:78ca29b4c49e 81
altb 0:78ca29b4c49e 82 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
altb 0:78ca29b4c49e 83 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
altb 0:78ca29b4c49e 84
altb 0:78ca29b4c49e 85 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
altb 0:78ca29b4c49e 86
altb 0:78ca29b4c49e 87 } else {
altb 0:78ca29b4c49e 88
altb 0:78ca29b4c49e 89 printf("pinmap not found for peripheral\n");
altb 0:78ca29b4c49e 90 }
altb 0:78ca29b4c49e 91
altb 0:78ca29b4c49e 92 // configure general purpose timer 3 or 4
altb 0:78ca29b4c49e 93
altb 0:78ca29b4c49e 94 TIM->CR1 = 0x0000; // counter disable
altb 0:78ca29b4c49e 95 TIM->CR2 = 0x0000; // reset master mode selection
altb 0:78ca29b4c49e 96 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
altb 0:78ca29b4c49e 97 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
altb 0:78ca29b4c49e 98 TIM->CCMR2 = 0x0000; // reset capture mode register 2
altb 0:78ca29b4c49e 99 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
altb 0:78ca29b4c49e 100 TIM->CNT = 0x0000; // reset counter value
altb 0:78ca29b4c49e 101 TIM->ARR = 0xFFFF; // auto reload register
altb 0:78ca29b4c49e 102 TIM->CR1 = TIM_CR1_CEN; // counter enable
altb 0:78ca29b4c49e 103 }
altb 0:78ca29b4c49e 104
altb 0:78ca29b4c49e 105 EncoderCounter::~EncoderCounter() {}
altb 0:78ca29b4c49e 106
altb 0:78ca29b4c49e 107 /**
altb 0:78ca29b4c49e 108 * Resets the counter value to zero.
altb 0:78ca29b4c49e 109 */
altb 0:78ca29b4c49e 110 void EncoderCounter::reset() {
altb 0:78ca29b4c49e 111
altb 0:78ca29b4c49e 112 TIM->CNT = 0x0000;
altb 0:78ca29b4c49e 113 }
altb 0:78ca29b4c49e 114
altb 0:78ca29b4c49e 115 /**
altb 0:78ca29b4c49e 116 * Resets the counter value to a given offset value.
altb 0:78ca29b4c49e 117 * @param offset the offset value to reset the counter to.
altb 0:78ca29b4c49e 118 */
altb 0:78ca29b4c49e 119 void EncoderCounter::reset(short offset) {
altb 0:78ca29b4c49e 120
altb 0:78ca29b4c49e 121 TIM->CNT = -offset;
altb 0:78ca29b4c49e 122 }
altb 0:78ca29b4c49e 123
altb 0:78ca29b4c49e 124 /**
altb 0:78ca29b4c49e 125 * Reads the quadrature encoder counter value.
altb 0:78ca29b4c49e 126 * @return the quadrature encoder counter as a signed 16-bit integer value.
altb 0:78ca29b4c49e 127 */
altb 0:78ca29b4c49e 128 short EncoderCounter::read() {
altb 0:78ca29b4c49e 129
altb 0:78ca29b4c49e 130 return (short)(-TIM->CNT);
altb 0:78ca29b4c49e 131 }
altb 0:78ca29b4c49e 132
altb 0:78ca29b4c49e 133 /**
altb 0:78ca29b4c49e 134 * The empty operator is a shorthand notation of the <code>read()</code> method.
altb 0:78ca29b4c49e 135 */
altb 0:78ca29b4c49e 136 EncoderCounter::operator short() {
altb 0:78ca29b4c49e 137
altb 0:78ca29b4c49e 138 return read();
altb 0:78ca29b4c49e 139 }