Aditya Mehrotra / mbed-dev

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targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_dma2d.h@0:083111ae2a11, 2020-11-26 (annotated)

Committer:
saloutos
Date:
Thu Nov 26 04:08:56 2020 +0000
Revision:
0:083111ae2a11
first commit of leaned mbed dev lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /**
saloutos 0:083111ae2a11 2 ******************************************************************************
saloutos 0:083111ae2a11 3 * @file stm32f7xx_ll_dma2d.h
saloutos 0:083111ae2a11 4 * @author MCD Application Team
saloutos 0:083111ae2a11 5 * @version V1.2.0
saloutos 0:083111ae2a11 6 * @date 30-December-2016
saloutos 0:083111ae2a11 7 * @brief Header file of DMA2D LL module.
saloutos 0:083111ae2a11 8 ******************************************************************************
saloutos 0:083111ae2a11 9 * @attention
saloutos 0:083111ae2a11 10 *
saloutos 0:083111ae2a11 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
saloutos 0:083111ae2a11 12 *
saloutos 0:083111ae2a11 13 * Redistribution and use in source and binary forms, with or without modification,
saloutos 0:083111ae2a11 14 * are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 15 * 1. Redistributions of source code must retain the above copyright notice,
saloutos 0:083111ae2a11 16 * this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
saloutos 0:083111ae2a11 18 * this list of conditions and the following disclaimer in the documentation
saloutos 0:083111ae2a11 19 * and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
saloutos 0:083111ae2a11 21 * may be used to endorse or promote products derived from this software
saloutos 0:083111ae2a11 22 * without specific prior written permission.
saloutos 0:083111ae2a11 23 *
saloutos 0:083111ae2a11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
saloutos 0:083111ae2a11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
saloutos 0:083111ae2a11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
saloutos 0:083111ae2a11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
saloutos 0:083111ae2a11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
saloutos 0:083111ae2a11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
saloutos 0:083111ae2a11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
saloutos 0:083111ae2a11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 34 *
saloutos 0:083111ae2a11 35 ******************************************************************************
saloutos 0:083111ae2a11 36 */
saloutos 0:083111ae2a11 37
saloutos 0:083111ae2a11 38 /* Define to prevent recursive inclusion -------------------------------------*/
saloutos 0:083111ae2a11 39 #ifndef __STM32F7xx_LL_DMA2D_H
saloutos 0:083111ae2a11 40 #define __STM32F7xx_LL_DMA2D_H
saloutos 0:083111ae2a11 41
saloutos 0:083111ae2a11 42 #ifdef __cplusplus
saloutos 0:083111ae2a11 43 extern "C" {
saloutos 0:083111ae2a11 44 #endif
saloutos 0:083111ae2a11 45
saloutos 0:083111ae2a11 46 /* Includes ------------------------------------------------------------------*/
saloutos 0:083111ae2a11 47 #include "stm32f7xx.h"
saloutos 0:083111ae2a11 48
saloutos 0:083111ae2a11 49 /** @addtogroup STM32F7xx_LL_Driver
saloutos 0:083111ae2a11 50 * @{
saloutos 0:083111ae2a11 51 */
saloutos 0:083111ae2a11 52
saloutos 0:083111ae2a11 53 #if defined (DMA2D)
saloutos 0:083111ae2a11 54
saloutos 0:083111ae2a11 55 /** @defgroup DMA2D_LL DMA2D
saloutos 0:083111ae2a11 56 * @{
saloutos 0:083111ae2a11 57 */
saloutos 0:083111ae2a11 58
saloutos 0:083111ae2a11 59 /* Private types -------------------------------------------------------------*/
saloutos 0:083111ae2a11 60 /* Private variables ---------------------------------------------------------*/
saloutos 0:083111ae2a11 61 /* Private constants ---------------------------------------------------------*/
saloutos 0:083111ae2a11 62 /* Private macros ------------------------------------------------------------*/
saloutos 0:083111ae2a11 63 #if defined(USE_FULL_LL_DRIVER)
saloutos 0:083111ae2a11 64 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
saloutos 0:083111ae2a11 65 * @{
saloutos 0:083111ae2a11 66 */
saloutos 0:083111ae2a11 67
saloutos 0:083111ae2a11 68 /**
saloutos 0:083111ae2a11 69 * @}
saloutos 0:083111ae2a11 70 */
saloutos 0:083111ae2a11 71 #endif /*USE_FULL_LL_DRIVER*/
saloutos 0:083111ae2a11 72
saloutos 0:083111ae2a11 73 /* Exported types ------------------------------------------------------------*/
saloutos 0:083111ae2a11 74 #if defined(USE_FULL_LL_DRIVER)
saloutos 0:083111ae2a11 75 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
saloutos 0:083111ae2a11 76 * @{
saloutos 0:083111ae2a11 77 */
saloutos 0:083111ae2a11 78
saloutos 0:083111ae2a11 79 /**
saloutos 0:083111ae2a11 80 * @brief LL DMA2D Init Structure Definition
saloutos 0:083111ae2a11 81 */
saloutos 0:083111ae2a11 82 typedef struct
saloutos 0:083111ae2a11 83 {
saloutos 0:083111ae2a11 84 uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
saloutos 0:083111ae2a11 85 - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
saloutos 0:083111ae2a11 86
saloutos 0:083111ae2a11 87 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
saloutos 0:083111ae2a11 88
saloutos 0:083111ae2a11 89 uint32_t ColorMode; /*!< Specifies the color format of the output image.
saloutos 0:083111ae2a11 90 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
saloutos 0:083111ae2a11 91
saloutos 0:083111ae2a11 92 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
saloutos 0:083111ae2a11 93
saloutos 0:083111ae2a11 94 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
saloutos 0:083111ae2a11 95 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 96 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 97 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 98 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 99 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 100
saloutos 0:083111ae2a11 101 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 102 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 103
saloutos 0:083111ae2a11 104 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
saloutos 0:083111ae2a11 105 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 106 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 107 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 108 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 109 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 110
saloutos 0:083111ae2a11 111 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 112 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 113
saloutos 0:083111ae2a11 114 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
saloutos 0:083111ae2a11 115 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 116 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 117 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 118 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 119 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 120
saloutos 0:083111ae2a11 121 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 122 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 123
saloutos 0:083111ae2a11 124 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
saloutos 0:083111ae2a11 125 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 126 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 127 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 128 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
saloutos 0:083111ae2a11 129
saloutos 0:083111ae2a11 130 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 131 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 132
saloutos 0:083111ae2a11 133 uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
saloutos 0:083111ae2a11 134 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
saloutos 0:083111ae2a11 135
saloutos 0:083111ae2a11 136 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
saloutos 0:083111ae2a11 137
saloutos 0:083111ae2a11 138 uint32_t LineOffset; /*!< Specifies the output line offset value.
saloutos 0:083111ae2a11 139 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
saloutos 0:083111ae2a11 140
saloutos 0:083111ae2a11 141 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
saloutos 0:083111ae2a11 142
saloutos 0:083111ae2a11 143 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
saloutos 0:083111ae2a11 144 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
saloutos 0:083111ae2a11 145
saloutos 0:083111ae2a11 146 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
saloutos 0:083111ae2a11 147
saloutos 0:083111ae2a11 148 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
saloutos 0:083111ae2a11 149 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
saloutos 0:083111ae2a11 150
saloutos 0:083111ae2a11 151 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
saloutos 0:083111ae2a11 152
saloutos 0:083111ae2a11 153 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 154 uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
saloutos 0:083111ae2a11 155 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
saloutos 0:083111ae2a11 156
saloutos 0:083111ae2a11 157 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
saloutos 0:083111ae2a11 158
saloutos 0:083111ae2a11 159 uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
saloutos 0:083111ae2a11 160 - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
saloutos 0:083111ae2a11 161
saloutos 0:083111ae2a11 162 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
saloutos 0:083111ae2a11 163 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 164
saloutos 0:083111ae2a11 165 } LL_DMA2D_InitTypeDef;
saloutos 0:083111ae2a11 166
saloutos 0:083111ae2a11 167 /**
saloutos 0:083111ae2a11 168 * @brief LL DMA2D Layer Configuration Structure Definition
saloutos 0:083111ae2a11 169 */
saloutos 0:083111ae2a11 170 typedef struct
saloutos 0:083111ae2a11 171 {
saloutos 0:083111ae2a11 172 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
saloutos 0:083111ae2a11 173 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
saloutos 0:083111ae2a11 174
saloutos 0:083111ae2a11 175 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 176 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
saloutos 0:083111ae2a11 177 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
saloutos 0:083111ae2a11 178
saloutos 0:083111ae2a11 179 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
saloutos 0:083111ae2a11 180 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
saloutos 0:083111ae2a11 181
saloutos 0:083111ae2a11 182 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 183 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
saloutos 0:083111ae2a11 184 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
saloutos 0:083111ae2a11 185
saloutos 0:083111ae2a11 186 uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
saloutos 0:083111ae2a11 187 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
saloutos 0:083111ae2a11 188
saloutos 0:083111ae2a11 189 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 190 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
saloutos 0:083111ae2a11 191 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
saloutos 0:083111ae2a11 192
saloutos 0:083111ae2a11 193 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
saloutos 0:083111ae2a11 194 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
saloutos 0:083111ae2a11 195
saloutos 0:083111ae2a11 196 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 197 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
saloutos 0:083111ae2a11 198 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
saloutos 0:083111ae2a11 199
saloutos 0:083111ae2a11 200 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
saloutos 0:083111ae2a11 201 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
saloutos 0:083111ae2a11 202
saloutos 0:083111ae2a11 203 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 204 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
saloutos 0:083111ae2a11 205 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
saloutos 0:083111ae2a11 206
saloutos 0:083111ae2a11 207 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
saloutos 0:083111ae2a11 208 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
saloutos 0:083111ae2a11 209
saloutos 0:083111ae2a11 210 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 211 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
saloutos 0:083111ae2a11 212 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
saloutos 0:083111ae2a11 213
saloutos 0:083111ae2a11 214 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
saloutos 0:083111ae2a11 215 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
saloutos 0:083111ae2a11 216
saloutos 0:083111ae2a11 217 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 218 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
saloutos 0:083111ae2a11 219 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
saloutos 0:083111ae2a11 220
saloutos 0:083111ae2a11 221 uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
saloutos 0:083111ae2a11 222 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
saloutos 0:083111ae2a11 223
saloutos 0:083111ae2a11 224 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 225 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
saloutos 0:083111ae2a11 226 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
saloutos 0:083111ae2a11 227
saloutos 0:083111ae2a11 228 uint32_t Green; /*!< Specifies the foreground or background Green color value.
saloutos 0:083111ae2a11 229 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
saloutos 0:083111ae2a11 230
saloutos 0:083111ae2a11 231 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 232 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
saloutos 0:083111ae2a11 233 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
saloutos 0:083111ae2a11 234
saloutos 0:083111ae2a11 235 uint32_t Red; /*!< Specifies the foreground or background Red color value.
saloutos 0:083111ae2a11 236 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
saloutos 0:083111ae2a11 237
saloutos 0:083111ae2a11 238 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 239 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
saloutos 0:083111ae2a11 240 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
saloutos 0:083111ae2a11 241
saloutos 0:083111ae2a11 242 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
saloutos 0:083111ae2a11 243 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
saloutos 0:083111ae2a11 244
saloutos 0:083111ae2a11 245 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 246 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
saloutos 0:083111ae2a11 247 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
saloutos 0:083111ae2a11 248
saloutos 0:083111ae2a11 249 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 250 uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
saloutos 0:083111ae2a11 251 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
saloutos 0:083111ae2a11 252
saloutos 0:083111ae2a11 253 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 254 - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
saloutos 0:083111ae2a11 255 - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
saloutos 0:083111ae2a11 256
saloutos 0:083111ae2a11 257 uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
saloutos 0:083111ae2a11 258 This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
saloutos 0:083111ae2a11 259
saloutos 0:083111ae2a11 260 This parameter can be modified afterwards using unitary functions
saloutos 0:083111ae2a11 261 - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
saloutos 0:083111ae2a11 262 - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
saloutos 0:083111ae2a11 263 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 264
saloutos 0:083111ae2a11 265 } LL_DMA2D_LayerCfgTypeDef;
saloutos 0:083111ae2a11 266
saloutos 0:083111ae2a11 267 /**
saloutos 0:083111ae2a11 268 * @brief LL DMA2D Output Color Structure Definition
saloutos 0:083111ae2a11 269 */
saloutos 0:083111ae2a11 270 typedef struct
saloutos 0:083111ae2a11 271 {
saloutos 0:083111ae2a11 272 uint32_t ColorMode; /*!< Specifies the color format of the output image.
saloutos 0:083111ae2a11 273 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
saloutos 0:083111ae2a11 274
saloutos 0:083111ae2a11 275 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
saloutos 0:083111ae2a11 276
saloutos 0:083111ae2a11 277 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
saloutos 0:083111ae2a11 278 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 279 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 280 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 281 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 282 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 283
saloutos 0:083111ae2a11 284 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 285 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 286
saloutos 0:083111ae2a11 287 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
saloutos 0:083111ae2a11 288 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 289 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 290 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 291 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 292 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 293
saloutos 0:083111ae2a11 294 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 295 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 296
saloutos 0:083111ae2a11 297 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
saloutos 0:083111ae2a11 298 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 299 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
saloutos 0:083111ae2a11 300 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
saloutos 0:083111ae2a11 301 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 302 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 303
saloutos 0:083111ae2a11 304 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 305 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 306
saloutos 0:083111ae2a11 307 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
saloutos 0:083111ae2a11 308 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
saloutos 0:083111ae2a11 309 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
saloutos 0:083111ae2a11 310 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
saloutos 0:083111ae2a11 311 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
saloutos 0:083111ae2a11 312
saloutos 0:083111ae2a11 313 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
saloutos 0:083111ae2a11 314 function @ref LL_DMA2D_ConfigOutputColor(). */
saloutos 0:083111ae2a11 315
saloutos 0:083111ae2a11 316 } LL_DMA2D_ColorTypeDef;
saloutos 0:083111ae2a11 317
saloutos 0:083111ae2a11 318 /**
saloutos 0:083111ae2a11 319 * @}
saloutos 0:083111ae2a11 320 */
saloutos 0:083111ae2a11 321 #endif /* USE_FULL_LL_DRIVER */
saloutos 0:083111ae2a11 322
saloutos 0:083111ae2a11 323 /* Exported constants --------------------------------------------------------*/
saloutos 0:083111ae2a11 324 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
saloutos 0:083111ae2a11 325 * @{
saloutos 0:083111ae2a11 326 */
saloutos 0:083111ae2a11 327
saloutos 0:083111ae2a11 328 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
saloutos 0:083111ae2a11 329 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
saloutos 0:083111ae2a11 330 * @{
saloutos 0:083111ae2a11 331 */
saloutos 0:083111ae2a11 332 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
saloutos 0:083111ae2a11 333 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
saloutos 0:083111ae2a11 334 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
saloutos 0:083111ae2a11 335 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
saloutos 0:083111ae2a11 336 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
saloutos 0:083111ae2a11 337 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
saloutos 0:083111ae2a11 338 /**
saloutos 0:083111ae2a11 339 * @}
saloutos 0:083111ae2a11 340 */
saloutos 0:083111ae2a11 341
saloutos 0:083111ae2a11 342 /** @defgroup DMA2D_LL_EC_IT IT Defines
saloutos 0:083111ae2a11 343 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
saloutos 0:083111ae2a11 344 * @{
saloutos 0:083111ae2a11 345 */
saloutos 0:083111ae2a11 346 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
saloutos 0:083111ae2a11 347 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
saloutos 0:083111ae2a11 348 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
saloutos 0:083111ae2a11 349 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
saloutos 0:083111ae2a11 350 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
saloutos 0:083111ae2a11 351 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
saloutos 0:083111ae2a11 352 /**
saloutos 0:083111ae2a11 353 * @}
saloutos 0:083111ae2a11 354 */
saloutos 0:083111ae2a11 355
saloutos 0:083111ae2a11 356 /** @defgroup DMA2D_LL_EC_MODE Mode
saloutos 0:083111ae2a11 357 * @{
saloutos 0:083111ae2a11 358 */
saloutos 0:083111ae2a11 359 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
saloutos 0:083111ae2a11 360 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
saloutos 0:083111ae2a11 361 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
saloutos 0:083111ae2a11 362 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
saloutos 0:083111ae2a11 363 /**
saloutos 0:083111ae2a11 364 * @}
saloutos 0:083111ae2a11 365 */
saloutos 0:083111ae2a11 366
saloutos 0:083111ae2a11 367 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
saloutos 0:083111ae2a11 368 * @{
saloutos 0:083111ae2a11 369 */
saloutos 0:083111ae2a11 370 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
saloutos 0:083111ae2a11 371 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
saloutos 0:083111ae2a11 372 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
saloutos 0:083111ae2a11 373 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
saloutos 0:083111ae2a11 374 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
saloutos 0:083111ae2a11 375 /**
saloutos 0:083111ae2a11 376 * @}
saloutos 0:083111ae2a11 377 */
saloutos 0:083111ae2a11 378
saloutos 0:083111ae2a11 379 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
saloutos 0:083111ae2a11 380 * @{
saloutos 0:083111ae2a11 381 */
saloutos 0:083111ae2a11 382 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
saloutos 0:083111ae2a11 383 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
saloutos 0:083111ae2a11 384 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
saloutos 0:083111ae2a11 385 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
saloutos 0:083111ae2a11 386 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
saloutos 0:083111ae2a11 387 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
saloutos 0:083111ae2a11 388 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
saloutos 0:083111ae2a11 389 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
saloutos 0:083111ae2a11 390 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
saloutos 0:083111ae2a11 391 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
saloutos 0:083111ae2a11 392 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
saloutos 0:083111ae2a11 393 /**
saloutos 0:083111ae2a11 394 * @}
saloutos 0:083111ae2a11 395 */
saloutos 0:083111ae2a11 396
saloutos 0:083111ae2a11 397 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
saloutos 0:083111ae2a11 398 * @{
saloutos 0:083111ae2a11 399 */
saloutos 0:083111ae2a11 400 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
saloutos 0:083111ae2a11 401 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
saloutos 0:083111ae2a11 402 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
saloutos 0:083111ae2a11 403 with original alpha channel value */
saloutos 0:083111ae2a11 404 /**
saloutos 0:083111ae2a11 405 * @}
saloutos 0:083111ae2a11 406 */
saloutos 0:083111ae2a11 407
saloutos 0:083111ae2a11 408 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 409 /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
saloutos 0:083111ae2a11 410 * @{
saloutos 0:083111ae2a11 411 */
saloutos 0:083111ae2a11 412 #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
saloutos 0:083111ae2a11 413 #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
saloutos 0:083111ae2a11 414 /**
saloutos 0:083111ae2a11 415 * @}
saloutos 0:083111ae2a11 416 */
saloutos 0:083111ae2a11 417
saloutos 0:083111ae2a11 418 /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
saloutos 0:083111ae2a11 419 * @{
saloutos 0:083111ae2a11 420 */
saloutos 0:083111ae2a11 421 #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
saloutos 0:083111ae2a11 422 #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
saloutos 0:083111ae2a11 423 /**
saloutos 0:083111ae2a11 424 * @}
saloutos 0:083111ae2a11 425 */
saloutos 0:083111ae2a11 426
saloutos 0:083111ae2a11 427 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 428 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
saloutos 0:083111ae2a11 429 * @{
saloutos 0:083111ae2a11 430 */
saloutos 0:083111ae2a11 431 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
saloutos 0:083111ae2a11 432 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
saloutos 0:083111ae2a11 433 /**
saloutos 0:083111ae2a11 434 * @}
saloutos 0:083111ae2a11 435 */
saloutos 0:083111ae2a11 436
saloutos 0:083111ae2a11 437 /**
saloutos 0:083111ae2a11 438 * @}
saloutos 0:083111ae2a11 439 */
saloutos 0:083111ae2a11 440
saloutos 0:083111ae2a11 441 /* Exported macro ------------------------------------------------------------*/
saloutos 0:083111ae2a11 442 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
saloutos 0:083111ae2a11 443 * @{
saloutos 0:083111ae2a11 444 */
saloutos 0:083111ae2a11 445
saloutos 0:083111ae2a11 446 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
saloutos 0:083111ae2a11 447 * @{
saloutos 0:083111ae2a11 448 */
saloutos 0:083111ae2a11 449
saloutos 0:083111ae2a11 450 /**
saloutos 0:083111ae2a11 451 * @brief Write a value in DMA2D register.
saloutos 0:083111ae2a11 452 * @param __INSTANCE__ DMA2D Instance
saloutos 0:083111ae2a11 453 * @param __REG__ Register to be written
saloutos 0:083111ae2a11 454 * @param __VALUE__ Value to be written in the register
saloutos 0:083111ae2a11 455 * @retval None
saloutos 0:083111ae2a11 456 */
saloutos 0:083111ae2a11 457 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
saloutos 0:083111ae2a11 458
saloutos 0:083111ae2a11 459 /**
saloutos 0:083111ae2a11 460 * @brief Read a value in DMA2D register.
saloutos 0:083111ae2a11 461 * @param __INSTANCE__ DMA2D Instance
saloutos 0:083111ae2a11 462 * @param __REG__ Register to be read
saloutos 0:083111ae2a11 463 * @retval Register value
saloutos 0:083111ae2a11 464 */
saloutos 0:083111ae2a11 465 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
saloutos 0:083111ae2a11 466 /**
saloutos 0:083111ae2a11 467 * @}
saloutos 0:083111ae2a11 468 */
saloutos 0:083111ae2a11 469
saloutos 0:083111ae2a11 470 /**
saloutos 0:083111ae2a11 471 * @}
saloutos 0:083111ae2a11 472 */
saloutos 0:083111ae2a11 473
saloutos 0:083111ae2a11 474 /* Exported functions --------------------------------------------------------*/
saloutos 0:083111ae2a11 475 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
saloutos 0:083111ae2a11 476 * @{
saloutos 0:083111ae2a11 477 */
saloutos 0:083111ae2a11 478
saloutos 0:083111ae2a11 479 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
saloutos 0:083111ae2a11 480 * @{
saloutos 0:083111ae2a11 481 */
saloutos 0:083111ae2a11 482
saloutos 0:083111ae2a11 483 /**
saloutos 0:083111ae2a11 484 * @brief Start a DMA2D transfer.
saloutos 0:083111ae2a11 485 * @rmtoll CR START LL_DMA2D_Start
saloutos 0:083111ae2a11 486 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 487 * @retval None
saloutos 0:083111ae2a11 488 */
saloutos 0:083111ae2a11 489 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 490 {
saloutos 0:083111ae2a11 491 SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
saloutos 0:083111ae2a11 492 }
saloutos 0:083111ae2a11 493
saloutos 0:083111ae2a11 494 /**
saloutos 0:083111ae2a11 495 * @brief Indicate if a DMA2D transfer is ongoing.
saloutos 0:083111ae2a11 496 * @rmtoll CR START LL_DMA2D_IsTransferOngoing
saloutos 0:083111ae2a11 497 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 498 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 499 */
saloutos 0:083111ae2a11 500 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 501 {
saloutos 0:083111ae2a11 502 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
saloutos 0:083111ae2a11 503 }
saloutos 0:083111ae2a11 504
saloutos 0:083111ae2a11 505 /**
saloutos 0:083111ae2a11 506 * @brief Suspend DMA2D transfer.
saloutos 0:083111ae2a11 507 * @note This API can be used to suspend automatic foreground or background CLUT loading.
saloutos 0:083111ae2a11 508 * @rmtoll CR SUSP LL_DMA2D_Suspend
saloutos 0:083111ae2a11 509 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 510 * @retval None
saloutos 0:083111ae2a11 511 */
saloutos 0:083111ae2a11 512 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 513 {
saloutos 0:083111ae2a11 514 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
saloutos 0:083111ae2a11 515 }
saloutos 0:083111ae2a11 516
saloutos 0:083111ae2a11 517 /**
saloutos 0:083111ae2a11 518 * @brief Resume DMA2D transfer.
saloutos 0:083111ae2a11 519 * @note This API can be used to resume automatic foreground or background CLUT loading.
saloutos 0:083111ae2a11 520 * @rmtoll CR SUSP LL_DMA2D_Resume
saloutos 0:083111ae2a11 521 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 522 * @retval None
saloutos 0:083111ae2a11 523 */
saloutos 0:083111ae2a11 524 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 525 {
saloutos 0:083111ae2a11 526 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
saloutos 0:083111ae2a11 527 }
saloutos 0:083111ae2a11 528
saloutos 0:083111ae2a11 529 /**
saloutos 0:083111ae2a11 530 * @brief Indicate if DMA2D transfer is suspended.
saloutos 0:083111ae2a11 531 * @note This API can be used to indicate whether or not automatic foreground or
saloutos 0:083111ae2a11 532 * background CLUT loading is suspended.
saloutos 0:083111ae2a11 533 * @rmtoll CR SUSP LL_DMA2D_IsSuspended
saloutos 0:083111ae2a11 534 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 535 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 536 */
saloutos 0:083111ae2a11 537 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 538 {
saloutos 0:083111ae2a11 539 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
saloutos 0:083111ae2a11 540 }
saloutos 0:083111ae2a11 541
saloutos 0:083111ae2a11 542 /**
saloutos 0:083111ae2a11 543 * @brief Abort DMA2D transfer.
saloutos 0:083111ae2a11 544 * @note This API can be used to abort automatic foreground or background CLUT loading.
saloutos 0:083111ae2a11 545 * @rmtoll CR ABORT LL_DMA2D_Abort
saloutos 0:083111ae2a11 546 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 547 * @retval None
saloutos 0:083111ae2a11 548 */
saloutos 0:083111ae2a11 549 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 550 {
saloutos 0:083111ae2a11 551 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
saloutos 0:083111ae2a11 552 }
saloutos 0:083111ae2a11 553
saloutos 0:083111ae2a11 554 /**
saloutos 0:083111ae2a11 555 * @brief Indicate if DMA2D transfer is aborted.
saloutos 0:083111ae2a11 556 * @note This API can be used to indicate whether or not automatic foreground or
saloutos 0:083111ae2a11 557 * background CLUT loading is aborted.
saloutos 0:083111ae2a11 558 * @rmtoll CR ABORT LL_DMA2D_IsAborted
saloutos 0:083111ae2a11 559 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 560 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 561 */
saloutos 0:083111ae2a11 562 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 563 {
saloutos 0:083111ae2a11 564 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
saloutos 0:083111ae2a11 565 }
saloutos 0:083111ae2a11 566
saloutos 0:083111ae2a11 567 /**
saloutos 0:083111ae2a11 568 * @brief Set DMA2D mode.
saloutos 0:083111ae2a11 569 * @rmtoll CR MODE LL_DMA2D_SetMode
saloutos 0:083111ae2a11 570 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 571 * @param Mode This parameter can be one of the following values:
saloutos 0:083111ae2a11 572 * @arg @ref LL_DMA2D_MODE_M2M
saloutos 0:083111ae2a11 573 * @arg @ref LL_DMA2D_MODE_M2M_PFC
saloutos 0:083111ae2a11 574 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
saloutos 0:083111ae2a11 575 * @arg @ref LL_DMA2D_MODE_R2M
saloutos 0:083111ae2a11 576 * @retval None
saloutos 0:083111ae2a11 577 */
saloutos 0:083111ae2a11 578 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
saloutos 0:083111ae2a11 579 {
saloutos 0:083111ae2a11 580 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
saloutos 0:083111ae2a11 581 }
saloutos 0:083111ae2a11 582
saloutos 0:083111ae2a11 583 /**
saloutos 0:083111ae2a11 584 * @brief Return DMA2D mode
saloutos 0:083111ae2a11 585 * @rmtoll CR MODE LL_DMA2D_GetMode
saloutos 0:083111ae2a11 586 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 587 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 588 * @arg @ref LL_DMA2D_MODE_M2M
saloutos 0:083111ae2a11 589 * @arg @ref LL_DMA2D_MODE_M2M_PFC
saloutos 0:083111ae2a11 590 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
saloutos 0:083111ae2a11 591 * @arg @ref LL_DMA2D_MODE_R2M
saloutos 0:083111ae2a11 592 */
saloutos 0:083111ae2a11 593 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 594 {
saloutos 0:083111ae2a11 595 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
saloutos 0:083111ae2a11 596 }
saloutos 0:083111ae2a11 597
saloutos 0:083111ae2a11 598 /**
saloutos 0:083111ae2a11 599 * @brief Set DMA2D output color mode.
saloutos 0:083111ae2a11 600 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
saloutos 0:083111ae2a11 601 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 602 * @param ColorMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 603 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 604 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
saloutos 0:083111ae2a11 605 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
saloutos 0:083111ae2a11 606 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 607 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 608 * @retval None
saloutos 0:083111ae2a11 609 */
saloutos 0:083111ae2a11 610 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
saloutos 0:083111ae2a11 611 {
saloutos 0:083111ae2a11 612 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
saloutos 0:083111ae2a11 613 }
saloutos 0:083111ae2a11 614
saloutos 0:083111ae2a11 615 /**
saloutos 0:083111ae2a11 616 * @brief Return DMA2D output color mode.
saloutos 0:083111ae2a11 617 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
saloutos 0:083111ae2a11 618 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 619 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 620 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 621 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
saloutos 0:083111ae2a11 622 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
saloutos 0:083111ae2a11 623 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 624 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 625 */
saloutos 0:083111ae2a11 626 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 627 {
saloutos 0:083111ae2a11 628 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
saloutos 0:083111ae2a11 629 }
saloutos 0:083111ae2a11 630
saloutos 0:083111ae2a11 631 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 632 /**
saloutos 0:083111ae2a11 633 * @brief Set DMA2D output Red Blue swap mode.
saloutos 0:083111ae2a11 634 * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
saloutos 0:083111ae2a11 635 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 636 * @param RBSwapMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 637 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 638 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 639 * @retval None
saloutos 0:083111ae2a11 640 */
saloutos 0:083111ae2a11 641 __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
saloutos 0:083111ae2a11 642 {
saloutos 0:083111ae2a11 643 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
saloutos 0:083111ae2a11 644 }
saloutos 0:083111ae2a11 645
saloutos 0:083111ae2a11 646 /**
saloutos 0:083111ae2a11 647 * @brief Return DMA2D output Red Blue swap mode.
saloutos 0:083111ae2a11 648 * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
saloutos 0:083111ae2a11 649 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 650 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 651 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 652 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 653 */
saloutos 0:083111ae2a11 654 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 655 {
saloutos 0:083111ae2a11 656 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
saloutos 0:083111ae2a11 657 }
saloutos 0:083111ae2a11 658
saloutos 0:083111ae2a11 659 /**
saloutos 0:083111ae2a11 660 * @brief Set DMA2D output alpha inversion mode.
saloutos 0:083111ae2a11 661 * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
saloutos 0:083111ae2a11 662 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 663 * @param AlphaInversionMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 664 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 665 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 666 * @retval None
saloutos 0:083111ae2a11 667 */
saloutos 0:083111ae2a11 668 __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
saloutos 0:083111ae2a11 669 {
saloutos 0:083111ae2a11 670 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
saloutos 0:083111ae2a11 671 }
saloutos 0:083111ae2a11 672
saloutos 0:083111ae2a11 673 /**
saloutos 0:083111ae2a11 674 * @brief Return DMA2D output alpha inversion mode.
saloutos 0:083111ae2a11 675 * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
saloutos 0:083111ae2a11 676 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 677 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 678 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 679 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 680 */
saloutos 0:083111ae2a11 681 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 682 {
saloutos 0:083111ae2a11 683 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
saloutos 0:083111ae2a11 684 }
saloutos 0:083111ae2a11 685
saloutos 0:083111ae2a11 686 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 687
saloutos 0:083111ae2a11 688 /**
saloutos 0:083111ae2a11 689 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 690 * @rmtoll OOR LO LL_DMA2D_SetLineOffset
saloutos 0:083111ae2a11 691 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 692 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
saloutos 0:083111ae2a11 693 * @retval None
saloutos 0:083111ae2a11 694 */
saloutos 0:083111ae2a11 695 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
saloutos 0:083111ae2a11 696 {
saloutos 0:083111ae2a11 697 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
saloutos 0:083111ae2a11 698 }
saloutos 0:083111ae2a11 699
saloutos 0:083111ae2a11 700 /**
saloutos 0:083111ae2a11 701 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 702 * @rmtoll OOR LO LL_DMA2D_GetLineOffset
saloutos 0:083111ae2a11 703 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 704 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
saloutos 0:083111ae2a11 705 */
saloutos 0:083111ae2a11 706 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 707 {
saloutos 0:083111ae2a11 708 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
saloutos 0:083111ae2a11 709 }
saloutos 0:083111ae2a11 710
saloutos 0:083111ae2a11 711 /**
saloutos 0:083111ae2a11 712 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 713 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
saloutos 0:083111ae2a11 714 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 715 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
saloutos 0:083111ae2a11 716 * @retval None
saloutos 0:083111ae2a11 717 */
saloutos 0:083111ae2a11 718 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
saloutos 0:083111ae2a11 719 {
saloutos 0:083111ae2a11 720 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
saloutos 0:083111ae2a11 721 }
saloutos 0:083111ae2a11 722
saloutos 0:083111ae2a11 723 /**
saloutos 0:083111ae2a11 724 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
saloutos 0:083111ae2a11 725 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
saloutos 0:083111ae2a11 726 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 727 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
saloutos 0:083111ae2a11 728 */
saloutos 0:083111ae2a11 729 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 730 {
saloutos 0:083111ae2a11 731 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
saloutos 0:083111ae2a11 732 }
saloutos 0:083111ae2a11 733
saloutos 0:083111ae2a11 734 /**
saloutos 0:083111ae2a11 735 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
saloutos 0:083111ae2a11 736 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
saloutos 0:083111ae2a11 737 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 738 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
saloutos 0:083111ae2a11 739 * @retval None
saloutos 0:083111ae2a11 740 */
saloutos 0:083111ae2a11 741 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
saloutos 0:083111ae2a11 742 {
saloutos 0:083111ae2a11 743 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
saloutos 0:083111ae2a11 744 }
saloutos 0:083111ae2a11 745
saloutos 0:083111ae2a11 746 /**
saloutos 0:083111ae2a11 747 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
saloutos 0:083111ae2a11 748 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
saloutos 0:083111ae2a11 749 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 750 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
saloutos 0:083111ae2a11 751 */
saloutos 0:083111ae2a11 752 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 753 {
saloutos 0:083111ae2a11 754 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
saloutos 0:083111ae2a11 755 }
saloutos 0:083111ae2a11 756
saloutos 0:083111ae2a11 757 /**
saloutos 0:083111ae2a11 758 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 759 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
saloutos 0:083111ae2a11 760 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 761 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 762 * @retval None
saloutos 0:083111ae2a11 763 */
saloutos 0:083111ae2a11 764 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
saloutos 0:083111ae2a11 765 {
saloutos 0:083111ae2a11 766 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
saloutos 0:083111ae2a11 767 }
saloutos 0:083111ae2a11 768
saloutos 0:083111ae2a11 769 /**
saloutos 0:083111ae2a11 770 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 771 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
saloutos 0:083111ae2a11 772 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 773 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 774 */
saloutos 0:083111ae2a11 775 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 776 {
saloutos 0:083111ae2a11 777 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
saloutos 0:083111ae2a11 778 }
saloutos 0:083111ae2a11 779
saloutos 0:083111ae2a11 780 /**
saloutos 0:083111ae2a11 781 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 782 * @note Output color format depends on output color mode, ARGB8888, RGB888,
saloutos 0:083111ae2a11 783 * RGB565, ARGB1555 or ARGB4444.
saloutos 0:083111ae2a11 784 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
saloutos 0:083111ae2a11 785 * with respect to color mode is not done by the user code.
saloutos 0:083111ae2a11 786 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
saloutos 0:083111ae2a11 787 * OCOLR GREEN LL_DMA2D_SetOutputColor\n
saloutos 0:083111ae2a11 788 * OCOLR RED LL_DMA2D_SetOutputColor\n
saloutos 0:083111ae2a11 789 * OCOLR ALPHA LL_DMA2D_SetOutputColor
saloutos 0:083111ae2a11 790 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 791 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 792 * @retval None
saloutos 0:083111ae2a11 793 */
saloutos 0:083111ae2a11 794 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
saloutos 0:083111ae2a11 795 {
saloutos 0:083111ae2a11 796 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
saloutos 0:083111ae2a11 797 OutputColor);
saloutos 0:083111ae2a11 798 }
saloutos 0:083111ae2a11 799
saloutos 0:083111ae2a11 800 /**
saloutos 0:083111ae2a11 801 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 802 * @note Alpha channel and red, green, blue color values must be retrieved from the returned
saloutos 0:083111ae2a11 803 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
saloutos 0:083111ae2a11 804 * as set by @ref LL_DMA2D_SetOutputColorMode.
saloutos 0:083111ae2a11 805 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
saloutos 0:083111ae2a11 806 * OCOLR GREEN LL_DMA2D_GetOutputColor\n
saloutos 0:083111ae2a11 807 * OCOLR RED LL_DMA2D_GetOutputColor\n
saloutos 0:083111ae2a11 808 * OCOLR ALPHA LL_DMA2D_GetOutputColor
saloutos 0:083111ae2a11 809 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 810 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 811 */
saloutos 0:083111ae2a11 812 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 813 {
saloutos 0:083111ae2a11 814 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
saloutos 0:083111ae2a11 815 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
saloutos 0:083111ae2a11 816 }
saloutos 0:083111ae2a11 817
saloutos 0:083111ae2a11 818 /**
saloutos 0:083111ae2a11 819 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
saloutos 0:083111ae2a11 820 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
saloutos 0:083111ae2a11 821 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 822 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
saloutos 0:083111ae2a11 823 * @retval None
saloutos 0:083111ae2a11 824 */
saloutos 0:083111ae2a11 825 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
saloutos 0:083111ae2a11 826 {
saloutos 0:083111ae2a11 827 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
saloutos 0:083111ae2a11 828 }
saloutos 0:083111ae2a11 829
saloutos 0:083111ae2a11 830 /**
saloutos 0:083111ae2a11 831 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
saloutos 0:083111ae2a11 832 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
saloutos 0:083111ae2a11 833 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 834 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
saloutos 0:083111ae2a11 835 */
saloutos 0:083111ae2a11 836 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 837 {
saloutos 0:083111ae2a11 838 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
saloutos 0:083111ae2a11 839 }
saloutos 0:083111ae2a11 840
saloutos 0:083111ae2a11 841 /**
saloutos 0:083111ae2a11 842 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 843 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
saloutos 0:083111ae2a11 844 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 845 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 846 * @retval None
saloutos 0:083111ae2a11 847 */
saloutos 0:083111ae2a11 848 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
saloutos 0:083111ae2a11 849 {
saloutos 0:083111ae2a11 850 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
saloutos 0:083111ae2a11 851 }
saloutos 0:083111ae2a11 852
saloutos 0:083111ae2a11 853 /**
saloutos 0:083111ae2a11 854 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 855 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
saloutos 0:083111ae2a11 856 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 857 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 858 */
saloutos 0:083111ae2a11 859 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 860 {
saloutos 0:083111ae2a11 861 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
saloutos 0:083111ae2a11 862 }
saloutos 0:083111ae2a11 863
saloutos 0:083111ae2a11 864 /**
saloutos 0:083111ae2a11 865 * @brief Enable DMA2D dead time functionality.
saloutos 0:083111ae2a11 866 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
saloutos 0:083111ae2a11 867 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 868 * @retval None
saloutos 0:083111ae2a11 869 */
saloutos 0:083111ae2a11 870 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 871 {
saloutos 0:083111ae2a11 872 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
saloutos 0:083111ae2a11 873 }
saloutos 0:083111ae2a11 874
saloutos 0:083111ae2a11 875 /**
saloutos 0:083111ae2a11 876 * @brief Disable DMA2D dead time functionality.
saloutos 0:083111ae2a11 877 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
saloutos 0:083111ae2a11 878 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 879 * @retval None
saloutos 0:083111ae2a11 880 */
saloutos 0:083111ae2a11 881 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 882 {
saloutos 0:083111ae2a11 883 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
saloutos 0:083111ae2a11 884 }
saloutos 0:083111ae2a11 885
saloutos 0:083111ae2a11 886 /**
saloutos 0:083111ae2a11 887 * @brief Indicate if DMA2D dead time functionality is enabled.
saloutos 0:083111ae2a11 888 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
saloutos 0:083111ae2a11 889 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 890 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 891 */
saloutos 0:083111ae2a11 892 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 893 {
saloutos 0:083111ae2a11 894 return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
saloutos 0:083111ae2a11 895 }
saloutos 0:083111ae2a11 896
saloutos 0:083111ae2a11 897 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
saloutos 0:083111ae2a11 898 * @{
saloutos 0:083111ae2a11 899 */
saloutos 0:083111ae2a11 900
saloutos 0:083111ae2a11 901 /**
saloutos 0:083111ae2a11 902 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 903 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
saloutos 0:083111ae2a11 904 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 905 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 906 * @retval None
saloutos 0:083111ae2a11 907 */
saloutos 0:083111ae2a11 908 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
saloutos 0:083111ae2a11 909 {
saloutos 0:083111ae2a11 910 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
saloutos 0:083111ae2a11 911 }
saloutos 0:083111ae2a11 912
saloutos 0:083111ae2a11 913 /**
saloutos 0:083111ae2a11 914 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 915 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
saloutos 0:083111ae2a11 916 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 917 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 918 */
saloutos 0:083111ae2a11 919 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 920 {
saloutos 0:083111ae2a11 921 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
saloutos 0:083111ae2a11 922 }
saloutos 0:083111ae2a11 923
saloutos 0:083111ae2a11 924 /**
saloutos 0:083111ae2a11 925 * @brief Enable DMA2D foreground CLUT loading.
saloutos 0:083111ae2a11 926 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
saloutos 0:083111ae2a11 927 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 928 * @retval None
saloutos 0:083111ae2a11 929 */
saloutos 0:083111ae2a11 930 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 931 {
saloutos 0:083111ae2a11 932 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
saloutos 0:083111ae2a11 933 }
saloutos 0:083111ae2a11 934
saloutos 0:083111ae2a11 935 /**
saloutos 0:083111ae2a11 936 * @brief Indicate if DMA2D foreground CLUT loading is enabled.
saloutos 0:083111ae2a11 937 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
saloutos 0:083111ae2a11 938 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 939 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 940 */
saloutos 0:083111ae2a11 941 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 942 {
saloutos 0:083111ae2a11 943 return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
saloutos 0:083111ae2a11 944 }
saloutos 0:083111ae2a11 945
saloutos 0:083111ae2a11 946 /**
saloutos 0:083111ae2a11 947 * @brief Set DMA2D foreground color mode.
saloutos 0:083111ae2a11 948 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
saloutos 0:083111ae2a11 949 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 950 * @param ColorMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 951 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 952 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
saloutos 0:083111ae2a11 953 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
saloutos 0:083111ae2a11 954 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 955 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 956 * @arg @ref LL_DMA2D_INPUT_MODE_L8
saloutos 0:083111ae2a11 957 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
saloutos 0:083111ae2a11 958 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
saloutos 0:083111ae2a11 959 * @arg @ref LL_DMA2D_INPUT_MODE_L4
saloutos 0:083111ae2a11 960 * @arg @ref LL_DMA2D_INPUT_MODE_A8
saloutos 0:083111ae2a11 961 * @arg @ref LL_DMA2D_INPUT_MODE_A4
saloutos 0:083111ae2a11 962 * @retval None
saloutos 0:083111ae2a11 963 */
saloutos 0:083111ae2a11 964 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
saloutos 0:083111ae2a11 965 {
saloutos 0:083111ae2a11 966 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
saloutos 0:083111ae2a11 967 }
saloutos 0:083111ae2a11 968
saloutos 0:083111ae2a11 969 /**
saloutos 0:083111ae2a11 970 * @brief Return DMA2D foreground color mode.
saloutos 0:083111ae2a11 971 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
saloutos 0:083111ae2a11 972 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 973 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 974 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 975 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
saloutos 0:083111ae2a11 976 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
saloutos 0:083111ae2a11 977 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 978 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 979 * @arg @ref LL_DMA2D_INPUT_MODE_L8
saloutos 0:083111ae2a11 980 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
saloutos 0:083111ae2a11 981 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
saloutos 0:083111ae2a11 982 * @arg @ref LL_DMA2D_INPUT_MODE_L4
saloutos 0:083111ae2a11 983 * @arg @ref LL_DMA2D_INPUT_MODE_A8
saloutos 0:083111ae2a11 984 * @arg @ref LL_DMA2D_INPUT_MODE_A4
saloutos 0:083111ae2a11 985 */
saloutos 0:083111ae2a11 986 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 987 {
saloutos 0:083111ae2a11 988 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
saloutos 0:083111ae2a11 989 }
saloutos 0:083111ae2a11 990
saloutos 0:083111ae2a11 991 /**
saloutos 0:083111ae2a11 992 * @brief Set DMA2D foreground alpha mode.
saloutos 0:083111ae2a11 993 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
saloutos 0:083111ae2a11 994 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 995 * @param AphaMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 996 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
saloutos 0:083111ae2a11 997 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
saloutos 0:083111ae2a11 998 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
saloutos 0:083111ae2a11 999 * @retval None
saloutos 0:083111ae2a11 1000 */
saloutos 0:083111ae2a11 1001 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
saloutos 0:083111ae2a11 1002 {
saloutos 0:083111ae2a11 1003 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
saloutos 0:083111ae2a11 1004 }
saloutos 0:083111ae2a11 1005
saloutos 0:083111ae2a11 1006 /**
saloutos 0:083111ae2a11 1007 * @brief Return DMA2D foreground alpha mode.
saloutos 0:083111ae2a11 1008 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
saloutos 0:083111ae2a11 1009 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1010 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1011 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
saloutos 0:083111ae2a11 1012 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
saloutos 0:083111ae2a11 1013 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
saloutos 0:083111ae2a11 1014 */
saloutos 0:083111ae2a11 1015 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1016 {
saloutos 0:083111ae2a11 1017 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
saloutos 0:083111ae2a11 1018 }
saloutos 0:083111ae2a11 1019
saloutos 0:083111ae2a11 1020 /**
saloutos 0:083111ae2a11 1021 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1022 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
saloutos 0:083111ae2a11 1023 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1024 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1025 * @retval None
saloutos 0:083111ae2a11 1026 */
saloutos 0:083111ae2a11 1027 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
saloutos 0:083111ae2a11 1028 {
saloutos 0:083111ae2a11 1029 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
saloutos 0:083111ae2a11 1030 }
saloutos 0:083111ae2a11 1031
saloutos 0:083111ae2a11 1032 /**
saloutos 0:083111ae2a11 1033 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1034 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
saloutos 0:083111ae2a11 1035 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1036 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1037 */
saloutos 0:083111ae2a11 1038 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1039 {
saloutos 0:083111ae2a11 1040 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
saloutos 0:083111ae2a11 1041 }
saloutos 0:083111ae2a11 1042
saloutos 0:083111ae2a11 1043 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 1044 /**
saloutos 0:083111ae2a11 1045 * @brief Set DMA2D foreground Red Blue swap mode.
saloutos 0:083111ae2a11 1046 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
saloutos 0:083111ae2a11 1047 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1048 * @param RBSwapMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1049 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 1050 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 1051 * @retval None
saloutos 0:083111ae2a11 1052 */
saloutos 0:083111ae2a11 1053 __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
saloutos 0:083111ae2a11 1054 {
saloutos 0:083111ae2a11 1055 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
saloutos 0:083111ae2a11 1056 }
saloutos 0:083111ae2a11 1057
saloutos 0:083111ae2a11 1058 /**
saloutos 0:083111ae2a11 1059 * @brief Return DMA2D foreground Red Blue swap mode.
saloutos 0:083111ae2a11 1060 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
saloutos 0:083111ae2a11 1061 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1062 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1063 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 1064 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 1065 */
saloutos 0:083111ae2a11 1066 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1067 {
saloutos 0:083111ae2a11 1068 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
saloutos 0:083111ae2a11 1069 }
saloutos 0:083111ae2a11 1070
saloutos 0:083111ae2a11 1071 /**
saloutos 0:083111ae2a11 1072 * @brief Set DMA2D foreground alpha inversion mode.
saloutos 0:083111ae2a11 1073 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
saloutos 0:083111ae2a11 1074 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1075 * @param AlphaInversionMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1076 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 1077 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 1078 * @retval None
saloutos 0:083111ae2a11 1079 */
saloutos 0:083111ae2a11 1080 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
saloutos 0:083111ae2a11 1081 {
saloutos 0:083111ae2a11 1082 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
saloutos 0:083111ae2a11 1083 }
saloutos 0:083111ae2a11 1084
saloutos 0:083111ae2a11 1085 /**
saloutos 0:083111ae2a11 1086 * @brief Return DMA2D foreground alpha inversion mode.
saloutos 0:083111ae2a11 1087 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
saloutos 0:083111ae2a11 1088 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1089 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1090 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 1091 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 1092 */
saloutos 0:083111ae2a11 1093 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1094 {
saloutos 0:083111ae2a11 1095 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
saloutos 0:083111ae2a11 1096 }
saloutos 0:083111ae2a11 1097
saloutos 0:083111ae2a11 1098 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 1099
saloutos 0:083111ae2a11 1100 /**
saloutos 0:083111ae2a11 1101 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 1102 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
saloutos 0:083111ae2a11 1103 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1104 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
saloutos 0:083111ae2a11 1105 * @retval None
saloutos 0:083111ae2a11 1106 */
saloutos 0:083111ae2a11 1107 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
saloutos 0:083111ae2a11 1108 {
saloutos 0:083111ae2a11 1109 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
saloutos 0:083111ae2a11 1110 }
saloutos 0:083111ae2a11 1111
saloutos 0:083111ae2a11 1112 /**
saloutos 0:083111ae2a11 1113 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 1114 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
saloutos 0:083111ae2a11 1115 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1116 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
saloutos 0:083111ae2a11 1117 */
saloutos 0:083111ae2a11 1118 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1119 {
saloutos 0:083111ae2a11 1120 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
saloutos 0:083111ae2a11 1121 }
saloutos 0:083111ae2a11 1122
saloutos 0:083111ae2a11 1123 /**
saloutos 0:083111ae2a11 1124 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
saloutos 0:083111ae2a11 1125 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
saloutos 0:083111ae2a11 1126 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
saloutos 0:083111ae2a11 1127 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
saloutos 0:083111ae2a11 1128 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1129 * @param Red Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1130 * @param Green Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1131 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1132 * @retval None
saloutos 0:083111ae2a11 1133 */
saloutos 0:083111ae2a11 1134 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
saloutos 0:083111ae2a11 1135 {
saloutos 0:083111ae2a11 1136 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
saloutos 0:083111ae2a11 1137 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
saloutos 0:083111ae2a11 1138 }
saloutos 0:083111ae2a11 1139
saloutos 0:083111ae2a11 1140 /**
saloutos 0:083111ae2a11 1141 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1142 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
saloutos 0:083111ae2a11 1143 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1144 * @param Red Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1145 * @retval None
saloutos 0:083111ae2a11 1146 */
saloutos 0:083111ae2a11 1147 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
saloutos 0:083111ae2a11 1148 {
saloutos 0:083111ae2a11 1149 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
saloutos 0:083111ae2a11 1150 }
saloutos 0:083111ae2a11 1151
saloutos 0:083111ae2a11 1152 /**
saloutos 0:083111ae2a11 1153 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1154 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
saloutos 0:083111ae2a11 1155 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1156 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1157 */
saloutos 0:083111ae2a11 1158 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1159 {
saloutos 0:083111ae2a11 1160 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
saloutos 0:083111ae2a11 1161 }
saloutos 0:083111ae2a11 1162
saloutos 0:083111ae2a11 1163 /**
saloutos 0:083111ae2a11 1164 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1165 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
saloutos 0:083111ae2a11 1166 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1167 * @param Green Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1168 * @retval None
saloutos 0:083111ae2a11 1169 */
saloutos 0:083111ae2a11 1170 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
saloutos 0:083111ae2a11 1171 {
saloutos 0:083111ae2a11 1172 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
saloutos 0:083111ae2a11 1173 }
saloutos 0:083111ae2a11 1174
saloutos 0:083111ae2a11 1175 /**
saloutos 0:083111ae2a11 1176 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1177 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
saloutos 0:083111ae2a11 1178 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1179 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1180 */
saloutos 0:083111ae2a11 1181 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1182 {
saloutos 0:083111ae2a11 1183 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
saloutos 0:083111ae2a11 1184 }
saloutos 0:083111ae2a11 1185
saloutos 0:083111ae2a11 1186 /**
saloutos 0:083111ae2a11 1187 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1188 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
saloutos 0:083111ae2a11 1189 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1190 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1191 * @retval None
saloutos 0:083111ae2a11 1192 */
saloutos 0:083111ae2a11 1193 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
saloutos 0:083111ae2a11 1194 {
saloutos 0:083111ae2a11 1195 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
saloutos 0:083111ae2a11 1196 }
saloutos 0:083111ae2a11 1197
saloutos 0:083111ae2a11 1198 /**
saloutos 0:083111ae2a11 1199 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1200 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
saloutos 0:083111ae2a11 1201 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1202 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1203 */
saloutos 0:083111ae2a11 1204 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1205 {
saloutos 0:083111ae2a11 1206 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
saloutos 0:083111ae2a11 1207 }
saloutos 0:083111ae2a11 1208
saloutos 0:083111ae2a11 1209 /**
saloutos 0:083111ae2a11 1210 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1211 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
saloutos 0:083111ae2a11 1212 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1213 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1214 * @retval None
saloutos 0:083111ae2a11 1215 */
saloutos 0:083111ae2a11 1216 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
saloutos 0:083111ae2a11 1217 {
saloutos 0:083111ae2a11 1218 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
saloutos 0:083111ae2a11 1219 }
saloutos 0:083111ae2a11 1220
saloutos 0:083111ae2a11 1221 /**
saloutos 0:083111ae2a11 1222 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1223 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
saloutos 0:083111ae2a11 1224 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1225 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1226 */
saloutos 0:083111ae2a11 1227 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1228 {
saloutos 0:083111ae2a11 1229 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
saloutos 0:083111ae2a11 1230 }
saloutos 0:083111ae2a11 1231
saloutos 0:083111ae2a11 1232 /**
saloutos 0:083111ae2a11 1233 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1234 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
saloutos 0:083111ae2a11 1235 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1236 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1237 * @retval None
saloutos 0:083111ae2a11 1238 */
saloutos 0:083111ae2a11 1239 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
saloutos 0:083111ae2a11 1240 {
saloutos 0:083111ae2a11 1241 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
saloutos 0:083111ae2a11 1242 }
saloutos 0:083111ae2a11 1243
saloutos 0:083111ae2a11 1244 /**
saloutos 0:083111ae2a11 1245 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1246 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
saloutos 0:083111ae2a11 1247 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1248 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1249 */
saloutos 0:083111ae2a11 1250 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1251 {
saloutos 0:083111ae2a11 1252 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
saloutos 0:083111ae2a11 1253 }
saloutos 0:083111ae2a11 1254
saloutos 0:083111ae2a11 1255 /**
saloutos 0:083111ae2a11 1256 * @brief Set DMA2D foreground CLUT color mode.
saloutos 0:083111ae2a11 1257 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
saloutos 0:083111ae2a11 1258 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1259 * @param CLUTColorMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1260 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
saloutos 0:083111ae2a11 1261 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
saloutos 0:083111ae2a11 1262 * @retval None
saloutos 0:083111ae2a11 1263 */
saloutos 0:083111ae2a11 1264 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
saloutos 0:083111ae2a11 1265 {
saloutos 0:083111ae2a11 1266 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
saloutos 0:083111ae2a11 1267 }
saloutos 0:083111ae2a11 1268
saloutos 0:083111ae2a11 1269 /**
saloutos 0:083111ae2a11 1270 * @brief Return DMA2D foreground CLUT color mode.
saloutos 0:083111ae2a11 1271 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
saloutos 0:083111ae2a11 1272 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1273 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1274 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
saloutos 0:083111ae2a11 1275 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
saloutos 0:083111ae2a11 1276 */
saloutos 0:083111ae2a11 1277 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1278 {
saloutos 0:083111ae2a11 1279 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
saloutos 0:083111ae2a11 1280 }
saloutos 0:083111ae2a11 1281
saloutos 0:083111ae2a11 1282 /**
saloutos 0:083111ae2a11 1283 * @}
saloutos 0:083111ae2a11 1284 */
saloutos 0:083111ae2a11 1285
saloutos 0:083111ae2a11 1286 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
saloutos 0:083111ae2a11 1287 * @{
saloutos 0:083111ae2a11 1288 */
saloutos 0:083111ae2a11 1289
saloutos 0:083111ae2a11 1290 /**
saloutos 0:083111ae2a11 1291 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1292 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
saloutos 0:083111ae2a11 1293 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1294 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1295 * @retval None
saloutos 0:083111ae2a11 1296 */
saloutos 0:083111ae2a11 1297 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
saloutos 0:083111ae2a11 1298 {
saloutos 0:083111ae2a11 1299 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
saloutos 0:083111ae2a11 1300 }
saloutos 0:083111ae2a11 1301
saloutos 0:083111ae2a11 1302 /**
saloutos 0:083111ae2a11 1303 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1304 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
saloutos 0:083111ae2a11 1305 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1306 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1307 */
saloutos 0:083111ae2a11 1308 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1309 {
saloutos 0:083111ae2a11 1310 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
saloutos 0:083111ae2a11 1311 }
saloutos 0:083111ae2a11 1312
saloutos 0:083111ae2a11 1313 /**
saloutos 0:083111ae2a11 1314 * @brief Enable DMA2D background CLUT loading.
saloutos 0:083111ae2a11 1315 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
saloutos 0:083111ae2a11 1316 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1317 * @retval None
saloutos 0:083111ae2a11 1318 */
saloutos 0:083111ae2a11 1319 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1320 {
saloutos 0:083111ae2a11 1321 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
saloutos 0:083111ae2a11 1322 }
saloutos 0:083111ae2a11 1323
saloutos 0:083111ae2a11 1324 /**
saloutos 0:083111ae2a11 1325 * @brief Indicate if DMA2D background CLUT loading is enabled.
saloutos 0:083111ae2a11 1326 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
saloutos 0:083111ae2a11 1327 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1328 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1329 */
saloutos 0:083111ae2a11 1330 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1331 {
saloutos 0:083111ae2a11 1332 return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
saloutos 0:083111ae2a11 1333 }
saloutos 0:083111ae2a11 1334
saloutos 0:083111ae2a11 1335 /**
saloutos 0:083111ae2a11 1336 * @brief Set DMA2D background color mode.
saloutos 0:083111ae2a11 1337 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
saloutos 0:083111ae2a11 1338 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1339 * @param ColorMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1340 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 1341 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
saloutos 0:083111ae2a11 1342 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
saloutos 0:083111ae2a11 1343 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 1344 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 1345 * @arg @ref LL_DMA2D_INPUT_MODE_L8
saloutos 0:083111ae2a11 1346 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
saloutos 0:083111ae2a11 1347 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
saloutos 0:083111ae2a11 1348 * @arg @ref LL_DMA2D_INPUT_MODE_L4
saloutos 0:083111ae2a11 1349 * @arg @ref LL_DMA2D_INPUT_MODE_A8
saloutos 0:083111ae2a11 1350 * @arg @ref LL_DMA2D_INPUT_MODE_A4
saloutos 0:083111ae2a11 1351 * @retval None
saloutos 0:083111ae2a11 1352 */
saloutos 0:083111ae2a11 1353 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
saloutos 0:083111ae2a11 1354 {
saloutos 0:083111ae2a11 1355 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
saloutos 0:083111ae2a11 1356 }
saloutos 0:083111ae2a11 1357
saloutos 0:083111ae2a11 1358 /**
saloutos 0:083111ae2a11 1359 * @brief Return DMA2D background color mode.
saloutos 0:083111ae2a11 1360 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
saloutos 0:083111ae2a11 1361 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1362 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1363 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
saloutos 0:083111ae2a11 1364 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
saloutos 0:083111ae2a11 1365 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
saloutos 0:083111ae2a11 1366 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
saloutos 0:083111ae2a11 1367 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
saloutos 0:083111ae2a11 1368 * @arg @ref LL_DMA2D_INPUT_MODE_L8
saloutos 0:083111ae2a11 1369 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
saloutos 0:083111ae2a11 1370 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
saloutos 0:083111ae2a11 1371 * @arg @ref LL_DMA2D_INPUT_MODE_L4
saloutos 0:083111ae2a11 1372 * @arg @ref LL_DMA2D_INPUT_MODE_A8
saloutos 0:083111ae2a11 1373 * @arg @ref LL_DMA2D_INPUT_MODE_A4
saloutos 0:083111ae2a11 1374 */
saloutos 0:083111ae2a11 1375 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1376 {
saloutos 0:083111ae2a11 1377 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
saloutos 0:083111ae2a11 1378 }
saloutos 0:083111ae2a11 1379
saloutos 0:083111ae2a11 1380 /**
saloutos 0:083111ae2a11 1381 * @brief Set DMA2D background alpha mode.
saloutos 0:083111ae2a11 1382 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
saloutos 0:083111ae2a11 1383 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1384 * @param AphaMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1385 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
saloutos 0:083111ae2a11 1386 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
saloutos 0:083111ae2a11 1387 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
saloutos 0:083111ae2a11 1388 * @retval None
saloutos 0:083111ae2a11 1389 */
saloutos 0:083111ae2a11 1390 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
saloutos 0:083111ae2a11 1391 {
saloutos 0:083111ae2a11 1392 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
saloutos 0:083111ae2a11 1393 }
saloutos 0:083111ae2a11 1394
saloutos 0:083111ae2a11 1395 /**
saloutos 0:083111ae2a11 1396 * @brief Return DMA2D background alpha mode.
saloutos 0:083111ae2a11 1397 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
saloutos 0:083111ae2a11 1398 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1399 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1400 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
saloutos 0:083111ae2a11 1401 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
saloutos 0:083111ae2a11 1402 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
saloutos 0:083111ae2a11 1403 */
saloutos 0:083111ae2a11 1404 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1405 {
saloutos 0:083111ae2a11 1406 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
saloutos 0:083111ae2a11 1407 }
saloutos 0:083111ae2a11 1408
saloutos 0:083111ae2a11 1409 /**
saloutos 0:083111ae2a11 1410 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1411 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
saloutos 0:083111ae2a11 1412 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1413 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1414 * @retval None
saloutos 0:083111ae2a11 1415 */
saloutos 0:083111ae2a11 1416 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
saloutos 0:083111ae2a11 1417 {
saloutos 0:083111ae2a11 1418 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
saloutos 0:083111ae2a11 1419 }
saloutos 0:083111ae2a11 1420
saloutos 0:083111ae2a11 1421 /**
saloutos 0:083111ae2a11 1422 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1423 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
saloutos 0:083111ae2a11 1424 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1425 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1426 */
saloutos 0:083111ae2a11 1427 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1428 {
saloutos 0:083111ae2a11 1429 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
saloutos 0:083111ae2a11 1430 }
saloutos 0:083111ae2a11 1431
saloutos 0:083111ae2a11 1432 #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
saloutos 0:083111ae2a11 1433 /**
saloutos 0:083111ae2a11 1434 * @brief Set DMA2D background Red Blue swap mode.
saloutos 0:083111ae2a11 1435 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
saloutos 0:083111ae2a11 1436 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1437 * @param RBSwapMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1438 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 1439 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 1440 * @retval None
saloutos 0:083111ae2a11 1441 */
saloutos 0:083111ae2a11 1442 __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
saloutos 0:083111ae2a11 1443 {
saloutos 0:083111ae2a11 1444 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
saloutos 0:083111ae2a11 1445 }
saloutos 0:083111ae2a11 1446
saloutos 0:083111ae2a11 1447 /**
saloutos 0:083111ae2a11 1448 * @brief Return DMA2D background Red Blue swap mode.
saloutos 0:083111ae2a11 1449 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
saloutos 0:083111ae2a11 1450 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1451 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1452 * @arg @ref LL_DMA2D_RB_MODE_REGULAR
saloutos 0:083111ae2a11 1453 * @arg @ref LL_DMA2D_RB_MODE_SWAP
saloutos 0:083111ae2a11 1454 */
saloutos 0:083111ae2a11 1455 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1456 {
saloutos 0:083111ae2a11 1457 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
saloutos 0:083111ae2a11 1458 }
saloutos 0:083111ae2a11 1459
saloutos 0:083111ae2a11 1460 /**
saloutos 0:083111ae2a11 1461 * @brief Set DMA2D background alpha inversion mode.
saloutos 0:083111ae2a11 1462 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
saloutos 0:083111ae2a11 1463 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1464 * @param AlphaInversionMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1465 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 1466 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 1467 * @retval None
saloutos 0:083111ae2a11 1468 */
saloutos 0:083111ae2a11 1469 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
saloutos 0:083111ae2a11 1470 {
saloutos 0:083111ae2a11 1471 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
saloutos 0:083111ae2a11 1472 }
saloutos 0:083111ae2a11 1473
saloutos 0:083111ae2a11 1474 /**
saloutos 0:083111ae2a11 1475 * @brief Return DMA2D background alpha inversion mode.
saloutos 0:083111ae2a11 1476 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
saloutos 0:083111ae2a11 1477 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1478 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1479 * @arg @ref LL_DMA2D_ALPHA_REGULAR
saloutos 0:083111ae2a11 1480 * @arg @ref LL_DMA2D_ALPHA_INVERTED
saloutos 0:083111ae2a11 1481 */
saloutos 0:083111ae2a11 1482 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1483 {
saloutos 0:083111ae2a11 1484 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
saloutos 0:083111ae2a11 1485 }
saloutos 0:083111ae2a11 1486
saloutos 0:083111ae2a11 1487 #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
saloutos 0:083111ae2a11 1488
saloutos 0:083111ae2a11 1489 /**
saloutos 0:083111ae2a11 1490 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 1491 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
saloutos 0:083111ae2a11 1492 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1493 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
saloutos 0:083111ae2a11 1494 * @retval None
saloutos 0:083111ae2a11 1495 */
saloutos 0:083111ae2a11 1496 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
saloutos 0:083111ae2a11 1497 {
saloutos 0:083111ae2a11 1498 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
saloutos 0:083111ae2a11 1499 }
saloutos 0:083111ae2a11 1500
saloutos 0:083111ae2a11 1501 /**
saloutos 0:083111ae2a11 1502 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
saloutos 0:083111ae2a11 1503 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
saloutos 0:083111ae2a11 1504 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1505 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
saloutos 0:083111ae2a11 1506 */
saloutos 0:083111ae2a11 1507 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1508 {
saloutos 0:083111ae2a11 1509 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
saloutos 0:083111ae2a11 1510 }
saloutos 0:083111ae2a11 1511
saloutos 0:083111ae2a11 1512 /**
saloutos 0:083111ae2a11 1513 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
saloutos 0:083111ae2a11 1514 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
saloutos 0:083111ae2a11 1515 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
saloutos 0:083111ae2a11 1516 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
saloutos 0:083111ae2a11 1517 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1518 * @param Red Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1519 * @param Green Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1520 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1521 * @retval None
saloutos 0:083111ae2a11 1522 */
saloutos 0:083111ae2a11 1523 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
saloutos 0:083111ae2a11 1524 {
saloutos 0:083111ae2a11 1525 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
saloutos 0:083111ae2a11 1526 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
saloutos 0:083111ae2a11 1527 }
saloutos 0:083111ae2a11 1528
saloutos 0:083111ae2a11 1529 /**
saloutos 0:083111ae2a11 1530 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1531 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
saloutos 0:083111ae2a11 1532 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1533 * @param Red Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1534 * @retval None
saloutos 0:083111ae2a11 1535 */
saloutos 0:083111ae2a11 1536 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
saloutos 0:083111ae2a11 1537 {
saloutos 0:083111ae2a11 1538 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
saloutos 0:083111ae2a11 1539 }
saloutos 0:083111ae2a11 1540
saloutos 0:083111ae2a11 1541 /**
saloutos 0:083111ae2a11 1542 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1543 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
saloutos 0:083111ae2a11 1544 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1545 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1546 */
saloutos 0:083111ae2a11 1547 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1548 {
saloutos 0:083111ae2a11 1549 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
saloutos 0:083111ae2a11 1550 }
saloutos 0:083111ae2a11 1551
saloutos 0:083111ae2a11 1552 /**
saloutos 0:083111ae2a11 1553 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1554 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
saloutos 0:083111ae2a11 1555 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1556 * @param Green Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1557 * @retval None
saloutos 0:083111ae2a11 1558 */
saloutos 0:083111ae2a11 1559 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
saloutos 0:083111ae2a11 1560 {
saloutos 0:083111ae2a11 1561 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
saloutos 0:083111ae2a11 1562 }
saloutos 0:083111ae2a11 1563
saloutos 0:083111ae2a11 1564 /**
saloutos 0:083111ae2a11 1565 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1566 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
saloutos 0:083111ae2a11 1567 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1568 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1569 */
saloutos 0:083111ae2a11 1570 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1571 {
saloutos 0:083111ae2a11 1572 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
saloutos 0:083111ae2a11 1573 }
saloutos 0:083111ae2a11 1574
saloutos 0:083111ae2a11 1575 /**
saloutos 0:083111ae2a11 1576 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1577 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
saloutos 0:083111ae2a11 1578 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1579 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1580 * @retval None
saloutos 0:083111ae2a11 1581 */
saloutos 0:083111ae2a11 1582 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
saloutos 0:083111ae2a11 1583 {
saloutos 0:083111ae2a11 1584 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
saloutos 0:083111ae2a11 1585 }
saloutos 0:083111ae2a11 1586
saloutos 0:083111ae2a11 1587 /**
saloutos 0:083111ae2a11 1588 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1589 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
saloutos 0:083111ae2a11 1590 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1591 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1592 */
saloutos 0:083111ae2a11 1593 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1594 {
saloutos 0:083111ae2a11 1595 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
saloutos 0:083111ae2a11 1596 }
saloutos 0:083111ae2a11 1597
saloutos 0:083111ae2a11 1598 /**
saloutos 0:083111ae2a11 1599 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1600 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
saloutos 0:083111ae2a11 1601 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1602 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1603 * @retval None
saloutos 0:083111ae2a11 1604 */
saloutos 0:083111ae2a11 1605 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
saloutos 0:083111ae2a11 1606 {
saloutos 0:083111ae2a11 1607 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
saloutos 0:083111ae2a11 1608 }
saloutos 0:083111ae2a11 1609
saloutos 0:083111ae2a11 1610 /**
saloutos 0:083111ae2a11 1611 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
saloutos 0:083111ae2a11 1612 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
saloutos 0:083111ae2a11 1613 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1614 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
saloutos 0:083111ae2a11 1615 */
saloutos 0:083111ae2a11 1616 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1617 {
saloutos 0:083111ae2a11 1618 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
saloutos 0:083111ae2a11 1619 }
saloutos 0:083111ae2a11 1620
saloutos 0:083111ae2a11 1621 /**
saloutos 0:083111ae2a11 1622 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1623 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
saloutos 0:083111ae2a11 1624 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1625 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1626 * @retval None
saloutos 0:083111ae2a11 1627 */
saloutos 0:083111ae2a11 1628 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
saloutos 0:083111ae2a11 1629 {
saloutos 0:083111ae2a11 1630 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
saloutos 0:083111ae2a11 1631 }
saloutos 0:083111ae2a11 1632
saloutos 0:083111ae2a11 1633 /**
saloutos 0:083111ae2a11 1634 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
saloutos 0:083111ae2a11 1635 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
saloutos 0:083111ae2a11 1636 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1637 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
saloutos 0:083111ae2a11 1638 */
saloutos 0:083111ae2a11 1639 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1640 {
saloutos 0:083111ae2a11 1641 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
saloutos 0:083111ae2a11 1642 }
saloutos 0:083111ae2a11 1643
saloutos 0:083111ae2a11 1644 /**
saloutos 0:083111ae2a11 1645 * @brief Set DMA2D background CLUT color mode.
saloutos 0:083111ae2a11 1646 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
saloutos 0:083111ae2a11 1647 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1648 * @param CLUTColorMode This parameter can be one of the following values:
saloutos 0:083111ae2a11 1649 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
saloutos 0:083111ae2a11 1650 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
saloutos 0:083111ae2a11 1651 * @retval None
saloutos 0:083111ae2a11 1652 */
saloutos 0:083111ae2a11 1653 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
saloutos 0:083111ae2a11 1654 {
saloutos 0:083111ae2a11 1655 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
saloutos 0:083111ae2a11 1656 }
saloutos 0:083111ae2a11 1657
saloutos 0:083111ae2a11 1658 /**
saloutos 0:083111ae2a11 1659 * @brief Return DMA2D background CLUT color mode.
saloutos 0:083111ae2a11 1660 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
saloutos 0:083111ae2a11 1661 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1662 * @retval Returned value can be one of the following values:
saloutos 0:083111ae2a11 1663 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
saloutos 0:083111ae2a11 1664 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
saloutos 0:083111ae2a11 1665 */
saloutos 0:083111ae2a11 1666 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1667 {
saloutos 0:083111ae2a11 1668 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
saloutos 0:083111ae2a11 1669 }
saloutos 0:083111ae2a11 1670
saloutos 0:083111ae2a11 1671 /**
saloutos 0:083111ae2a11 1672 * @}
saloutos 0:083111ae2a11 1673 */
saloutos 0:083111ae2a11 1674
saloutos 0:083111ae2a11 1675 /**
saloutos 0:083111ae2a11 1676 * @}
saloutos 0:083111ae2a11 1677 */
saloutos 0:083111ae2a11 1678
saloutos 0:083111ae2a11 1679
saloutos 0:083111ae2a11 1680 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
saloutos 0:083111ae2a11 1681 * @{
saloutos 0:083111ae2a11 1682 */
saloutos 0:083111ae2a11 1683
saloutos 0:083111ae2a11 1684 /**
saloutos 0:083111ae2a11 1685 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
saloutos 0:083111ae2a11 1686 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
saloutos 0:083111ae2a11 1687 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1688 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1689 */
saloutos 0:083111ae2a11 1690 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1691 {
saloutos 0:083111ae2a11 1692 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
saloutos 0:083111ae2a11 1693 }
saloutos 0:083111ae2a11 1694
saloutos 0:083111ae2a11 1695 /**
saloutos 0:083111ae2a11 1696 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
saloutos 0:083111ae2a11 1697 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
saloutos 0:083111ae2a11 1698 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1699 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1700 */
saloutos 0:083111ae2a11 1701 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1702 {
saloutos 0:083111ae2a11 1703 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
saloutos 0:083111ae2a11 1704 }
saloutos 0:083111ae2a11 1705
saloutos 0:083111ae2a11 1706 /**
saloutos 0:083111ae2a11 1707 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
saloutos 0:083111ae2a11 1708 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
saloutos 0:083111ae2a11 1709 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1710 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1711 */
saloutos 0:083111ae2a11 1712 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1713 {
saloutos 0:083111ae2a11 1714 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
saloutos 0:083111ae2a11 1715 }
saloutos 0:083111ae2a11 1716
saloutos 0:083111ae2a11 1717 /**
saloutos 0:083111ae2a11 1718 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
saloutos 0:083111ae2a11 1719 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
saloutos 0:083111ae2a11 1720 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1721 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1722 */
saloutos 0:083111ae2a11 1723 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1724 {
saloutos 0:083111ae2a11 1725 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
saloutos 0:083111ae2a11 1726 }
saloutos 0:083111ae2a11 1727
saloutos 0:083111ae2a11 1728 /**
saloutos 0:083111ae2a11 1729 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
saloutos 0:083111ae2a11 1730 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
saloutos 0:083111ae2a11 1731 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1732 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1733 */
saloutos 0:083111ae2a11 1734 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1735 {
saloutos 0:083111ae2a11 1736 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
saloutos 0:083111ae2a11 1737 }
saloutos 0:083111ae2a11 1738
saloutos 0:083111ae2a11 1739 /**
saloutos 0:083111ae2a11 1740 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
saloutos 0:083111ae2a11 1741 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
saloutos 0:083111ae2a11 1742 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1743 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1744 */
saloutos 0:083111ae2a11 1745 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1746 {
saloutos 0:083111ae2a11 1747 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
saloutos 0:083111ae2a11 1748 }
saloutos 0:083111ae2a11 1749
saloutos 0:083111ae2a11 1750 /**
saloutos 0:083111ae2a11 1751 * @brief Clear DMA2D Configuration Error Interrupt Flag
saloutos 0:083111ae2a11 1752 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
saloutos 0:083111ae2a11 1753 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1754 * @retval None
saloutos 0:083111ae2a11 1755 */
saloutos 0:083111ae2a11 1756 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1757 {
saloutos 0:083111ae2a11 1758 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
saloutos 0:083111ae2a11 1759 }
saloutos 0:083111ae2a11 1760
saloutos 0:083111ae2a11 1761 /**
saloutos 0:083111ae2a11 1762 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
saloutos 0:083111ae2a11 1763 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
saloutos 0:083111ae2a11 1764 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1765 * @retval None
saloutos 0:083111ae2a11 1766 */
saloutos 0:083111ae2a11 1767 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1768 {
saloutos 0:083111ae2a11 1769 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
saloutos 0:083111ae2a11 1770 }
saloutos 0:083111ae2a11 1771
saloutos 0:083111ae2a11 1772 /**
saloutos 0:083111ae2a11 1773 * @brief Clear DMA2D CLUT Access Error Interrupt Flag
saloutos 0:083111ae2a11 1774 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
saloutos 0:083111ae2a11 1775 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1776 * @retval None
saloutos 0:083111ae2a11 1777 */
saloutos 0:083111ae2a11 1778 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1779 {
saloutos 0:083111ae2a11 1780 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
saloutos 0:083111ae2a11 1781 }
saloutos 0:083111ae2a11 1782
saloutos 0:083111ae2a11 1783 /**
saloutos 0:083111ae2a11 1784 * @brief Clear DMA2D Transfer Watermark Interrupt Flag
saloutos 0:083111ae2a11 1785 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
saloutos 0:083111ae2a11 1786 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1787 * @retval None
saloutos 0:083111ae2a11 1788 */
saloutos 0:083111ae2a11 1789 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1790 {
saloutos 0:083111ae2a11 1791 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
saloutos 0:083111ae2a11 1792 }
saloutos 0:083111ae2a11 1793
saloutos 0:083111ae2a11 1794 /**
saloutos 0:083111ae2a11 1795 * @brief Clear DMA2D Transfer Complete Interrupt Flag
saloutos 0:083111ae2a11 1796 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
saloutos 0:083111ae2a11 1797 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1798 * @retval None
saloutos 0:083111ae2a11 1799 */
saloutos 0:083111ae2a11 1800 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1801 {
saloutos 0:083111ae2a11 1802 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
saloutos 0:083111ae2a11 1803 }
saloutos 0:083111ae2a11 1804
saloutos 0:083111ae2a11 1805 /**
saloutos 0:083111ae2a11 1806 * @brief Clear DMA2D Transfer Error Interrupt Flag
saloutos 0:083111ae2a11 1807 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
saloutos 0:083111ae2a11 1808 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1809 * @retval None
saloutos 0:083111ae2a11 1810 */
saloutos 0:083111ae2a11 1811 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1812 {
saloutos 0:083111ae2a11 1813 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
saloutos 0:083111ae2a11 1814 }
saloutos 0:083111ae2a11 1815
saloutos 0:083111ae2a11 1816 /**
saloutos 0:083111ae2a11 1817 * @}
saloutos 0:083111ae2a11 1818 */
saloutos 0:083111ae2a11 1819
saloutos 0:083111ae2a11 1820 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
saloutos 0:083111ae2a11 1821 * @{
saloutos 0:083111ae2a11 1822 */
saloutos 0:083111ae2a11 1823
saloutos 0:083111ae2a11 1824 /**
saloutos 0:083111ae2a11 1825 * @brief Enable Configuration Error Interrupt
saloutos 0:083111ae2a11 1826 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
saloutos 0:083111ae2a11 1827 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1828 * @retval None
saloutos 0:083111ae2a11 1829 */
saloutos 0:083111ae2a11 1830 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1831 {
saloutos 0:083111ae2a11 1832 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
saloutos 0:083111ae2a11 1833 }
saloutos 0:083111ae2a11 1834
saloutos 0:083111ae2a11 1835 /**
saloutos 0:083111ae2a11 1836 * @brief Enable CLUT Transfer Complete Interrupt
saloutos 0:083111ae2a11 1837 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
saloutos 0:083111ae2a11 1838 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1839 * @retval None
saloutos 0:083111ae2a11 1840 */
saloutos 0:083111ae2a11 1841 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1842 {
saloutos 0:083111ae2a11 1843 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
saloutos 0:083111ae2a11 1844 }
saloutos 0:083111ae2a11 1845
saloutos 0:083111ae2a11 1846 /**
saloutos 0:083111ae2a11 1847 * @brief Enable CLUT Access Error Interrupt
saloutos 0:083111ae2a11 1848 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
saloutos 0:083111ae2a11 1849 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1850 * @retval None
saloutos 0:083111ae2a11 1851 */
saloutos 0:083111ae2a11 1852 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1853 {
saloutos 0:083111ae2a11 1854 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
saloutos 0:083111ae2a11 1855 }
saloutos 0:083111ae2a11 1856
saloutos 0:083111ae2a11 1857 /**
saloutos 0:083111ae2a11 1858 * @brief Enable Transfer Watermark Interrupt
saloutos 0:083111ae2a11 1859 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
saloutos 0:083111ae2a11 1860 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1861 * @retval None
saloutos 0:083111ae2a11 1862 */
saloutos 0:083111ae2a11 1863 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1864 {
saloutos 0:083111ae2a11 1865 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
saloutos 0:083111ae2a11 1866 }
saloutos 0:083111ae2a11 1867
saloutos 0:083111ae2a11 1868 /**
saloutos 0:083111ae2a11 1869 * @brief Enable Transfer Complete Interrupt
saloutos 0:083111ae2a11 1870 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
saloutos 0:083111ae2a11 1871 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1872 * @retval None
saloutos 0:083111ae2a11 1873 */
saloutos 0:083111ae2a11 1874 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1875 {
saloutos 0:083111ae2a11 1876 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
saloutos 0:083111ae2a11 1877 }
saloutos 0:083111ae2a11 1878
saloutos 0:083111ae2a11 1879 /**
saloutos 0:083111ae2a11 1880 * @brief Enable Transfer Error Interrupt
saloutos 0:083111ae2a11 1881 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
saloutos 0:083111ae2a11 1882 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1883 * @retval None
saloutos 0:083111ae2a11 1884 */
saloutos 0:083111ae2a11 1885 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1886 {
saloutos 0:083111ae2a11 1887 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
saloutos 0:083111ae2a11 1888 }
saloutos 0:083111ae2a11 1889
saloutos 0:083111ae2a11 1890 /**
saloutos 0:083111ae2a11 1891 * @brief Disable Configuration Error Interrupt
saloutos 0:083111ae2a11 1892 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
saloutos 0:083111ae2a11 1893 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1894 * @retval None
saloutos 0:083111ae2a11 1895 */
saloutos 0:083111ae2a11 1896 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1897 {
saloutos 0:083111ae2a11 1898 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
saloutos 0:083111ae2a11 1899 }
saloutos 0:083111ae2a11 1900
saloutos 0:083111ae2a11 1901 /**
saloutos 0:083111ae2a11 1902 * @brief Disable CLUT Transfer Complete Interrupt
saloutos 0:083111ae2a11 1903 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
saloutos 0:083111ae2a11 1904 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1905 * @retval None
saloutos 0:083111ae2a11 1906 */
saloutos 0:083111ae2a11 1907 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1908 {
saloutos 0:083111ae2a11 1909 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
saloutos 0:083111ae2a11 1910 }
saloutos 0:083111ae2a11 1911
saloutos 0:083111ae2a11 1912 /**
saloutos 0:083111ae2a11 1913 * @brief Disable CLUT Access Error Interrupt
saloutos 0:083111ae2a11 1914 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
saloutos 0:083111ae2a11 1915 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1916 * @retval None
saloutos 0:083111ae2a11 1917 */
saloutos 0:083111ae2a11 1918 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1919 {
saloutos 0:083111ae2a11 1920 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
saloutos 0:083111ae2a11 1921 }
saloutos 0:083111ae2a11 1922
saloutos 0:083111ae2a11 1923 /**
saloutos 0:083111ae2a11 1924 * @brief Disable Transfer Watermark Interrupt
saloutos 0:083111ae2a11 1925 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
saloutos 0:083111ae2a11 1926 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1927 * @retval None
saloutos 0:083111ae2a11 1928 */
saloutos 0:083111ae2a11 1929 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1930 {
saloutos 0:083111ae2a11 1931 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
saloutos 0:083111ae2a11 1932 }
saloutos 0:083111ae2a11 1933
saloutos 0:083111ae2a11 1934 /**
saloutos 0:083111ae2a11 1935 * @brief Disable Transfer Complete Interrupt
saloutos 0:083111ae2a11 1936 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
saloutos 0:083111ae2a11 1937 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1938 * @retval None
saloutos 0:083111ae2a11 1939 */
saloutos 0:083111ae2a11 1940 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1941 {
saloutos 0:083111ae2a11 1942 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
saloutos 0:083111ae2a11 1943 }
saloutos 0:083111ae2a11 1944
saloutos 0:083111ae2a11 1945 /**
saloutos 0:083111ae2a11 1946 * @brief Disable Transfer Error Interrupt
saloutos 0:083111ae2a11 1947 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
saloutos 0:083111ae2a11 1948 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1949 * @retval None
saloutos 0:083111ae2a11 1950 */
saloutos 0:083111ae2a11 1951 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1952 {
saloutos 0:083111ae2a11 1953 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
saloutos 0:083111ae2a11 1954 }
saloutos 0:083111ae2a11 1955
saloutos 0:083111ae2a11 1956 /**
saloutos 0:083111ae2a11 1957 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 1958 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
saloutos 0:083111ae2a11 1959 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1960 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1961 */
saloutos 0:083111ae2a11 1962 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1963 {
saloutos 0:083111ae2a11 1964 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
saloutos 0:083111ae2a11 1965 }
saloutos 0:083111ae2a11 1966
saloutos 0:083111ae2a11 1967 /**
saloutos 0:083111ae2a11 1968 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 1969 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
saloutos 0:083111ae2a11 1970 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1971 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1972 */
saloutos 0:083111ae2a11 1973 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1974 {
saloutos 0:083111ae2a11 1975 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
saloutos 0:083111ae2a11 1976 }
saloutos 0:083111ae2a11 1977
saloutos 0:083111ae2a11 1978 /**
saloutos 0:083111ae2a11 1979 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 1980 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
saloutos 0:083111ae2a11 1981 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1982 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1983 */
saloutos 0:083111ae2a11 1984 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1985 {
saloutos 0:083111ae2a11 1986 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
saloutos 0:083111ae2a11 1987 }
saloutos 0:083111ae2a11 1988
saloutos 0:083111ae2a11 1989 /**
saloutos 0:083111ae2a11 1990 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 1991 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
saloutos 0:083111ae2a11 1992 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 1993 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 1994 */
saloutos 0:083111ae2a11 1995 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 1996 {
saloutos 0:083111ae2a11 1997 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
saloutos 0:083111ae2a11 1998 }
saloutos 0:083111ae2a11 1999
saloutos 0:083111ae2a11 2000 /**
saloutos 0:083111ae2a11 2001 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 2002 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
saloutos 0:083111ae2a11 2003 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 2004 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 2005 */
saloutos 0:083111ae2a11 2006 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 2007 {
saloutos 0:083111ae2a11 2008 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
saloutos 0:083111ae2a11 2009 }
saloutos 0:083111ae2a11 2010
saloutos 0:083111ae2a11 2011 /**
saloutos 0:083111ae2a11 2012 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
saloutos 0:083111ae2a11 2013 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
saloutos 0:083111ae2a11 2014 * @param DMA2Dx DMA2D Instance
saloutos 0:083111ae2a11 2015 * @retval State of bit (1 or 0).
saloutos 0:083111ae2a11 2016 */
saloutos 0:083111ae2a11 2017 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
saloutos 0:083111ae2a11 2018 {
saloutos 0:083111ae2a11 2019 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
saloutos 0:083111ae2a11 2020 }
saloutos 0:083111ae2a11 2021
saloutos 0:083111ae2a11 2022
saloutos 0:083111ae2a11 2023
saloutos 0:083111ae2a11 2024 /**
saloutos 0:083111ae2a11 2025 * @}
saloutos 0:083111ae2a11 2026 */
saloutos 0:083111ae2a11 2027
saloutos 0:083111ae2a11 2028 #if defined(USE_FULL_LL_DRIVER)
saloutos 0:083111ae2a11 2029 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
saloutos 0:083111ae2a11 2030 * @{
saloutos 0:083111ae2a11 2031 */
saloutos 0:083111ae2a11 2032
saloutos 0:083111ae2a11 2033 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
saloutos 0:083111ae2a11 2034 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
saloutos 0:083111ae2a11 2035 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
saloutos 0:083111ae2a11 2036 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
saloutos 0:083111ae2a11 2037 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
saloutos 0:083111ae2a11 2038 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
saloutos 0:083111ae2a11 2039 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
saloutos 0:083111ae2a11 2040 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
saloutos 0:083111ae2a11 2041 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
saloutos 0:083111ae2a11 2042 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
saloutos 0:083111ae2a11 2043 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
saloutos 0:083111ae2a11 2044
saloutos 0:083111ae2a11 2045 /**
saloutos 0:083111ae2a11 2046 * @}
saloutos 0:083111ae2a11 2047 */
saloutos 0:083111ae2a11 2048 #endif /* USE_FULL_LL_DRIVER */
saloutos 0:083111ae2a11 2049
saloutos 0:083111ae2a11 2050 /**
saloutos 0:083111ae2a11 2051 * @}
saloutos 0:083111ae2a11 2052 */
saloutos 0:083111ae2a11 2053
saloutos 0:083111ae2a11 2054 /**
saloutos 0:083111ae2a11 2055 * @}
saloutos 0:083111ae2a11 2056 */
saloutos 0:083111ae2a11 2057
saloutos 0:083111ae2a11 2058 #endif /* defined (DMA2D) */
saloutos 0:083111ae2a11 2059
saloutos 0:083111ae2a11 2060 /**
saloutos 0:083111ae2a11 2061 * @}
saloutos 0:083111ae2a11 2062 */
saloutos 0:083111ae2a11 2063
saloutos 0:083111ae2a11 2064 #ifdef __cplusplus
saloutos 0:083111ae2a11 2065 }
saloutos 0:083111ae2a11 2066 #endif
saloutos 0:083111ae2a11 2067
saloutos 0:083111ae2a11 2068 #endif /* __STM32F7xx_LL_DMA2D_H */
saloutos 0:083111ae2a11 2069
saloutos 0:083111ae2a11 2070 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/