DRV.cpp

00001 #include "mbed.h"
00002 #include "DRV.h"
00003 
00004 DRV832x::DRV832x(SPI *spi, DigitalOut *cs){
00005     _spi = spi;
00006     _cs = cs;
00007     _cs->write(1);
00008     wait_us(10);
00009     _spi->format(16, 1);
00010     _spi->frequency(500000);
00011     }
00012     
00013 uint16_t DRV832x::spi_write(uint16_t val)
00014 {
00015     _cs->write(0);
00016     wait_us(10);
00017     uint16_t reply = _spi->write(val);
00018     _cs->write(1);
00019     return reply;
00020     }
00021     
00022 int DRV832x::read_FSR1(void)
00023 {
00024     uint16_t val = (1<<15) | FSR1;
00025     return spi_write(val); 
00026     }
00027     
00028 int DRV832x::read_FSR2(void)
00029 {
00030     uint16_t val = (1<<15) | FSR2;
00031     return spi_write(val);
00032     }
00033     
00034 int DRV832x::read_register(int reg)
00035 {
00036     return spi_write((1<<15) | (reg<<11));
00037     }
00038     
00039 void DRV832x::write_register(int reg, int val)
00040 {
00041     spi_write((reg<<11) | val);
00042     }
00043 void DRV832x::write_DCR(int DIS_CPUV, int DIS_GDF, int OTW_REP, int PWM_MODE, int PWM_COM, int PWM_DIR, int COAST, int BRAKE, int CLR_FLT)
00044 {
00045     uint16_t val = (DCR<<11) | (DIS_CPUV<<9) | (DIS_GDF<<8) | (OTW_REP<<7) | (PWM_MODE<<5) | (PWM_COM<<4) | (PWM_DIR<<3) | (COAST<<2) | (BRAKE<<1) | CLR_FLT;
00046     spi_write(val);
00047     }
00048 void DRV832x::write_HSR(int LOCK, int IDRIVEP_HS, int IDRIVEN_HS)
00049 {
00050     uint16_t val = (HSR<<11) | (LOCK<<8) | (IDRIVEP_HS<<4) | IDRIVEN_HS;
00051     spi_write(val);
00052     }
00053 void DRV832x::write_LSR(int CBC, int TDRIVE, int IDRIVEP_LS, int IDRIVEN_LS)
00054 {
00055     uint16_t val = (LSR<<11) | (CBC<<10) | (TDRIVE<<8) | (IDRIVEP_LS<<4) | IDRIVEN_LS;
00056     spi_write(val);
00057     }
00058 void DRV832x::write_OCPCR(int TRETRY, int DEAD_TIME, int OCP_MODE, int OCP_DEG, int VDS_LVL)
00059 {
00060     uint16_t val = (OCPCR<<11) | (TRETRY<<10) | (DEAD_TIME<<8) | (OCP_MODE<<6) | (OCP_DEG<<4) | VDS_LVL;
00061     spi_write(val);
00062     }
00063 void DRV832x::write_CSACR(int CSA_FET, int VREF_DIV, int LS_REF, int CSA_GAIN, int DIS_SEN, int CSA_CAL_A, int CSA_CAL_B, int CSA_CAL_C, int SEN_LVL)
00064 {
00065     uint16_t val = (CSACR<<11) | (CSA_FET<<10) | (VREF_DIV<<9) | (LS_REF<<8) | (CSA_GAIN<<6) | (DIS_SEN<<5) | (CSA_CAL_A<<4) | (CSA_CAL_B<<3) | (CSA_CAL_C<<2) | SEN_LVL;
00066     spi_write(val);
00067         }
00068         
00069 void DRV832x::print_faults(void)
00070 {
00071     uint16_t val1 = read_FSR1();
00072     wait_us(10);
00073     uint16_t val2 = read_FSR2();
00074     wait_us(10);
00075     
00076     if(val1 & (1<<10)){printf("\n\rFAULT\n\r");}
00077 
00078     if(val1 & (1<<9)){printf("VDS_OCP\n\r");}
00079     if(val1 & (1<<8)){printf("GDF\n\r");}
00080     if(val1 & (1<<7)){printf("UVLO\n\r");}
00081     if(val1 & (1<<6)){printf("OTSD\n\r");}
00082     if(val1 & (1<<5)){printf("VDS_HA\n\r");}
00083     if(val1 & (1<<4)){printf("VDS_LA\n\r");}
00084     if(val1 & (1<<3)){printf("VDS_HB\n\r");}
00085     if(val1 & (1<<2)){printf("VDS_LB\n\r");}
00086     if(val1 & (1<<1)){printf("VDS_HC\n\r");}
00087     if(val1 & (1)){printf("VDS_LC\n\r");}
00088     
00089     if(val2 & (1<<10)){printf("SA_OC\n\r");}
00090     if(val2 & (1<<9)){printf("SB_OC\n\r");}
00091     if(val2 & (1<<8)){printf("SC_OC\n\r");}
00092     if(val2 & (1<<7)){printf("OTW\n\r");}
00093     if(val2 & (1<<6)){printf("CPUV\n\r");}
00094     if(val2 & (1<<5)){printf("VGS_HA\n\r");}
00095     if(val2 & (1<<4)){printf("VGS_LA\n\r");}
00096     if(val2 & (1<<3)){printf("VGS_HB\n\r");}
00097     if(val2 & (1<<2)){printf("VGS_LB\n\r");}
00098     if(val2 & (1<<1)){printf("VGS_HC\n\r");}
00099     if(val2 & (1)){printf("VGS_LC\n\r");}
00100     }
00101     
00102 void DRV832x::enable_gd(void)
00103 {
00104     uint16_t val = (read_register(DCR)) & (~(0x1<<2));
00105     write_register(DCR, val);
00106     }
00107     
00108 void DRV832x::disable_gd(void)
00109 {
00110     uint16_t val = (read_register(DCR)) | (0x1<<2);    
00111     write_register(DCR, val);
00112     }
00113     
00114 void DRV832x::calibrate(void)
00115 {
00116     uint16_t val = 0x1<<4 + 0x1<<3 + 0x1<<2;
00117     write_register(CSACR, val);
00118     }