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Revision 117:e0a7df0a9a56, committed 2014-03-12
- Comitter:
- mbed_official
- Date:
- Wed Mar 12 10:30:07 2014 +0000
- Parent:
- 116:471443864d4b
- Child:
- 118:b44c45162f28
- Commit message:
- Synchronized with git revision 6b2f3120cfef5765bc1bade48c495873f627f9bc
Full URL: https://github.com/mbedmicro/mbed/commit/6b2f3120cfef5765bc1bade48c495873f627f9bc/
[LPC1549] Added AnalogOut API and PWM improvement
Changed in this revision
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/PeripheralNames.h Tue Mar 11 17:15:06 2014 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/PeripheralNames.h Wed Mar 12 10:30:07 2014 +0000
@@ -49,6 +49,9 @@
ADC1_11,
} ADCName;
+typedef enum {
+ DAC0_0 = 0,
+} DACName;
#ifdef __cplusplus
}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogout_api.c Wed Mar 12 10:30:07 2014 +0000
@@ -0,0 +1,73 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "analogout_api.h"
+#include "cmsis.h"
+#include "pinmap.h"
+#include "error.h"
+
+void analogout_init(dac_t *obj, PinName pin) {
+ if (pin != P0_12) {
+ error("DAC pin mapping failed");
+ }
+
+ LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 29);
+ LPC_SYSCON->PDRUNCFG &= ~(1 << 12);
+ LPC_IOCON->PIO0_12 = 0;
+ LPC_SWM->PINENABLE0 &= ~(1 << 24);
+ LPC_DAC->CTRL = 0;
+
+ analogout_write_u16(obj, 0);
+}
+
+void analogout_free(dac_t *obj)
+{
+ LPC_SYSCON->SYSAHBCLKCTRL0 &= ~(1 << 29);
+ LPC_SWM->PINENABLE0 |= (1 << 24);
+}
+
+static inline void dac_write(int value) {
+ value &= 0xFFF; // 12-bit
+
+ // Set the DAC output
+ LPC_DAC->VAL = (value << 4);
+}
+
+static inline int dac_read() {
+ return ((LPC_DAC->VAL >> 4) & 0xFFF);
+}
+
+void analogout_write(dac_t *obj, float value) {
+ if (value < 0.0f) {
+ dac_write(0);
+ } else if (value > 1.0f) {
+ dac_write(0xFFF);
+ } else {
+ dac_write((uint32_t)(value * (float)0xFFF));
+ }
+}
+
+void analogout_write_u16(dac_t *obj, uint16_t value) {
+ dac_write(value);
+}
+
+float analogout_read(dac_t *obj) {
+ uint32_t value = dac_read();
+ return (float)value * (1.0f / (float)0xFFF);
+}
+
+uint16_t analogout_read_u16(dac_t *obj) {
+ return (uint16_t)dac_read();
+}
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/device.h Tue Mar 11 17:15:06 2014 +0000 +++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/device.h Wed Mar 12 10:30:07 2014 +0000 @@ -23,7 +23,7 @@ #define DEVICE_INTERRUPTIN 1 #define DEVICE_ANALOGIN 1 -#define DEVICE_ANALOGOUT 0 +#define DEVICE_ANALOGOUT 1 #define DEVICE_SERIAL 1 #define DEVICE_SERIAL_FC 1
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/i2c_api.c Tue Mar 11 17:15:06 2014 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/i2c_api.c Wed Mar 12 10:30:07 2014 +0000
@@ -29,7 +29,7 @@
// Wait until the Serial Interrupt (SI) is set
static int i2c_wait_SI(i2c_t *obj) {
- int timeout = 0;
+ volatile int timeout = 0;
while (!(LPC_I2C0->STAT & (1 << 0))) {
timeout++;
if (timeout > 100000) return -1;
@@ -41,25 +41,21 @@
LPC_I2C0->CFG |= (1 << 0);
}
-static inline void i2c_power_enable(i2c_t *obj) {
+void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
+ if ((sda != P0_23) | (scl != P0_22)) {
+ error("I2C pin mapping failed");
+ }
+
// Enables clock for I2C0
- LPC_SYSCON->SYSAHBCLKCTRL1 |= (1<<13);
-// LPC_SYSCON->PRESETCTRL1 &= ~(0x1<<13);
- LPC_SYSCON->PRESETCTRL1 |= (0x1<<13);
- LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << 13);
+ LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 13);
-}
+ LPC_SYSCON->PRESETCTRL1 |= (1 << 13);
+ LPC_SYSCON->PRESETCTRL1 &= ~(1 << 13);
-void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
-
- // sè`ÌmFǤµæ¤c
-
-
- // enable power
- i2c_power_enable(obj);
// pin enable
LPC_SWM->PINENABLE1 &= ~(0x3 << 3);
- // set default frequency at 100k
+
+ // set default frequency at 100kHz
i2c_frequency(obj, 100000);
i2c_interface_enable(obj);
}
@@ -76,7 +72,7 @@
}
inline int i2c_stop(i2c_t *obj) {
- int timeout = 0;
+ volatile int timeout = 0;
LPC_I2C0->MSTCTL = (1 << 2) | (1 << 0);
while ((LPC_I2C0->STAT & ((1 << 0) | (7 << 1))) != ((1 << 0) | (0 << 1))) {
@@ -107,14 +103,12 @@
LPC_I2C0->MSTCTL = (1 << 0);
// return the data
- //return (I2C_DAT(obj) & 0xFF);
return (LPC_I2C0->MSTDAT & 0xFF);
}
void i2c_frequency(i2c_t *obj, int hz) {
// No peripheral clock divider on the M0
uint32_t PCLK = SystemCoreClock;
-
uint32_t clkdiv = PCLK / (hz * 4) - 1;
LPC_I2C0->DIV = clkdiv;
@@ -123,19 +117,15 @@
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
int count, status;
- int timeout = 0;
i2c_start(obj);
- //status = i2c_do_write(obj, (address | 0x01), 1);
LPC_I2C0->MSTDAT = (address | 0x01);
LPC_I2C0->MSTCTL |= 0x20;
- while (!(LPC_I2C0->STAT & (1 << 0))) {
- timeout++;
- if (timeout > 100000) return -1;
- }
+ if (i2c_wait_SI(obj) == -1)
+ return -1;
+
status = ((LPC_I2C0->STAT >> 1) & (0x07));
-
if (status != 0x01) {
i2c_stop(obj);
return I2C_ERROR_NO_SLAVE;
@@ -143,39 +133,27 @@
// Read in all except last byte
for (count = 0; count < (length - 1); count++) {
- //int value = i2c_do_read(obj, 0);
- while (!(LPC_I2C0->STAT & (1 << 0))) {
- timeout++;
- if (timeout > 100000) return -1;
- }
- if (!0)
- LPC_I2C0->MSTCTL = (1 << 0);
- data[count] = (LPC_I2C0->MSTDAT & 0xFF);
- //
- status = ((LPC_I2C0->STAT >> 1) & (0x07));
+ if (i2c_wait_SI(obj) == -1)
+ return -1;
+ LPC_I2C0->MSTCTL = (1 << 0);
+ data[count] = (LPC_I2C0->MSTDAT & 0xFF);
+ status = ((LPC_I2C0->STAT >> 1) & (0x07));
if (status != 0x00) {
i2c_stop(obj);
return count;
}
- //data[count] = (char) value;
}
// read in last byte
- //int value = i2c_do_read(obj, 1);
- while (!(LPC_I2C0->STAT & (1 << 0))) {
- timeout++;
- if (timeout > 100000) return -1;
- }
+ if (i2c_wait_SI(obj) == -1)
+ return -1;
+
data[count] = (LPC_I2C0->MSTDAT & 0xFF);
- //
status = i2c_status(obj);
if (status != 0x01) {
i2c_stop(obj);
return length - 1;
}
-
- //data[count] = (char) value;
-
// If not repeated start, send stop.
if (stop) {
i2c_stop(obj);
@@ -188,35 +166,27 @@
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
int i, status;
- int timeout = 0;
i2c_start(obj);
- //status = i2c_do_write(obj, (address & 0xFE), 1);
LPC_I2C0->MSTDAT = (address & 0xFE);
LPC_I2C0->MSTCTL |= 0x20;
- // wait and return status
- while (!(LPC_I2C0->STAT & (1 << 0))) {
- timeout++;
- if (timeout > 100000) return -1;
- }
+ if (i2c_wait_SI(obj) == -1)
+ return -1;
+
status = ((LPC_I2C0->STAT >> 1) & (0x07));
-
if (status != 0x02) {
i2c_stop(obj);
return I2C_ERROR_NO_SLAVE;
}
for (i=0; i<length; i++) {
- //status = i2c_do_write(obj, data[i], 0);
LPC_I2C0->MSTDAT = data[i];
LPC_I2C0->MSTCTL = (1 << 0);
- // wait and return status
- while (!(LPC_I2C0->STAT & (1 << 0))) {
- timeout++;
- if (timeout > 100000) return -1;
- }
- status = ((LPC_I2C0->STAT >> 1) & (0x07));
+ if (i2c_wait_SI(obj) == -1)
+ return -1;
+
+ status = ((LPC_I2C0->STAT >> 1) & (0x07));
if (status != 0x02) {
i2c_stop(obj);
return i;
@@ -242,17 +212,9 @@
}
int i2c_byte_write(i2c_t *obj, int data) {
- int ack;
- int status = i2c_do_write(obj, (data & 0xFF), 0);
-
- switch(status) {
- case 2:
- ack = 1;
- break;
- default:
- ack = 0;
- break;
+ if (i2c_do_write(obj, (data & 0xFF), 0) == 2) {
+ return 1;
+ } else {
+ return 0;
}
-
- return ack;
}
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/objects.h Tue Mar 11 17:15:06 2014 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/objects.h Wed Mar 12 10:30:07 2014 +0000
@@ -43,6 +43,10 @@
ADCName adc;
};
+struct dac_s {
+ DACName dac;
+};
+
struct i2c_s {
LPC_I2C0_Type *i2c;
};
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c Tue Mar 11 17:15:06 2014 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c Wed Mar 12 10:30:07 2014 +0000
@@ -30,8 +30,7 @@
static unsigned char sct_used = 0;
static int get_available_sct(void) {
int i;
- // start from 1, since 0 is used by ticker at the moment
- for (i=1; i<4; i++) {
+ for (i=0; i<4; i++) {
if ((sct_used & (1 << i)) == 0)
return i;
}
@@ -61,6 +60,11 @@
LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
switch(obj->pwm_ch) {
+ case 0:
+ // SCT0_OUT0
+ LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
+ LPC_SWM->PINASSIGN[7] |= (pin << 8);
+ break;
case 1:
// SCT1_OUT0
LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c Tue Mar 11 17:15:06 2014 +0000
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c Wed Mar 12 10:30:07 2014 +0000
@@ -17,7 +17,7 @@
#include "us_ticker_api.h"
#include "PeripheralNames.h"
-#define US_TICKER_TIMER_IRQn SCT0_IRQn
+#define US_TICKER_TIMER_IRQn RIT_IRQn
int us_ticker_inited = 0;
@@ -25,25 +25,24 @@
if (us_ticker_inited) return;
us_ticker_inited = 1;
- // Enable the SCT0 clock
- LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 2);
+ // Enable the RIT clock
+ LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 1);
- // Clear peripheral reset the SCT0:
- LPC_SYSCON->PRESETCTRL1 |= (1 << 2);
- LPC_SYSCON->PRESETCTRL1 &= ~(1 << 2);
-
- // Unified counter (32 bits)
- LPC_SCT0->CONFIG |= 1;
+ // Clear peripheral reset the RIT
+ LPC_SYSCON->PRESETCTRL1 |= (1 << 1);
+ LPC_SYSCON->PRESETCTRL1 &= ~(1 << 1);
- // halt and clear the counter
- LPC_SCT0->CTRL |= (1 << 2) | (1 << 3);
+ LPC_RIT->MASK = 0;
+ LPC_RIT->MASK_H = 0;
- // System Clock (12)MHz -> us_ticker (1)MHz
- LPC_SCT0->CTRL |= ((SystemCoreClock/1000000 - 1) << 5);
-
- // unhalt the counter:
- // - clearing bit 2 of the CTRL register
- LPC_SCT0->CTRL &= ~(1 << 2);
+ LPC_RIT->COUNTER = 0;
+ LPC_RIT->COUNTER_H = 0;
+
+ LPC_RIT->COMPVAL = 0xffffffff;
+ LPC_RIT->COMPVAL_H = 0x0000ffff;
+
+ // Timer enable, enable for debug
+ LPC_RIT->CTRL = 0xC;
NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
@@ -53,42 +52,22 @@
if (!us_ticker_inited)
us_ticker_init();
- return LPC_SCT0->COUNT;
+ uint64_t temp;
+ temp = LPC_RIT->COUNTER | ((uint64_t)LPC_RIT->COUNTER_H << 32);
+ temp /= (SystemCoreClock/1000000);
+ return (uint32_t)temp;
}
void us_ticker_set_interrupt(unsigned int timestamp) {
- // halt the counter:
- // - setting bit 2 of the CTRL register
- LPC_SCT0->CTRL |= (1 << 2);
-
- // set timestamp in compare register
- LPC_SCT0->MATCH0 = timestamp;
-
- // unhalt the counter:
- // - clearing bit 2 of the CTRL register
- LPC_SCT0->CTRL &= ~(1 << 2);
-
- // if events are not enabled, enable them
- if (!(LPC_SCT0->EVEN & 0x01)) {
-
- // comb mode = match only
- LPC_SCT0->EV0_CTRL = (1 << 12);
-
- // ref manual:
- // In simple applications that do not
- // use states, write 0x01 to this
- // register to enable an event
- LPC_SCT0->EV0_STATE |= 0x1;
-
- // enable events
- LPC_SCT0->EVEN |= 0x1;
- }
+ uint64_t temp = ((uint64_t)timestamp * (SystemCoreClock/1000000));
+ LPC_RIT->COMPVAL = (temp & 0xFFFFFFFFL);
+ LPC_RIT->COMPVAL_H = ((temp >> 32)& 0x0000FFFFL);
}
void us_ticker_disable_interrupt(void) {
- LPC_SCT0->EVEN &= ~1;
+ LPC_RIT->CTRL |= (1 << 3);
}
void us_ticker_clear_interrupt(void) {
- LPC_SCT0->EVFLAG = 1;
+ LPC_RIT->CTRL |= (1 << 0);
}
