Mateusz Kowalik / Application_danix

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Fork of Application by Daniel Sygut

mbed-dev/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_sram.h@15:2a20c3d2616e, 2018-02-15 (annotated)

Committer:
Zaitsev
Date:
Thu Feb 15 14:29:23 2018 +0000
Revision:
15:2a20c3d2616e
Parent:
10:41552d038a69 
j

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Zaitsev 10:41552d038a69 1 /**
Zaitsev 10:41552d038a69 2 ******************************************************************************
Zaitsev 10:41552d038a69 3 * @file stm32f3xx_hal_sram.h
Zaitsev 10:41552d038a69 4 * @author MCD Application Team
Zaitsev 10:41552d038a69 5 * @version V1.3.0
Zaitsev 10:41552d038a69 6 * @date 01-July-2016
Zaitsev 10:41552d038a69 7 * @brief Header file of SRAM HAL module.
Zaitsev 10:41552d038a69 8 ******************************************************************************
Zaitsev 10:41552d038a69 9 * @attention
Zaitsev 10:41552d038a69 10 *
Zaitsev 10:41552d038a69 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Zaitsev 10:41552d038a69 12 *
Zaitsev 10:41552d038a69 13 * Redistribution and use in source and binary forms, with or without modification,
Zaitsev 10:41552d038a69 14 * are permitted provided that the following conditions are met:
Zaitsev 10:41552d038a69 15 * 1. Redistributions of source code must retain the above copyright notice,
Zaitsev 10:41552d038a69 16 * this list of conditions and the following disclaimer.
Zaitsev 10:41552d038a69 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Zaitsev 10:41552d038a69 18 * this list of conditions and the following disclaimer in the documentation
Zaitsev 10:41552d038a69 19 * and/or other materials provided with the distribution.
Zaitsev 10:41552d038a69 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Zaitsev 10:41552d038a69 21 * may be used to endorse or promote products derived from this software
Zaitsev 10:41552d038a69 22 * without specific prior written permission.
Zaitsev 10:41552d038a69 23 *
Zaitsev 10:41552d038a69 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Zaitsev 10:41552d038a69 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Zaitsev 10:41552d038a69 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Zaitsev 10:41552d038a69 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Zaitsev 10:41552d038a69 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Zaitsev 10:41552d038a69 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Zaitsev 10:41552d038a69 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Zaitsev 10:41552d038a69 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Zaitsev 10:41552d038a69 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Zaitsev 10:41552d038a69 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Zaitsev 10:41552d038a69 34 *
Zaitsev 10:41552d038a69 35 ******************************************************************************
Zaitsev 10:41552d038a69 36 */
Zaitsev 10:41552d038a69 37
Zaitsev 10:41552d038a69 38 /* Define to prevent recursive inclusion -------------------------------------*/
Zaitsev 10:41552d038a69 39 #ifndef __STM32F3xx_HAL_SRAM_H
Zaitsev 10:41552d038a69 40 #define __STM32F3xx_HAL_SRAM_H
Zaitsev 10:41552d038a69 41
Zaitsev 10:41552d038a69 42 #ifdef __cplusplus
Zaitsev 10:41552d038a69 43 extern "C" {
Zaitsev 10:41552d038a69 44 #endif
Zaitsev 10:41552d038a69 45
Zaitsev 10:41552d038a69 46 /* Includes ------------------------------------------------------------------*/
Zaitsev 10:41552d038a69 47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
Zaitsev 10:41552d038a69 48 #include "stm32f3xx_ll_fmc.h"
Zaitsev 10:41552d038a69 49
Zaitsev 10:41552d038a69 50 /** @addtogroup STM32F3xx_HAL_Driver
Zaitsev 10:41552d038a69 51 * @{
Zaitsev 10:41552d038a69 52 */
Zaitsev 10:41552d038a69 53
Zaitsev 10:41552d038a69 54 /** @addtogroup SRAM
Zaitsev 10:41552d038a69 55 * @{
Zaitsev 10:41552d038a69 56 */
Zaitsev 10:41552d038a69 57
Zaitsev 10:41552d038a69 58 /* Exported typedef ----------------------------------------------------------*/
Zaitsev 10:41552d038a69 59
Zaitsev 10:41552d038a69 60 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Zaitsev 10:41552d038a69 61 * @{
Zaitsev 10:41552d038a69 62 */
Zaitsev 10:41552d038a69 63 /**
Zaitsev 10:41552d038a69 64 * @brief HAL SRAM State structures definition
Zaitsev 10:41552d038a69 65 */
Zaitsev 10:41552d038a69 66 typedef enum
Zaitsev 10:41552d038a69 67 {
Zaitsev 10:41552d038a69 68 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Zaitsev 10:41552d038a69 69 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Zaitsev 10:41552d038a69 70 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Zaitsev 10:41552d038a69 71 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Zaitsev 10:41552d038a69 72 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Zaitsev 10:41552d038a69 73
Zaitsev 10:41552d038a69 74 }HAL_SRAM_StateTypeDef;
Zaitsev 10:41552d038a69 75
Zaitsev 10:41552d038a69 76 /**
Zaitsev 10:41552d038a69 77 * @brief SRAM handle Structure definition
Zaitsev 10:41552d038a69 78 */
Zaitsev 10:41552d038a69 79 typedef struct
Zaitsev 10:41552d038a69 80 {
Zaitsev 10:41552d038a69 81 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Zaitsev 10:41552d038a69 82
Zaitsev 10:41552d038a69 83 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Zaitsev 10:41552d038a69 84
Zaitsev 10:41552d038a69 85 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Zaitsev 10:41552d038a69 86
Zaitsev 10:41552d038a69 87 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Zaitsev 10:41552d038a69 88
Zaitsev 10:41552d038a69 89 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Zaitsev 10:41552d038a69 90
Zaitsev 10:41552d038a69 91 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Zaitsev 10:41552d038a69 92
Zaitsev 10:41552d038a69 93 }SRAM_HandleTypeDef;
Zaitsev 10:41552d038a69 94
Zaitsev 10:41552d038a69 95 /**
Zaitsev 10:41552d038a69 96 * @}
Zaitsev 10:41552d038a69 97 */
Zaitsev 10:41552d038a69 98
Zaitsev 10:41552d038a69 99 /* Exported constants --------------------------------------------------------*/
Zaitsev 10:41552d038a69 100 /* Exported macro ------------------------------------------------------------*/
Zaitsev 10:41552d038a69 101
Zaitsev 10:41552d038a69 102 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Zaitsev 10:41552d038a69 103 * @{
Zaitsev 10:41552d038a69 104 */
Zaitsev 10:41552d038a69 105
Zaitsev 10:41552d038a69 106 /** @brief Reset SRAM handle state
Zaitsev 10:41552d038a69 107 * @param __HANDLE__: SRAM handle
Zaitsev 10:41552d038a69 108 * @retval None
Zaitsev 10:41552d038a69 109 */
Zaitsev 10:41552d038a69 110 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Zaitsev 10:41552d038a69 111
Zaitsev 10:41552d038a69 112 /**
Zaitsev 10:41552d038a69 113 * @}
Zaitsev 10:41552d038a69 114 */
Zaitsev 10:41552d038a69 115
Zaitsev 10:41552d038a69 116 /* Exported functions --------------------------------------------------------*/
Zaitsev 10:41552d038a69 117 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
Zaitsev 10:41552d038a69 118 * @{
Zaitsev 10:41552d038a69 119 */
Zaitsev 10:41552d038a69 120
Zaitsev 10:41552d038a69 121 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
Zaitsev 10:41552d038a69 122 * @{
Zaitsev 10:41552d038a69 123 */
Zaitsev 10:41552d038a69 124
Zaitsev 10:41552d038a69 125 /* Initialization/de-initialization functions ********************************/
Zaitsev 10:41552d038a69 126 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Zaitsev 10:41552d038a69 127 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 128 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 129 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 130
Zaitsev 10:41552d038a69 131 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Zaitsev 10:41552d038a69 132 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Zaitsev 10:41552d038a69 133
Zaitsev 10:41552d038a69 134 /**
Zaitsev 10:41552d038a69 135 * @}
Zaitsev 10:41552d038a69 136 */
Zaitsev 10:41552d038a69 137
Zaitsev 10:41552d038a69 138 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
Zaitsev 10:41552d038a69 139 * @{
Zaitsev 10:41552d038a69 140 */
Zaitsev 10:41552d038a69 141
Zaitsev 10:41552d038a69 142 /* I/O operation functions ***************************************************/
Zaitsev 10:41552d038a69 143 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 144 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 145 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 146 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 147 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 148 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 149 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 150 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Zaitsev 10:41552d038a69 151
Zaitsev 10:41552d038a69 152 /**
Zaitsev 10:41552d038a69 153 * @}
Zaitsev 10:41552d038a69 154 */
Zaitsev 10:41552d038a69 155
Zaitsev 10:41552d038a69 156 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
Zaitsev 10:41552d038a69 157 * @{
Zaitsev 10:41552d038a69 158 */
Zaitsev 10:41552d038a69 159
Zaitsev 10:41552d038a69 160 /* SRAM Control functions ****************************************************/
Zaitsev 10:41552d038a69 161 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 162 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 163
Zaitsev 10:41552d038a69 164 /**
Zaitsev 10:41552d038a69 165 * @}
Zaitsev 10:41552d038a69 166 */
Zaitsev 10:41552d038a69 167
Zaitsev 10:41552d038a69 168 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
Zaitsev 10:41552d038a69 169 * @{
Zaitsev 10:41552d038a69 170 */
Zaitsev 10:41552d038a69 171
Zaitsev 10:41552d038a69 172 /* SRAM Peripheral State functions ********************************************/
Zaitsev 10:41552d038a69 173 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Zaitsev 10:41552d038a69 174
Zaitsev 10:41552d038a69 175 /**
Zaitsev 10:41552d038a69 176 * @}
Zaitsev 10:41552d038a69 177 */
Zaitsev 10:41552d038a69 178
Zaitsev 10:41552d038a69 179 /**
Zaitsev 10:41552d038a69 180 * @}
Zaitsev 10:41552d038a69 181 */
Zaitsev 10:41552d038a69 182
Zaitsev 10:41552d038a69 183 /**
Zaitsev 10:41552d038a69 184 * @}
Zaitsev 10:41552d038a69 185 */
Zaitsev 10:41552d038a69 186
Zaitsev 10:41552d038a69 187 /**
Zaitsev 10:41552d038a69 188 * @}
Zaitsev 10:41552d038a69 189 */
Zaitsev 10:41552d038a69 190
Zaitsev 10:41552d038a69 191 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
Zaitsev 10:41552d038a69 192
Zaitsev 10:41552d038a69 193 #ifdef __cplusplus
Zaitsev 10:41552d038a69 194 }
Zaitsev 10:41552d038a69 195 #endif
Zaitsev 10:41552d038a69 196
Zaitsev 10:41552d038a69 197 #endif /* __STM32F3xx_HAL_SRAM_H */
Zaitsev 10:41552d038a69 198
Zaitsev 10:41552d038a69 199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/