encoderHAL.cpp

00001 #include "encoderHAL.h"
00002 
00003 namespace mbed
00004 {   
00005 
00006     encoderHAL::encoderHAL(TIM_TypeDef * _TIM)
00007     {
00008         TIM = _TIM;
00009         // Initialisation of the TIM module as an encoder counter
00010         EncoderInit(&encoder, &timer, _TIM, 0xffff, TIM_ENCODERMODE_TI12);
00011 
00012         // Update (aka over- and underflow) interrupt enabled
00013         TIM->DIER |= 0x0001;
00014         // The initialisation process generates an update interrupt, so we'll have to clear the update flag before anything else
00015         TIM->SR &= 0xfffe;
00016         //generate update event
00017         TIM->EGR = 1;
00018         //enable counter
00019         TIM->CR1 = 1;
00020         
00021     }
00022     
00023     encoderHAL::encoderHAL(TIM_TypeDef * _TIM, uint32_t _maxcount, uint32_t _encmode)
00024     {
00025         TIM = _TIM;
00026         // Initialisation of the TIM module as an encoder counter
00027         EncoderInit(&encoder, &timer, _TIM, _maxcount, _encmode);
00028 
00029         // Update (aka over- and underflow) interrupt enabled
00030         TIM->DIER |= 0x0001;
00031         // The initialisation process generates an update interrupt, so we'll have to clear the update flag before anything else
00032         TIM->SR &= 0xfffe;
00033     }
00034     
00035     encoderHAL::encoderHAL(TIM_Encoder_InitTypeDef * _encoder, TIM_HandleTypeDef * _timer, TIM_TypeDef * _TIM, uint32_t _maxcount, uint32_t _encmode)
00036     {
00037         timer = *_timer;
00038         encoder = *_encoder;
00039         TIM = _TIM;
00040         // Initialisation of the TIM module as an encoder counter
00041         EncoderInit(&encoder, &timer, _TIM, _maxcount, _encmode);
00042 
00043         // Update (aka over- and underflow) interrupt enabled
00044         TIM->DIER |= 0x0001;
00045         // The initialisation process generates an update interrupt, so we'll have to clear the update flag before anything else
00046         TIM->SR &= 0xfffe;
00047     }
00048 
00049     
00050     int32_t encoderHAL::getPulses(bool reset)
00051     {
00052         int16_t count = TIM->CNT;
00053         if(reset){
00054             switch((uint32_t)TIM){
00055                 case TIM1_BASE :
00056                     TIM1->CNT = 0;
00057                 break;
00058                 
00059                 case TIM2_BASE :
00060                     TIM2->CNT = 0;
00061                 break;
00062                 
00063                 case TIM3_BASE :
00064                     TIM3->CNT = 0;
00065                 break;
00066                 
00067                 case TIM4_BASE :
00068                     TIM4->CNT = 0;
00069                 break;
00070                 
00071                 //case TIM5_BASE :
00072 //                    TIM5->CNT = 0;
00073 //                break;
00074                 
00075 //                case TIM8_BASE :
00076 //                    TIM8->CNT = 0;
00077 //                break;
00078             }
00079         }
00080         else{
00081             switch((uint32_t)TIM)
00082             {
00083                 case TIM1_BASE :
00084                     return (int32_t)count;
00085                 
00086                 case TIM2_BASE :
00087                     return (int32_t)count;
00088                 
00089                 case TIM3_BASE :
00090                     return (int32_t)count;
00091                 
00092                 case TIM4_BASE :
00093                     return (int32_t)count;
00094     //            
00095 //                case TIM5_BASE :
00096 //                    return (int32_t)count;
00097 //                    
00098 //                case TIM8_BASE :
00099 //                    return (int32_t)count;
00100             }
00101         }
00102         
00103         return (int32_t)count;
00104     }
00105     
00106     
00107     TIM_HandleTypeDef* encoderHAL::GetTimer()
00108     {
00109         return &timer;    
00110     }
00111     
00112 }