Vybhav Kadaba / Mbed OS EV-PRO-MW1001_testing

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inc/admw1001/ADMW1001_REGISTERS_typedefs.h@18:cbf514cce921, 2019-08-20 (annotated)

Committer:
Vkadaba
Date:
Tue Aug 20 12:19:31 2019 +0000
Revision:
18:cbf514cce921
Parent:
8:2f2775c34640
Child:
32:52445bef314d
Added No excitation current config in host firmware

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vkadaba 5:0728bde67bdb 1 /* ================================================================================
Vkadaba 5:0728bde67bdb 2
Vkadaba 5:0728bde67bdb 3 Project : ADMW1001_REGISTERS
Vkadaba 5:0728bde67bdb 4 File : ADMW1001_REGISTERS_typedefs.h
Vkadaba 5:0728bde67bdb 5 Description : C Register Structures
Vkadaba 5:0728bde67bdb 6
Vkadaba 8:2f2775c34640 7 Date : Jun 19, 2019
Vkadaba 5:0728bde67bdb 8
Vkadaba 6:9d393a9677f4 9 Copyright (c) 2019 Analog Devices, Inc. All Rights Reserved.
Vkadaba 5:0728bde67bdb 10 This software is proprietary and confidential to Analog Devices, Inc. and
Vkadaba 5:0728bde67bdb 11 its licensors.
Vkadaba 5:0728bde67bdb 12
Vkadaba 5:0728bde67bdb 13 This file was auto-generated. Do not make local changes to this file.
Vkadaba 5:0728bde67bdb 14
Vkadaba 5:0728bde67bdb 15 ================================================================================ */
Vkadaba 5:0728bde67bdb 16
Vkadaba 5:0728bde67bdb 17 #ifndef _ADMW1001_REGISTERS_TYPEDEFS_H
Vkadaba 5:0728bde67bdb 18 #define _ADMW1001_REGISTERS_TYPEDEFS_H
Vkadaba 5:0728bde67bdb 19
Vkadaba 5:0728bde67bdb 20 /* pickup integer types */
Vkadaba 5:0728bde67bdb 21 #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
Vkadaba 5:0728bde67bdb 22 #include <stdint.h>
Vkadaba 5:0728bde67bdb 23 #endif /* _LANGUAGE_C */
Vkadaba 5:0728bde67bdb 24
Vkadaba 5:0728bde67bdb 25 #if defined ( __CC_ARM )
Vkadaba 5:0728bde67bdb 26 #pragma push
Vkadaba 5:0728bde67bdb 27 #pragma anon_unions
Vkadaba 5:0728bde67bdb 28 #endif
Vkadaba 5:0728bde67bdb 29
Vkadaba 5:0728bde67bdb 30 /** @defgroup Interface_Config_A Interface Configuration A (Interface_Config_A) Register
Vkadaba 5:0728bde67bdb 31 * Interface Configuration A (Interface_Config_A) Register.
Vkadaba 5:0728bde67bdb 32 * @{
Vkadaba 5:0728bde67bdb 33 */
Vkadaba 5:0728bde67bdb 34
Vkadaba 5:0728bde67bdb 35 /* =========================================================================
Vkadaba 5:0728bde67bdb 36 *! \enum ADMW_SPI_Interface_Config_A_Addr_Ascension
Vkadaba 5:0728bde67bdb 37 *! \brief Determines Sequential Addressing Behavior (Addr_Ascension) Enumerations
Vkadaba 5:0728bde67bdb 38 * ========================================================================= */
Vkadaba 5:0728bde67bdb 39 typedef enum
Vkadaba 5:0728bde67bdb 40 {
Vkadaba 5:0728bde67bdb 41 SPI_INTERFACE_CONFIG_A_DESCEND = 0, /**< Address accessed is decremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 42 SPI_INTERFACE_CONFIG_A_ASCEND = 1 /**< Address accessed is incremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 43 } ADMW_SPI_Interface_Config_A_Addr_Ascension;
Vkadaba 5:0728bde67bdb 44
Vkadaba 5:0728bde67bdb 45
Vkadaba 5:0728bde67bdb 46 /* ==========================================================================
Vkadaba 5:0728bde67bdb 47 *! \struct ADMW_SPI_Interface_Config_A_Struct
Vkadaba 5:0728bde67bdb 48 *! \brief Interface Configuration A Register bit field structure
Vkadaba 5:0728bde67bdb 49 * ========================================================================== */
Vkadaba 8:2f2775c34640 50 typedef struct _ADMW_SPI_Interface_Config_A_t {
Vkadaba 5:0728bde67bdb 51 union {
Vkadaba 5:0728bde67bdb 52 struct {
Vkadaba 5:0728bde67bdb 53 uint8_t SW_ResetX : 1; /**< Second of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 54 uint8_t reserved1 : 3;
Vkadaba 5:0728bde67bdb 55 uint8_t SDO_Enable : 1; /**< SDO Pin Enable */
Vkadaba 5:0728bde67bdb 56 uint8_t Addr_Ascension : 1; /**< Determines Sequential Addressing Behavior */
Vkadaba 5:0728bde67bdb 57 uint8_t reserved6 : 1;
Vkadaba 5:0728bde67bdb 58 uint8_t SW_Reset : 1; /**< First of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 59 };
Vkadaba 5:0728bde67bdb 60 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 61 };
Vkadaba 5:0728bde67bdb 62 } ADMW_SPI_Interface_Config_A_t;
Vkadaba 5:0728bde67bdb 63
Vkadaba 5:0728bde67bdb 64 /*@}*/
Vkadaba 5:0728bde67bdb 65
Vkadaba 5:0728bde67bdb 66 /** @defgroup Interface_Config_B Interface Configuration B (Interface_Config_B) Register
Vkadaba 5:0728bde67bdb 67 * Interface Configuration B (Interface_Config_B) Register.
Vkadaba 5:0728bde67bdb 68 * @{
Vkadaba 5:0728bde67bdb 69 */
Vkadaba 5:0728bde67bdb 70
Vkadaba 5:0728bde67bdb 71 /* =========================================================================
Vkadaba 5:0728bde67bdb 72 *! \enum ADMW_SPI_Interface_Config_B_Single_Inst
Vkadaba 5:0728bde67bdb 73 *! \brief Select Streaming or Single Instruction Mode (Single_Inst) Enumerations
Vkadaba 5:0728bde67bdb 74 * ========================================================================= */
Vkadaba 5:0728bde67bdb 75 typedef enum
Vkadaba 5:0728bde67bdb 76 {
Vkadaba 5:0728bde67bdb 77 SPI_INTERFACE_CONFIG_B_STREAMING_MODE = 0, /**< Streaming mode is enabled */
Vkadaba 5:0728bde67bdb 78 SPI_INTERFACE_CONFIG_B_SINGLE_INSTRUCTION_MODE = 1 /**< Single Instruction mode is enabled */
Vkadaba 5:0728bde67bdb 79 } ADMW_SPI_Interface_Config_B_Single_Inst;
Vkadaba 5:0728bde67bdb 80
Vkadaba 5:0728bde67bdb 81
Vkadaba 5:0728bde67bdb 82 /* ==========================================================================
Vkadaba 5:0728bde67bdb 83 *! \struct ADMW_SPI_Interface_Config_B_Struct
Vkadaba 5:0728bde67bdb 84 *! \brief Interface Configuration B Register bit field structure
Vkadaba 5:0728bde67bdb 85 * ========================================================================== */
Vkadaba 8:2f2775c34640 86 typedef struct _ADMW_SPI_Interface_Config_B_t {
Vkadaba 5:0728bde67bdb 87 union {
Vkadaba 5:0728bde67bdb 88 struct {
Vkadaba 5:0728bde67bdb 89 uint8_t reserved0 : 7;
Vkadaba 5:0728bde67bdb 90 uint8_t Single_Inst : 1; /**< Select Streaming or Single Instruction Mode */
Vkadaba 5:0728bde67bdb 91 };
Vkadaba 5:0728bde67bdb 92 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 93 };
Vkadaba 5:0728bde67bdb 94 } ADMW_SPI_Interface_Config_B_t;
Vkadaba 5:0728bde67bdb 95
Vkadaba 5:0728bde67bdb 96 /*@}*/
Vkadaba 5:0728bde67bdb 97
Vkadaba 5:0728bde67bdb 98 /** @defgroup Device_Config Device Configuration (Device_Config) Register
Vkadaba 5:0728bde67bdb 99 * Device Configuration (Device_Config) Register.
Vkadaba 5:0728bde67bdb 100 * @{
Vkadaba 5:0728bde67bdb 101 */
Vkadaba 5:0728bde67bdb 102
Vkadaba 5:0728bde67bdb 103 /* =========================================================================
Vkadaba 5:0728bde67bdb 104 *! \enum ADMW_SPI_Device_Config_Operating_Modes
Vkadaba 5:0728bde67bdb 105 *! \brief Power Modes (Operating_Modes) Enumerations
Vkadaba 5:0728bde67bdb 106 * ========================================================================= */
Vkadaba 5:0728bde67bdb 107 typedef enum
Vkadaba 5:0728bde67bdb 108 {
Vkadaba 5:0728bde67bdb 109 SPI_DEVICE_CONFIG_NORMAL = 0, /**< Normal Operating Mode */
Vkadaba 5:0728bde67bdb 110 SPI_DEVICE_CONFIG_SLEEP = 3 /**< Low Power Mode */
Vkadaba 5:0728bde67bdb 111 } ADMW_SPI_Device_Config_Operating_Modes;
Vkadaba 5:0728bde67bdb 112
Vkadaba 5:0728bde67bdb 113
Vkadaba 5:0728bde67bdb 114 /* ==========================================================================
Vkadaba 5:0728bde67bdb 115 *! \struct ADMW_SPI_Device_Config_Struct
Vkadaba 5:0728bde67bdb 116 *! \brief Device Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 117 * ========================================================================== */
Vkadaba 8:2f2775c34640 118 typedef struct _ADMW_SPI_Device_Config_t {
Vkadaba 5:0728bde67bdb 119 union {
Vkadaba 5:0728bde67bdb 120 struct {
Vkadaba 5:0728bde67bdb 121 uint8_t Operating_Modes : 2; /**< Power Modes */
Vkadaba 5:0728bde67bdb 122 uint8_t reserved2 : 6;
Vkadaba 5:0728bde67bdb 123 };
Vkadaba 5:0728bde67bdb 124 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 125 };
Vkadaba 5:0728bde67bdb 126 } ADMW_SPI_Device_Config_t;
Vkadaba 5:0728bde67bdb 127
Vkadaba 5:0728bde67bdb 128 /*@}*/
Vkadaba 5:0728bde67bdb 129
Vkadaba 5:0728bde67bdb 130 /** @defgroup Chip_Type Chip Type (Chip_Type) Register
Vkadaba 5:0728bde67bdb 131 * Chip Type (Chip_Type) Register.
Vkadaba 5:0728bde67bdb 132 * @{
Vkadaba 5:0728bde67bdb 133 */
Vkadaba 5:0728bde67bdb 134
Vkadaba 5:0728bde67bdb 135 /* ==========================================================================
Vkadaba 5:0728bde67bdb 136 *! \struct ADMW_SPI_Chip_Type_Struct
Vkadaba 5:0728bde67bdb 137 *! \brief Chip Type Register bit field structure
Vkadaba 5:0728bde67bdb 138 * ========================================================================== */
Vkadaba 8:2f2775c34640 139 typedef struct _ADMW_SPI_Chip_Type_t {
Vkadaba 5:0728bde67bdb 140 union {
Vkadaba 5:0728bde67bdb 141 struct {
Vkadaba 5:0728bde67bdb 142 uint8_t Chip_Type : 4; /**< Precision ADC */
Vkadaba 5:0728bde67bdb 143 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 144 };
Vkadaba 5:0728bde67bdb 145 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 146 };
Vkadaba 5:0728bde67bdb 147 } ADMW_SPI_Chip_Type_t;
Vkadaba 5:0728bde67bdb 148
Vkadaba 5:0728bde67bdb 149 /*@}*/
Vkadaba 5:0728bde67bdb 150
Vkadaba 5:0728bde67bdb 151 /** @defgroup Product_ID_L Product ID Low (Product_ID_L) Register
Vkadaba 5:0728bde67bdb 152 * Product ID Low (Product_ID_L) Register.
Vkadaba 5:0728bde67bdb 153 * @{
Vkadaba 5:0728bde67bdb 154 */
Vkadaba 5:0728bde67bdb 155
Vkadaba 5:0728bde67bdb 156 /* ==========================================================================
Vkadaba 5:0728bde67bdb 157 *! \struct ADMW_SPI_Product_ID_L_Struct
Vkadaba 5:0728bde67bdb 158 *! \brief Product ID Low Register bit field structure
Vkadaba 5:0728bde67bdb 159 * ========================================================================== */
Vkadaba 8:2f2775c34640 160 typedef struct _ADMW_SPI_Product_ID_L_t {
Vkadaba 5:0728bde67bdb 161 union {
Vkadaba 5:0728bde67bdb 162 struct {
Vkadaba 5:0728bde67bdb 163 uint8_t Product_ID : 8; /**< Product_ID[7:0] This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 164 };
Vkadaba 5:0728bde67bdb 165 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 166 };
Vkadaba 5:0728bde67bdb 167 } ADMW_SPI_Product_ID_L_t;
Vkadaba 5:0728bde67bdb 168
Vkadaba 5:0728bde67bdb 169 /*@}*/
Vkadaba 5:0728bde67bdb 170
Vkadaba 5:0728bde67bdb 171 /** @defgroup Product_ID_H Product ID High (Product_ID_H) Register
Vkadaba 5:0728bde67bdb 172 * Product ID High (Product_ID_H) Register.
Vkadaba 5:0728bde67bdb 173 * @{
Vkadaba 5:0728bde67bdb 174 */
Vkadaba 5:0728bde67bdb 175
Vkadaba 5:0728bde67bdb 176 /* ==========================================================================
Vkadaba 5:0728bde67bdb 177 *! \struct ADMW_SPI_Product_ID_H_Struct
Vkadaba 5:0728bde67bdb 178 *! \brief Product ID High Register bit field structure
Vkadaba 5:0728bde67bdb 179 * ========================================================================== */
Vkadaba 8:2f2775c34640 180 typedef struct _ADMW_SPI_Product_ID_H_t {
Vkadaba 5:0728bde67bdb 181 union {
Vkadaba 5:0728bde67bdb 182 struct {
Vkadaba 5:0728bde67bdb 183 uint8_t Product_ID : 8; /**< Product_ID[15:8] This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 184 };
Vkadaba 5:0728bde67bdb 185 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 186 };
Vkadaba 5:0728bde67bdb 187 } ADMW_SPI_Product_ID_H_t;
Vkadaba 5:0728bde67bdb 188
Vkadaba 5:0728bde67bdb 189 /*@}*/
Vkadaba 5:0728bde67bdb 190
Vkadaba 5:0728bde67bdb 191 /** @defgroup Chip_Grade Chip Grade (Chip_Grade) Register
Vkadaba 5:0728bde67bdb 192 * Chip Grade (Chip_Grade) Register.
Vkadaba 5:0728bde67bdb 193 * @{
Vkadaba 5:0728bde67bdb 194 */
Vkadaba 5:0728bde67bdb 195
Vkadaba 5:0728bde67bdb 196 /* ==========================================================================
Vkadaba 5:0728bde67bdb 197 *! \struct ADMW_SPI_Chip_Grade_Struct
Vkadaba 5:0728bde67bdb 198 *! \brief Chip Grade Register bit field structure
Vkadaba 5:0728bde67bdb 199 * ========================================================================== */
Vkadaba 8:2f2775c34640 200 typedef struct _ADMW_SPI_Chip_Grade_t {
Vkadaba 5:0728bde67bdb 201 union {
Vkadaba 5:0728bde67bdb 202 struct {
Vkadaba 5:0728bde67bdb 203 uint8_t Device_Revision : 4; /**< This is the Device Hardware Revision */
Vkadaba 5:0728bde67bdb 204 uint8_t Grade : 4; /**< This is the Device Performance Grade */
Vkadaba 5:0728bde67bdb 205 };
Vkadaba 5:0728bde67bdb 206 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 207 };
Vkadaba 5:0728bde67bdb 208 } ADMW_SPI_Chip_Grade_t;
Vkadaba 5:0728bde67bdb 209
Vkadaba 5:0728bde67bdb 210 /*@}*/
Vkadaba 5:0728bde67bdb 211
Vkadaba 5:0728bde67bdb 212 /** @defgroup Scratch_Pad Scratch Pad (Scratch_Pad) Register
Vkadaba 5:0728bde67bdb 213 * Scratch Pad (Scratch_Pad) Register.
Vkadaba 5:0728bde67bdb 214 * @{
Vkadaba 5:0728bde67bdb 215 */
Vkadaba 5:0728bde67bdb 216
Vkadaba 5:0728bde67bdb 217 /* ==========================================================================
Vkadaba 5:0728bde67bdb 218 *! \struct ADMW_SPI_Scratch_Pad_Struct
Vkadaba 5:0728bde67bdb 219 *! \brief Scratch Pad Register bit field structure
Vkadaba 5:0728bde67bdb 220 * ========================================================================== */
Vkadaba 8:2f2775c34640 221 typedef struct _ADMW_SPI_Scratch_Pad_t {
Vkadaba 5:0728bde67bdb 222 union {
Vkadaba 5:0728bde67bdb 223 struct {
Vkadaba 5:0728bde67bdb 224 uint8_t Scratch_Value : 8; /**< Software Scratchpad */
Vkadaba 5:0728bde67bdb 225 };
Vkadaba 5:0728bde67bdb 226 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 227 };
Vkadaba 5:0728bde67bdb 228 } ADMW_SPI_Scratch_Pad_t;
Vkadaba 5:0728bde67bdb 229
Vkadaba 5:0728bde67bdb 230 /*@}*/
Vkadaba 5:0728bde67bdb 231
Vkadaba 5:0728bde67bdb 232 /** @defgroup SPI_Revision SPI Revision (SPI_Revision) Register
Vkadaba 5:0728bde67bdb 233 * SPI Revision (SPI_Revision) Register.
Vkadaba 5:0728bde67bdb 234 * @{
Vkadaba 5:0728bde67bdb 235 */
Vkadaba 5:0728bde67bdb 236
Vkadaba 5:0728bde67bdb 237 /* =========================================================================
Vkadaba 5:0728bde67bdb 238 *! \enum ADMW_SPI_SPI_Revision_Version
Vkadaba 5:0728bde67bdb 239 *! \brief SPI Version (Version) Enumerations
Vkadaba 5:0728bde67bdb 240 * ========================================================================= */
Vkadaba 5:0728bde67bdb 241 typedef enum
Vkadaba 5:0728bde67bdb 242 {
Vkadaba 5:0728bde67bdb 243 SPI_SPI_REVISION_REV1_0 = 2 /**< Revision 1.0 */
Vkadaba 5:0728bde67bdb 244 } ADMW_SPI_SPI_Revision_Version;
Vkadaba 5:0728bde67bdb 245
Vkadaba 5:0728bde67bdb 246
Vkadaba 5:0728bde67bdb 247 /* =========================================================================
Vkadaba 5:0728bde67bdb 248 *! \enum ADMW_SPI_SPI_Revision_SPI_Type
Vkadaba 5:0728bde67bdb 249 *! \brief Always Reads as 0x2 (SPI_Type) Enumerations
Vkadaba 5:0728bde67bdb 250 * ========================================================================= */
Vkadaba 5:0728bde67bdb 251 typedef enum
Vkadaba 5:0728bde67bdb 252 {
Vkadaba 6:9d393a9677f4 253 SPI_SPI_REVISION_ADI_SPI = 0, /**< */
Vkadaba 6:9d393a9677f4 254 SPI_SPI_REVISION_LPT_SPI = 2 /**< */
Vkadaba 5:0728bde67bdb 255 } ADMW_SPI_SPI_Revision_SPI_Type;
Vkadaba 5:0728bde67bdb 256
Vkadaba 5:0728bde67bdb 257
Vkadaba 5:0728bde67bdb 258 /* ==========================================================================
Vkadaba 5:0728bde67bdb 259 *! \struct ADMW_SPI_SPI_Revision_Struct
Vkadaba 5:0728bde67bdb 260 *! \brief SPI Revision Register bit field structure
Vkadaba 5:0728bde67bdb 261 * ========================================================================== */
Vkadaba 8:2f2775c34640 262 typedef struct _ADMW_SPI_SPI_Revision_t {
Vkadaba 5:0728bde67bdb 263 union {
Vkadaba 5:0728bde67bdb 264 struct {
Vkadaba 5:0728bde67bdb 265 uint8_t Version : 6; /**< SPI Version */
Vkadaba 5:0728bde67bdb 266 uint8_t SPI_Type : 2; /**< Always Reads as 0x2 */
Vkadaba 5:0728bde67bdb 267 };
Vkadaba 5:0728bde67bdb 268 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 269 };
Vkadaba 5:0728bde67bdb 270 } ADMW_SPI_SPI_Revision_t;
Vkadaba 5:0728bde67bdb 271
Vkadaba 5:0728bde67bdb 272 /*@}*/
Vkadaba 5:0728bde67bdb 273
Vkadaba 5:0728bde67bdb 274 /** @defgroup Vendor_L Vendor ID Low (Vendor_L) Register
Vkadaba 5:0728bde67bdb 275 * Vendor ID Low (Vendor_L) Register.
Vkadaba 5:0728bde67bdb 276 * @{
Vkadaba 5:0728bde67bdb 277 */
Vkadaba 5:0728bde67bdb 278
Vkadaba 5:0728bde67bdb 279 /* ==========================================================================
Vkadaba 5:0728bde67bdb 280 *! \struct ADMW_SPI_Vendor_L_Struct
Vkadaba 5:0728bde67bdb 281 *! \brief Vendor ID Low Register bit field structure
Vkadaba 5:0728bde67bdb 282 * ========================================================================== */
Vkadaba 8:2f2775c34640 283 typedef struct _ADMW_SPI_Vendor_L_t {
Vkadaba 5:0728bde67bdb 284 union {
Vkadaba 5:0728bde67bdb 285 struct {
Vkadaba 5:0728bde67bdb 286 uint8_t VID : 8; /**< VID[7:0] Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 287 };
Vkadaba 5:0728bde67bdb 288 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 289 };
Vkadaba 5:0728bde67bdb 290 } ADMW_SPI_Vendor_L_t;
Vkadaba 5:0728bde67bdb 291
Vkadaba 5:0728bde67bdb 292 /*@}*/
Vkadaba 5:0728bde67bdb 293
Vkadaba 5:0728bde67bdb 294 /** @defgroup Vendor_H Vendor ID High (Vendor_H) Register
Vkadaba 5:0728bde67bdb 295 * Vendor ID High (Vendor_H) Register.
Vkadaba 5:0728bde67bdb 296 * @{
Vkadaba 5:0728bde67bdb 297 */
Vkadaba 5:0728bde67bdb 298
Vkadaba 5:0728bde67bdb 299 /* ==========================================================================
Vkadaba 5:0728bde67bdb 300 *! \struct ADMW_SPI_Vendor_H_Struct
Vkadaba 5:0728bde67bdb 301 *! \brief Vendor ID High Register bit field structure
Vkadaba 5:0728bde67bdb 302 * ========================================================================== */
Vkadaba 8:2f2775c34640 303 typedef struct _ADMW_SPI_Vendor_H_t {
Vkadaba 5:0728bde67bdb 304 union {
Vkadaba 5:0728bde67bdb 305 struct {
Vkadaba 5:0728bde67bdb 306 uint8_t VID : 8; /**< VID[15:8] Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 307 };
Vkadaba 5:0728bde67bdb 308 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 309 };
Vkadaba 5:0728bde67bdb 310 } ADMW_SPI_Vendor_H_t;
Vkadaba 5:0728bde67bdb 311
Vkadaba 5:0728bde67bdb 312 /*@}*/
Vkadaba 5:0728bde67bdb 313
Vkadaba 5:0728bde67bdb 314 /** @defgroup Stream_Mode Stream Mode (Stream_Mode) Register
Vkadaba 5:0728bde67bdb 315 * Stream Mode (Stream_Mode) Register.
Vkadaba 5:0728bde67bdb 316 * @{
Vkadaba 5:0728bde67bdb 317 */
Vkadaba 5:0728bde67bdb 318
Vkadaba 5:0728bde67bdb 319 /* ==========================================================================
Vkadaba 5:0728bde67bdb 320 *! \struct ADMW_SPI_Stream_Mode_Struct
Vkadaba 5:0728bde67bdb 321 *! \brief Stream Mode Register bit field structure
Vkadaba 5:0728bde67bdb 322 * ========================================================================== */
Vkadaba 8:2f2775c34640 323 typedef struct _ADMW_SPI_Stream_Mode_t {
Vkadaba 5:0728bde67bdb 324 union {
Vkadaba 5:0728bde67bdb 325 struct {
Vkadaba 5:0728bde67bdb 326 uint8_t Loop_Count : 8; /**< Sets the Data Byte Count Before Looping to Start Address */
Vkadaba 5:0728bde67bdb 327 };
Vkadaba 5:0728bde67bdb 328 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 329 };
Vkadaba 5:0728bde67bdb 330 } ADMW_SPI_Stream_Mode_t;
Vkadaba 5:0728bde67bdb 331
Vkadaba 5:0728bde67bdb 332 /*@}*/
Vkadaba 5:0728bde67bdb 333
Vkadaba 5:0728bde67bdb 334 /** @defgroup Transfer_Config Transfer Config (Transfer_Config) Register
Vkadaba 5:0728bde67bdb 335 * Transfer Config (Transfer_Config) Register.
Vkadaba 5:0728bde67bdb 336 * @{
Vkadaba 5:0728bde67bdb 337 */
Vkadaba 5:0728bde67bdb 338
Vkadaba 5:0728bde67bdb 339 /* =========================================================================
Vkadaba 5:0728bde67bdb 340 *! \enum ADMW_SPI_Transfer_Config_Stream_Mode
Vkadaba 5:0728bde67bdb 341 *! \brief When Streaming, Controls Master-Slave Transfer (Stream_Mode) Enumerations
Vkadaba 5:0728bde67bdb 342 * ========================================================================= */
Vkadaba 5:0728bde67bdb 343 typedef enum
Vkadaba 5:0728bde67bdb 344 {
Vkadaba 6:9d393a9677f4 345 SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE = 0, /**< Transfers after each byte/mulit-byte register */
Vkadaba 6:9d393a9677f4 346 SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP = 1 /**< Transfers when address loops */
Vkadaba 5:0728bde67bdb 347 } ADMW_SPI_Transfer_Config_Stream_Mode;
Vkadaba 5:0728bde67bdb 348
Vkadaba 5:0728bde67bdb 349
Vkadaba 5:0728bde67bdb 350 /* ==========================================================================
Vkadaba 5:0728bde67bdb 351 *! \struct ADMW_SPI_Transfer_Config_Struct
Vkadaba 5:0728bde67bdb 352 *! \brief Transfer Config Register bit field structure
Vkadaba 5:0728bde67bdb 353 * ========================================================================== */
Vkadaba 8:2f2775c34640 354 typedef struct _ADMW_SPI_Transfer_Config_t {
Vkadaba 5:0728bde67bdb 355 union {
Vkadaba 5:0728bde67bdb 356 struct {
Vkadaba 5:0728bde67bdb 357 uint8_t reserved0 : 1;
Vkadaba 5:0728bde67bdb 358 uint8_t Stream_Mode : 1; /**< When Streaming, Controls Master-Slave Transfer */
Vkadaba 5:0728bde67bdb 359 uint8_t reserved2 : 6;
Vkadaba 5:0728bde67bdb 360 };
Vkadaba 5:0728bde67bdb 361 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 362 };
Vkadaba 5:0728bde67bdb 363 } ADMW_SPI_Transfer_Config_t;
Vkadaba 5:0728bde67bdb 364
Vkadaba 5:0728bde67bdb 365 /*@}*/
Vkadaba 5:0728bde67bdb 366
Vkadaba 5:0728bde67bdb 367 /** @defgroup Interface_Config_C Interface Configuration C (Interface_Config_C) Register
Vkadaba 5:0728bde67bdb 368 * Interface Configuration C (Interface_Config_C) Register.
Vkadaba 5:0728bde67bdb 369 * @{
Vkadaba 5:0728bde67bdb 370 */
Vkadaba 5:0728bde67bdb 371
Vkadaba 5:0728bde67bdb 372 /* =========================================================================
Vkadaba 5:0728bde67bdb 373 *! \enum ADMW_SPI_Interface_Config_C_Strict_Register_Access
Vkadaba 5:0728bde67bdb 374 *! \brief Multi-byte Registers Must Be Read/Written in Full (Strict_Register_Access) Enumerations
Vkadaba 5:0728bde67bdb 375 * ========================================================================= */
Vkadaba 5:0728bde67bdb 376 typedef enum
Vkadaba 5:0728bde67bdb 377 {
Vkadaba 6:9d393a9677f4 378 SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS = 0, /**< Normal mode, no access restrictions */
Vkadaba 6:9d393a9677f4 379 SPI_INTERFACE_CONFIG_C_STRICT_ACCESS = 1 /**< Strict mode, multi-byte registers require all bytes read/written */
Vkadaba 5:0728bde67bdb 380 } ADMW_SPI_Interface_Config_C_Strict_Register_Access;
Vkadaba 5:0728bde67bdb 381
Vkadaba 5:0728bde67bdb 382
Vkadaba 5:0728bde67bdb 383 /* =========================================================================
Vkadaba 5:0728bde67bdb 384 *! \enum ADMW_SPI_Interface_Config_C_CRC_Enable
Vkadaba 5:0728bde67bdb 385 *! \brief CRC Enable (CRC_Enable) Enumerations
Vkadaba 5:0728bde67bdb 386 * ========================================================================= */
Vkadaba 5:0728bde67bdb 387 typedef enum
Vkadaba 5:0728bde67bdb 388 {
Vkadaba 6:9d393a9677f4 389 SPI_INTERFACE_CONFIG_C_DISABLED = 0, /**< CRC Disabled */
Vkadaba 6:9d393a9677f4 390 SPI_INTERFACE_CONFIG_C_ENABLED = 1 /**< CRC Enabled */
Vkadaba 5:0728bde67bdb 391 } ADMW_SPI_Interface_Config_C_CRC_Enable;
Vkadaba 5:0728bde67bdb 392
Vkadaba 5:0728bde67bdb 393
Vkadaba 5:0728bde67bdb 394 /* ==========================================================================
Vkadaba 5:0728bde67bdb 395 *! \struct ADMW_SPI_Interface_Config_C_Struct
Vkadaba 5:0728bde67bdb 396 *! \brief Interface Configuration C Register bit field structure
Vkadaba 5:0728bde67bdb 397 * ========================================================================== */
Vkadaba 8:2f2775c34640 398 typedef struct _ADMW_SPI_Interface_Config_C_t {
Vkadaba 5:0728bde67bdb 399 union {
Vkadaba 5:0728bde67bdb 400 struct {
Vkadaba 5:0728bde67bdb 401 uint8_t CRC_EnableB : 2; /**< Inverted CRC Enable */
Vkadaba 5:0728bde67bdb 402 uint8_t reserved2 : 2;
Vkadaba 5:0728bde67bdb 403 uint8_t Send_Status : 1; /**< Enables Sending of Status in 4-wire Mode */
Vkadaba 5:0728bde67bdb 404 uint8_t Strict_Register_Access : 1; /**< Multi-byte Registers Must Be Read/Written in Full */
Vkadaba 5:0728bde67bdb 405 uint8_t CRC_Enable : 2; /**< CRC Enable */
Vkadaba 5:0728bde67bdb 406 };
Vkadaba 5:0728bde67bdb 407 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 408 };
Vkadaba 5:0728bde67bdb 409 } ADMW_SPI_Interface_Config_C_t;
Vkadaba 5:0728bde67bdb 410
Vkadaba 5:0728bde67bdb 411 /*@}*/
Vkadaba 5:0728bde67bdb 412
Vkadaba 5:0728bde67bdb 413 /** @defgroup Interface_Status_A Interface Status A (Interface_Status_A) Register
Vkadaba 5:0728bde67bdb 414 * Interface Status A (Interface_Status_A) Register.
Vkadaba 5:0728bde67bdb 415 * @{
Vkadaba 5:0728bde67bdb 416 */
Vkadaba 5:0728bde67bdb 417
Vkadaba 5:0728bde67bdb 418 /* ==========================================================================
Vkadaba 5:0728bde67bdb 419 *! \struct ADMW_SPI_Interface_Status_A_Struct
Vkadaba 5:0728bde67bdb 420 *! \brief Interface Status A Register bit field structure
Vkadaba 5:0728bde67bdb 421 * ========================================================================== */
Vkadaba 8:2f2775c34640 422 typedef struct _ADMW_SPI_Interface_Status_A_t {
Vkadaba 5:0728bde67bdb 423 union {
Vkadaba 5:0728bde67bdb 424 struct {
Vkadaba 5:0728bde67bdb 425 uint8_t Address_Invalid_Error : 1; /**< Attempt to Read/Write Non-existent Register Address */
Vkadaba 5:0728bde67bdb 426 uint8_t Register_Partial_Access_Error : 1; /**< Set When Fewer Than Expected Number of Bytes Read/Written */
Vkadaba 5:0728bde67bdb 427 uint8_t Wr_To_Rd_Only_Reg_Error : 1; /**< Write to Read-Only Register Attempted */
Vkadaba 5:0728bde67bdb 428 uint8_t CRC_Error : 1; /**< Invalid/No CRC Received */
Vkadaba 5:0728bde67bdb 429 uint8_t Clock_Count_Error : 1; /**< Incorrect Number of Clocks Detected in a Transaction */
Vkadaba 5:0728bde67bdb 430 uint8_t reserved5 : 2;
Vkadaba 5:0728bde67bdb 431 uint8_t Not_Ready_Error : 1; /**< Device Not Ready for Transaction */
Vkadaba 5:0728bde67bdb 432 };
Vkadaba 5:0728bde67bdb 433 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 434 };
Vkadaba 5:0728bde67bdb 435 } ADMW_SPI_Interface_Status_A_t;
Vkadaba 5:0728bde67bdb 436
Vkadaba 5:0728bde67bdb 437 /*@}*/
Vkadaba 5:0728bde67bdb 438
Vkadaba 5:0728bde67bdb 439 /** @defgroup Command Special Command (Command) Register
Vkadaba 5:0728bde67bdb 440 * Special Command (Command) Register.
Vkadaba 5:0728bde67bdb 441 * @{
Vkadaba 5:0728bde67bdb 442 */
Vkadaba 5:0728bde67bdb 443
Vkadaba 5:0728bde67bdb 444 /* =========================================================================
Vkadaba 8:2f2775c34640 445 *! \enum ADMW_CORE_Command_Special_Command
Vkadaba 5:0728bde67bdb 446 *! \brief Special Command (Special_Command) Enumerations
Vkadaba 5:0728bde67bdb 447 * ========================================================================= */
Vkadaba 5:0728bde67bdb 448 typedef enum
Vkadaba 5:0728bde67bdb 449 {
Vkadaba 8:2f2775c34640 450 CORE_COMMAND_NOP = 0, /**< No Command */
Vkadaba 8:2f2775c34640 451 CORE_COMMAND_CONVERT = 1, /**< Start ADC Conversions */
Vkadaba 8:2f2775c34640 452 CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start Conversions with Added RAW ADC Data */
Vkadaba 8:2f2775c34640 453 CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch Configuration. */
Vkadaba 8:2f2775c34640 454 CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from FLASH */
Vkadaba 8:2f2775c34640 455 CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to FLASH */
Vkadaba 8:2f2775c34640 456 CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */
Vkadaba 8:2f2775c34640 457 CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load Registers with Configuration#1 from FLASH */
Vkadaba 8:2f2775c34640 458 CORE_COMMAND_SAVE_CONFIG_1 = 25 /**< Store Current Registers to FLASH Configuration#1 */
Vkadaba 8:2f2775c34640 459 } ADMW_CORE_Command_Special_Command;
Vkadaba 5:0728bde67bdb 460
Vkadaba 5:0728bde67bdb 461
Vkadaba 5:0728bde67bdb 462 /* ==========================================================================
Vkadaba 8:2f2775c34640 463 *! \struct ADMW_CORE_Command_Struct
Vkadaba 5:0728bde67bdb 464 *! \brief Special Command Register bit field structure
Vkadaba 5:0728bde67bdb 465 * ========================================================================== */
Vkadaba 8:2f2775c34640 466 typedef struct _ADMW_CORE_Command_t {
Vkadaba 5:0728bde67bdb 467 union {
Vkadaba 5:0728bde67bdb 468 struct {
Vkadaba 5:0728bde67bdb 469 uint8_t Special_Command : 8; /**< Special Command */
Vkadaba 5:0728bde67bdb 470 };
Vkadaba 5:0728bde67bdb 471 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 472 };
Vkadaba 8:2f2775c34640 473 } ADMW_CORE_Command_t;
Vkadaba 5:0728bde67bdb 474
Vkadaba 5:0728bde67bdb 475 /*@}*/
Vkadaba 5:0728bde67bdb 476
Vkadaba 5:0728bde67bdb 477 /** @defgroup Mode Operating Mode and DRDY Control (Mode) Register
Vkadaba 5:0728bde67bdb 478 * Operating Mode and DRDY Control (Mode) Register.
Vkadaba 5:0728bde67bdb 479 * @{
Vkadaba 5:0728bde67bdb 480 */
Vkadaba 5:0728bde67bdb 481
Vkadaba 5:0728bde67bdb 482 /* =========================================================================
Vkadaba 8:2f2775c34640 483 *! \enum ADMW_CORE_Mode_Conversion_Mode
Vkadaba 5:0728bde67bdb 484 *! \brief Conversion Mode (Conversion_Mode) Enumerations
Vkadaba 5:0728bde67bdb 485 * ========================================================================= */
Vkadaba 5:0728bde67bdb 486 typedef enum
Vkadaba 5:0728bde67bdb 487 {
Vkadaba 5:0728bde67bdb 488 CORE_MODE_SINGLECYCLE = 0, /**< Single Cycle */
Vkadaba 5:0728bde67bdb 489 CORE_MODE_CONTINUOUS = 2 /**< Continuous Conversion */
Vkadaba 8:2f2775c34640 490 } ADMW_CORE_Mode_Conversion_Mode;
Vkadaba 5:0728bde67bdb 491
Vkadaba 5:0728bde67bdb 492
Vkadaba 5:0728bde67bdb 493 /* =========================================================================
Vkadaba 8:2f2775c34640 494 *! \enum ADMW_CORE_Mode_Drdy_Mode
Vkadaba 5:0728bde67bdb 495 *! \brief Indicates Behavior of DRDY with Respect to FIFO State (Drdy_Mode) Enumerations
Vkadaba 5:0728bde67bdb 496 * ========================================================================= */
Vkadaba 5:0728bde67bdb 497 typedef enum
Vkadaba 5:0728bde67bdb 498 {
Vkadaba 8:2f2775c34640 499 CORE_MODE_DRDY_PER_CONVERSION = 0, /**< Data Ready Per Conversion */
Vkadaba 8:2f2775c34640 500 CORE_MODE_DRDY_PER_CYCLE = 1 /**< Data Ready Per Cycle */
Vkadaba 8:2f2775c34640 501 } ADMW_CORE_Mode_Drdy_Mode;
Vkadaba 5:0728bde67bdb 502
Vkadaba 5:0728bde67bdb 503
Vkadaba 5:0728bde67bdb 504 /* ==========================================================================
Vkadaba 8:2f2775c34640 505 *! \struct ADMW_CORE_Mode_Struct
Vkadaba 5:0728bde67bdb 506 *! \brief Operating Mode and DRDY Control Register bit field structure
Vkadaba 5:0728bde67bdb 507 * ========================================================================== */
Vkadaba 8:2f2775c34640 508 typedef struct _ADMW_CORE_Mode_t {
Vkadaba 5:0728bde67bdb 509 union {
Vkadaba 5:0728bde67bdb 510 struct {
Vkadaba 5:0728bde67bdb 511 uint8_t Conversion_Mode : 2; /**< Conversion Mode */
Vkadaba 5:0728bde67bdb 512 uint8_t Drdy_Mode : 2; /**< Indicates Behavior of DRDY with Respect to FIFO State */
Vkadaba 6:9d393a9677f4 513 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 514 };
Vkadaba 5:0728bde67bdb 515 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 516 };
Vkadaba 8:2f2775c34640 517 } ADMW_CORE_Mode_t;
Vkadaba 5:0728bde67bdb 518
Vkadaba 5:0728bde67bdb 519 /*@}*/
Vkadaba 5:0728bde67bdb 520
Vkadaba 5:0728bde67bdb 521 /** @defgroup Power_Config General Configuration (Power_Config) Register
Vkadaba 5:0728bde67bdb 522 * General Configuration (Power_Config) Register.
Vkadaba 5:0728bde67bdb 523 * @{
Vkadaba 5:0728bde67bdb 524 */
Vkadaba 5:0728bde67bdb 525
Vkadaba 5:0728bde67bdb 526 /* =========================================================================
Vkadaba 8:2f2775c34640 527 *! \enum ADMW_CORE_Power_Config_Power_Mode_MCU
Vkadaba 6:9d393a9677f4 528 *! \brief MCU Power Mode (Power_Mode_MCU) Enumerations
Vkadaba 5:0728bde67bdb 529 * ========================================================================= */
Vkadaba 5:0728bde67bdb 530 typedef enum
Vkadaba 5:0728bde67bdb 531 {
Vkadaba 6:9d393a9677f4 532 CORE_POWER_CONFIG_ACTIVE_MODE = 0, /**< Part is fully powered up and either cycling through a sequence or awaiting a configuration */
Vkadaba 6:9d393a9677f4 533 CORE_POWER_CONFIG_HIBERNATION = 1 /**< module has entede hibernation mode. All analog circuitry is disabled. All peripherals disabled apart from the Wake-up pin functionality. */
Vkadaba 8:2f2775c34640 534 } ADMW_CORE_Power_Config_Power_Mode_MCU;
Vkadaba 5:0728bde67bdb 535
Vkadaba 5:0728bde67bdb 536
Vkadaba 5:0728bde67bdb 537 /* ==========================================================================
Vkadaba 8:2f2775c34640 538 *! \struct ADMW_CORE_Power_Config_Struct
Vkadaba 5:0728bde67bdb 539 *! \brief General Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 540 * ========================================================================== */
Vkadaba 8:2f2775c34640 541 typedef struct _ADMW_CORE_Power_Config_t {
Vkadaba 5:0728bde67bdb 542 union {
Vkadaba 5:0728bde67bdb 543 struct {
Vkadaba 6:9d393a9677f4 544 uint8_t Power_Mode_MCU : 1; /**< MCU Power Mode */
Vkadaba 6:9d393a9677f4 545 uint8_t reserved1 : 7;
Vkadaba 5:0728bde67bdb 546 };
Vkadaba 5:0728bde67bdb 547 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 548 };
Vkadaba 8:2f2775c34640 549 } ADMW_CORE_Power_Config_t;
Vkadaba 5:0728bde67bdb 550
Vkadaba 5:0728bde67bdb 551 /*@}*/
Vkadaba 5:0728bde67bdb 552
Vkadaba 5:0728bde67bdb 553 /** @defgroup Cycle_Control Measurement Cycle (Cycle_Control) Register
Vkadaba 5:0728bde67bdb 554 * Measurement Cycle (Cycle_Control) Register.
Vkadaba 5:0728bde67bdb 555 * @{
Vkadaba 5:0728bde67bdb 556 */
Vkadaba 5:0728bde67bdb 557
Vkadaba 5:0728bde67bdb 558 /* =========================================================================
Vkadaba 8:2f2775c34640 559 *! \enum ADMW_CORE_Cycle_Control_Cycle_Type
Vkadaba 8:2f2775c34640 560 *! \brief Type of Measurement Cycle (Cycle_Type) Enumerations
Vkadaba 8:2f2775c34640 561 * ========================================================================= */
Vkadaba 8:2f2775c34640 562 typedef enum
Vkadaba 8:2f2775c34640 563 {
Vkadaba 8:2f2775c34640 564 CORE_CYCLE_CONTROL_SWITCH = 0, /**< Switch Channels After Every Conversion */
Vkadaba 8:2f2775c34640 565 CORE_CYCLE_CONTROL_FULL = 1 /**< Perform Full Number Of Conversions On A Channel Consecutively */
Vkadaba 8:2f2775c34640 566 } ADMW_CORE_Cycle_Control_Cycle_Type;
Vkadaba 8:2f2775c34640 567
Vkadaba 8:2f2775c34640 568
Vkadaba 8:2f2775c34640 569 /* =========================================================================
Vkadaba 8:2f2775c34640 570 *! \enum ADMW_CORE_Cycle_Control_Vbias
Vkadaba 8:2f2775c34640 571 *! \brief Voltage Bias Global Enable (Vbias) Enumerations
Vkadaba 8:2f2775c34640 572 * ========================================================================= */
Vkadaba 8:2f2775c34640 573 typedef enum
Vkadaba 8:2f2775c34640 574 {
Vkadaba 8:2f2775c34640 575 CORE_CYCLE_CONTROL_VBIAS_DISABLE = 0, /**< Vbias Disabled */
Vkadaba 8:2f2775c34640 576 CORE_CYCLE_CONTROL_VBIAS_ENABLE = 1 /**< Enable Vbias Output For the Duration of a Cycle */
Vkadaba 8:2f2775c34640 577 } ADMW_CORE_Cycle_Control_Vbias;
Vkadaba 8:2f2775c34640 578
Vkadaba 8:2f2775c34640 579
Vkadaba 8:2f2775c34640 580 /* =========================================================================
Vkadaba 8:2f2775c34640 581 *! \enum ADMW_CORE_Cycle_Control_Cycle_Time_Units
Vkadaba 5:0728bde67bdb 582 *! \brief Units for Cycle Time (Cycle_Time_Units) Enumerations
Vkadaba 5:0728bde67bdb 583 * ========================================================================= */
Vkadaba 5:0728bde67bdb 584 typedef enum
Vkadaba 5:0728bde67bdb 585 {
Vkadaba 8:2f2775c34640 586 CORE_CYCLE_CONTROL_MILLISECONDS = 0, /**< Milli-Seconds */
Vkadaba 8:2f2775c34640 587 CORE_CYCLE_CONTROL_SECONDS = 1 /**< Seconds */
Vkadaba 8:2f2775c34640 588 } ADMW_CORE_Cycle_Control_Cycle_Time_Units;
Vkadaba 5:0728bde67bdb 589
Vkadaba 5:0728bde67bdb 590
Vkadaba 5:0728bde67bdb 591 /* ==========================================================================
Vkadaba 8:2f2775c34640 592 *! \struct ADMW_CORE_Cycle_Control_Struct
Vkadaba 5:0728bde67bdb 593 *! \brief Measurement Cycle Register bit field structure
Vkadaba 5:0728bde67bdb 594 * ========================================================================== */
Vkadaba 8:2f2775c34640 595 typedef struct _ADMW_CORE_Cycle_Control_t {
Vkadaba 5:0728bde67bdb 596 union {
Vkadaba 5:0728bde67bdb 597 struct {
Vkadaba 5:0728bde67bdb 598 uint16_t Cycle_Time : 12; /**< Duration of a Full Measurement Cycle */
Vkadaba 8:2f2775c34640 599 uint16_t Cycle_Type : 1; /**< Type of Measurement Cycle */
Vkadaba 8:2f2775c34640 600 uint16_t Vbias : 1; /**< Voltage Bias Global Enable */
Vkadaba 5:0728bde67bdb 601 uint16_t Cycle_Time_Units : 2; /**< Units for Cycle Time */
Vkadaba 5:0728bde67bdb 602 };
Vkadaba 5:0728bde67bdb 603 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 604 };
Vkadaba 8:2f2775c34640 605 } ADMW_CORE_Cycle_Control_t;
Vkadaba 5:0728bde67bdb 606
Vkadaba 5:0728bde67bdb 607 /*@}*/
Vkadaba 5:0728bde67bdb 608
Vkadaba 5:0728bde67bdb 609 /** @defgroup Status General Status (Status) Register
Vkadaba 5:0728bde67bdb 610 * General Status (Status) Register.
Vkadaba 5:0728bde67bdb 611 * @{
Vkadaba 5:0728bde67bdb 612 */
Vkadaba 5:0728bde67bdb 613
Vkadaba 5:0728bde67bdb 614 /* ==========================================================================
Vkadaba 8:2f2775c34640 615 *! \struct ADMW_CORE_Status_Struct
Vkadaba 5:0728bde67bdb 616 *! \brief General Status Register bit field structure
Vkadaba 5:0728bde67bdb 617 * ========================================================================== */
Vkadaba 8:2f2775c34640 618 typedef struct _ADMW_CORE_Status_t {
Vkadaba 5:0728bde67bdb 619 union {
Vkadaba 5:0728bde67bdb 620 struct {
Vkadaba 5:0728bde67bdb 621 uint8_t reserved0 : 1;
Vkadaba 5:0728bde67bdb 622 uint8_t Alert_Active : 1; /**< Indicates One or More Sensors Alerts are Active */
Vkadaba 5:0728bde67bdb 623 uint8_t Error : 1; /**< Indicates an Error */
Vkadaba 5:0728bde67bdb 624 uint8_t Drdy : 1; /**< Indicates a New Sensor Result is Available to Be Read */
Vkadaba 5:0728bde67bdb 625 uint8_t Cmd_Running : 1; /**< Indicates a Special Command is Active */
Vkadaba 5:0728bde67bdb 626 uint8_t FIFO_Error : 1; /**< Indicates Error with FIFO */
Vkadaba 5:0728bde67bdb 627 uint8_t reserved6 : 2;
Vkadaba 5:0728bde67bdb 628 };
Vkadaba 5:0728bde67bdb 629 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 630 };
Vkadaba 8:2f2775c34640 631 } ADMW_CORE_Status_t;
Vkadaba 5:0728bde67bdb 632
Vkadaba 5:0728bde67bdb 633 /*@}*/
Vkadaba 5:0728bde67bdb 634
Vkadaba 5:0728bde67bdb 635 /** @defgroup Diagnostics_Status Diagnostics Status (Diagnostics_Status) Register
Vkadaba 5:0728bde67bdb 636 * Diagnostics Status (Diagnostics_Status) Register.
Vkadaba 5:0728bde67bdb 637 * @{
Vkadaba 5:0728bde67bdb 638 */
Vkadaba 5:0728bde67bdb 639
Vkadaba 5:0728bde67bdb 640 /* ==========================================================================
Vkadaba 8:2f2775c34640 641 *! \struct ADMW_CORE_Diagnostics_Status_Struct
Vkadaba 5:0728bde67bdb 642 *! \brief Diagnostics Status Register bit field structure
Vkadaba 5:0728bde67bdb 643 * ========================================================================== */
Vkadaba 8:2f2775c34640 644 typedef struct _ADMW_CORE_Diagnostics_Status_t {
Vkadaba 5:0728bde67bdb 645 union {
Vkadaba 5:0728bde67bdb 646 struct {
Vkadaba 5:0728bde67bdb 647 uint16_t Diag_Checksum_Error : 1; /**< Indicates Error on Internal Checksum Calculations */
Vkadaba 6:9d393a9677f4 648 uint16_t reserved1 : 7;
Vkadaba 6:9d393a9677f4 649 uint16_t Diag_Ainm_UV_Error : 1; /**< Indicates Under-Voltage Error on Negative Analog Input */
Vkadaba 6:9d393a9677f4 650 uint16_t Diag_Ainm_OV_Error : 1; /**< Indicates Over-Voltage Error on Negative Analog Input */
Vkadaba 6:9d393a9677f4 651 uint16_t Diag_Ainp_UV_Error : 1; /**< Indicates Under-Voltage Error on Positive Analog Input */
Vkadaba 6:9d393a9677f4 652 uint16_t Diag_Ainp_OV_Error : 1; /**< Indicates Over-Voltage Error on Positive Analog Input */
Vkadaba 6:9d393a9677f4 653 uint16_t Diag_Conversion_Error : 1; /**< Indicates Error During Internal ADC Conversions */
Vkadaba 6:9d393a9677f4 654 uint16_t Diag_Calibration_Error : 1; /**< Indicates Error During Internal Device Calibrations */
Vkadaba 6:9d393a9677f4 655 uint16_t reserved14 : 2;
Vkadaba 5:0728bde67bdb 656 };
Vkadaba 5:0728bde67bdb 657 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 658 };
Vkadaba 8:2f2775c34640 659 } ADMW_CORE_Diagnostics_Status_t;
Vkadaba 5:0728bde67bdb 660
Vkadaba 5:0728bde67bdb 661 /*@}*/
Vkadaba 5:0728bde67bdb 662
Vkadaba 5:0728bde67bdb 663 /** @defgroup Channel_Alert_Status Alert Status Summary (Channel_Alert_Status) Register
Vkadaba 5:0728bde67bdb 664 * Alert Status Summary (Channel_Alert_Status) Register.
Vkadaba 5:0728bde67bdb 665 * @{
Vkadaba 5:0728bde67bdb 666 */
Vkadaba 5:0728bde67bdb 667
Vkadaba 5:0728bde67bdb 668 /* ==========================================================================
Vkadaba 8:2f2775c34640 669 *! \struct ADMW_CORE_Channel_Alert_Status_Struct
Vkadaba 5:0728bde67bdb 670 *! \brief Alert Status Summary Register bit field structure
Vkadaba 5:0728bde67bdb 671 * ========================================================================== */
Vkadaba 8:2f2775c34640 672 typedef struct _ADMW_CORE_Channel_Alert_Status_t {
Vkadaba 5:0728bde67bdb 673 union {
Vkadaba 5:0728bde67bdb 674 struct {
Vkadaba 5:0728bde67bdb 675 uint16_t Alert_Ch0 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 676 uint16_t Alert_Ch1 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 677 uint16_t Alert_Ch2 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 678 uint16_t Alert_Ch3 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 679 uint16_t Alert_Ch4 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 680 uint16_t Alert_Ch5 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 681 uint16_t Alert_Ch6 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 682 uint16_t Alert_Ch7 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 683 uint16_t Alert_Ch8 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 684 uint16_t Alert_Ch9 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 685 uint16_t Alert_Ch10 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 686 uint16_t Alert_Ch11 : 1; /**< Indicates Channel Alert is Active */
Vkadaba 6:9d393a9677f4 687 uint16_t reserved12 : 4;
Vkadaba 5:0728bde67bdb 688 };
Vkadaba 5:0728bde67bdb 689 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 690 };
Vkadaba 8:2f2775c34640 691 } ADMW_CORE_Channel_Alert_Status_t;
Vkadaba 5:0728bde67bdb 692
Vkadaba 5:0728bde67bdb 693 /*@}*/
Vkadaba 5:0728bde67bdb 694
Vkadaba 5:0728bde67bdb 695 /** @defgroup Alert_Status_2 Additional Alert Status Information (Alert_Status_2) Register
Vkadaba 5:0728bde67bdb 696 * Additional Alert Status Information (Alert_Status_2) Register.
Vkadaba 5:0728bde67bdb 697 * @{
Vkadaba 5:0728bde67bdb 698 */
Vkadaba 5:0728bde67bdb 699
Vkadaba 5:0728bde67bdb 700 /* ==========================================================================
Vkadaba 8:2f2775c34640 701 *! \struct ADMW_CORE_Alert_Status_2_Struct
Vkadaba 5:0728bde67bdb 702 *! \brief Additional Alert Status Information Register bit field structure
Vkadaba 5:0728bde67bdb 703 * ========================================================================== */
Vkadaba 8:2f2775c34640 704 typedef struct _ADMW_CORE_Alert_Status_2_t {
Vkadaba 5:0728bde67bdb 705 union {
Vkadaba 5:0728bde67bdb 706 struct {
Vkadaba 5:0728bde67bdb 707 uint16_t reserved0 : 1;
Vkadaba 5:0728bde67bdb 708 uint16_t LUT_Error : 1; /**< Indicates Error with One or More Look-Up-Tables */
Vkadaba 5:0728bde67bdb 709 uint16_t Configuration_Error : 1; /**< Indicates Error with Programmed Configuration */
Vkadaba 6:9d393a9677f4 710 uint16_t reserved3 : 13;
Vkadaba 5:0728bde67bdb 711 };
Vkadaba 5:0728bde67bdb 712 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 713 };
Vkadaba 8:2f2775c34640 714 } ADMW_CORE_Alert_Status_2_t;
Vkadaba 5:0728bde67bdb 715
Vkadaba 5:0728bde67bdb 716 /*@}*/
Vkadaba 5:0728bde67bdb 717
Vkadaba 5:0728bde67bdb 718 /** @defgroup Alert_Detail_Ch Detailed Error Information (Alert_Detail_Ch) Register
Vkadaba 5:0728bde67bdb 719 * Detailed Error Information (Alert_Detail_Ch) Register.
Vkadaba 5:0728bde67bdb 720 * @{
Vkadaba 5:0728bde67bdb 721 */
Vkadaba 5:0728bde67bdb 722
Vkadaba 5:0728bde67bdb 723 /* ==========================================================================
Vkadaba 8:2f2775c34640 724 *! \struct ADMW_CORE_Alert_Detail_Ch_Struct
Vkadaba 5:0728bde67bdb 725 *! \brief Detailed Error Information Register bit field structure
Vkadaba 5:0728bde67bdb 726 * ========================================================================== */
Vkadaba 8:2f2775c34640 727 typedef struct _ADMW_CORE_Alert_Detail_Ch_t {
Vkadaba 5:0728bde67bdb 728 union {
Vkadaba 5:0728bde67bdb 729 struct {
Vkadaba 5:0728bde67bdb 730 uint16_t Time_Out : 1; /**< Indicates Time-Out Error from Digital Sensor */
Vkadaba 5:0728bde67bdb 731 uint16_t Under_Range : 1; /**< Indicates Channel Under-Range */
Vkadaba 5:0728bde67bdb 732 uint16_t Over_Range : 1; /**< Indicates Channel Over-Range */
Vkadaba 5:0728bde67bdb 733 uint16_t Low_Limit : 1; /**< Indicates Sensor Result is Less Than Low Limit */
Vkadaba 5:0728bde67bdb 734 uint16_t High_Limit : 1; /**< Indicates Sensor Result is Greater Than High Limit */
Vkadaba 5:0728bde67bdb 735 uint16_t Sensor_Open : 1; /**< Indicates Sensor Input is Open Circuit */
Vkadaba 5:0728bde67bdb 736 uint16_t Ref_Detect : 1; /**< Indicates Whether ADC Reference is Valid */
Vkadaba 5:0728bde67bdb 737 uint16_t Calibration_Invalid : 1; /**< Indicates Problem During Calibration of Channel */
Vkadaba 5:0728bde67bdb 738 uint16_t Config_Err : 1; /**< Indicates Configuration Error on Channel */
Vkadaba 5:0728bde67bdb 739 uint16_t LUT_Error_Ch : 1; /**< Indicates Error with Channel Look-Up-Table */
Vkadaba 5:0728bde67bdb 740 uint16_t Under_Voltage : 1; /**< Indicates Channel Under-Voltage */
Vkadaba 5:0728bde67bdb 741 uint16_t Over_Voltage : 1; /**< Indicates Channel Over-Voltage */
Vkadaba 5:0728bde67bdb 742 uint16_t Correction_UnderRange : 1; /**< Indicates Result Less Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 743 uint16_t Correction_OverRange : 1; /**< Indicates Result Larger Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 744 uint16_t Sensor_Not_Ready : 1; /**< Indicates Digital Sensor Not Ready When Read */
Vkadaba 5:0728bde67bdb 745 uint16_t Comp_Not_Ready : 1; /**< Indicates Compensation Channel Not Ready When Required */
Vkadaba 5:0728bde67bdb 746 };
Vkadaba 5:0728bde67bdb 747 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 748 };
Vkadaba 8:2f2775c34640 749 } ADMW_CORE_Alert_Detail_Ch_t;
Vkadaba 5:0728bde67bdb 750
Vkadaba 5:0728bde67bdb 751 /*@}*/
Vkadaba 5:0728bde67bdb 752
Vkadaba 5:0728bde67bdb 753 /** @defgroup Error_Code Code Indicating Source of Error (Error_Code) Register
Vkadaba 5:0728bde67bdb 754 * Code Indicating Source of Error (Error_Code) Register.
Vkadaba 5:0728bde67bdb 755 * @{
Vkadaba 5:0728bde67bdb 756 */
Vkadaba 5:0728bde67bdb 757
Vkadaba 5:0728bde67bdb 758 /* ==========================================================================
Vkadaba 8:2f2775c34640 759 *! \struct ADMW_CORE_Error_Code_Struct
Vkadaba 5:0728bde67bdb 760 *! \brief Code Indicating Source of Error Register bit field structure
Vkadaba 5:0728bde67bdb 761 * ========================================================================== */
Vkadaba 8:2f2775c34640 762 typedef struct _ADMW_CORE_Error_Code_t {
Vkadaba 5:0728bde67bdb 763 union {
Vkadaba 5:0728bde67bdb 764 struct {
Vkadaba 5:0728bde67bdb 765 uint16_t Error_Code : 16; /**< Code Indicating Type of Error */
Vkadaba 5:0728bde67bdb 766 };
Vkadaba 5:0728bde67bdb 767 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 768 };
Vkadaba 8:2f2775c34640 769 } ADMW_CORE_Error_Code_t;
Vkadaba 5:0728bde67bdb 770
Vkadaba 5:0728bde67bdb 771 /*@}*/
Vkadaba 5:0728bde67bdb 772
Vkadaba 5:0728bde67bdb 773 /** @defgroup Alert_Code Code Indicating Source of Alert (Alert_Code) Register
Vkadaba 5:0728bde67bdb 774 * Code Indicating Source of Alert (Alert_Code) Register.
Vkadaba 5:0728bde67bdb 775 * @{
Vkadaba 5:0728bde67bdb 776 */
Vkadaba 5:0728bde67bdb 777
Vkadaba 5:0728bde67bdb 778 /* ==========================================================================
Vkadaba 8:2f2775c34640 779 *! \struct ADMW_CORE_Alert_Code_Struct
Vkadaba 5:0728bde67bdb 780 *! \brief Code Indicating Source of Alert Register bit field structure
Vkadaba 5:0728bde67bdb 781 * ========================================================================== */
Vkadaba 8:2f2775c34640 782 typedef struct _ADMW_CORE_Alert_Code_t {
Vkadaba 5:0728bde67bdb 783 union {
Vkadaba 5:0728bde67bdb 784 struct {
Vkadaba 5:0728bde67bdb 785 uint16_t Alert_Code : 16; /**< Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 786 };
Vkadaba 5:0728bde67bdb 787 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 788 };
Vkadaba 8:2f2775c34640 789 } ADMW_CORE_Alert_Code_t;
Vkadaba 5:0728bde67bdb 790
Vkadaba 5:0728bde67bdb 791 /*@}*/
Vkadaba 5:0728bde67bdb 792
Vkadaba 6:9d393a9677f4 793 /** @defgroup External_Reference_Resistor External Reference Information (External_Reference_Resistor) Register
Vkadaba 6:9d393a9677f4 794 * External Reference Information (External_Reference_Resistor) Register.
Vkadaba 5:0728bde67bdb 795 * @{
Vkadaba 5:0728bde67bdb 796 */
Vkadaba 5:0728bde67bdb 797
Vkadaba 5:0728bde67bdb 798 /* ==========================================================================
Vkadaba 8:2f2775c34640 799 *! \struct ADMW_CORE_External_Reference_Resistor_Struct
Vkadaba 5:0728bde67bdb 800 *! \brief External Reference Information Register bit field structure
Vkadaba 5:0728bde67bdb 801 * ========================================================================== */
Vkadaba 8:2f2775c34640 802 typedef struct _ADMW_CORE_External_Reference_Resistor_t {
Vkadaba 5:0728bde67bdb 803 union {
Vkadaba 5:0728bde67bdb 804 struct {
Vkadaba 5:0728bde67bdb 805 float Ext_Refin1_Value; /**< Refin1 Value */
Vkadaba 5:0728bde67bdb 806 };
Vkadaba 5:0728bde67bdb 807 float VALUE32;
Vkadaba 5:0728bde67bdb 808 };
Vkadaba 8:2f2775c34640 809 } ADMW_CORE_External_Reference_Resistor_t;
Vkadaba 5:0728bde67bdb 810
Vkadaba 5:0728bde67bdb 811 /*@}*/
Vkadaba 5:0728bde67bdb 812
Vkadaba 6:9d393a9677f4 813 /** @defgroup External_Voltage_Reference External Reference Information (External_Voltage_Reference) Register
Vkadaba 6:9d393a9677f4 814 * External Reference Information (External_Voltage_Reference) Register.
Vkadaba 5:0728bde67bdb 815 * @{
Vkadaba 5:0728bde67bdb 816 */
Vkadaba 5:0728bde67bdb 817
Vkadaba 5:0728bde67bdb 818 /* ==========================================================================
Vkadaba 8:2f2775c34640 819 *! \struct ADMW_CORE_External_Voltage_Reference_Struct
Vkadaba 5:0728bde67bdb 820 *! \brief External Reference Information Register bit field structure
Vkadaba 5:0728bde67bdb 821 * ========================================================================== */
Vkadaba 8:2f2775c34640 822 typedef struct _ADMW_CORE_External_Voltage_Reference_t {
Vkadaba 5:0728bde67bdb 823 union {
Vkadaba 5:0728bde67bdb 824 struct {
Vkadaba 5:0728bde67bdb 825 float Ext_Refin2_Value; /**< Refin2 Value */
Vkadaba 5:0728bde67bdb 826 };
Vkadaba 5:0728bde67bdb 827 float VALUE32;
Vkadaba 5:0728bde67bdb 828 };
Vkadaba 8:2f2775c34640 829 } ADMW_CORE_External_Voltage_Reference_t;
Vkadaba 5:0728bde67bdb 830
Vkadaba 5:0728bde67bdb 831 /*@}*/
Vkadaba 5:0728bde67bdb 832
Vkadaba 5:0728bde67bdb 833 /** @defgroup Diagnostics_Control Diagnostic Control (Diagnostics_Control) Register
Vkadaba 5:0728bde67bdb 834 * Diagnostic Control (Diagnostics_Control) Register.
Vkadaba 5:0728bde67bdb 835 * @{
Vkadaba 5:0728bde67bdb 836 */
Vkadaba 5:0728bde67bdb 837
Vkadaba 5:0728bde67bdb 838 /* =========================================================================
Vkadaba 8:2f2775c34640 839 *! \enum ADMW_CORE_Diagnostics_Control_Diag_OSD_Freq
Vkadaba 5:0728bde67bdb 840 *! \brief Diagnostics Open Sensor Detect Frequency (Diag_OSD_Freq) Enumerations
Vkadaba 5:0728bde67bdb 841 * ========================================================================= */
Vkadaba 5:0728bde67bdb 842 typedef enum
Vkadaba 5:0728bde67bdb 843 {
Vkadaba 5:0728bde67bdb 844 CORE_DIAGNOSTICS_CONTROL_OCD_OFF = 0, /**< No Open-Circuit Detection During Measurement */
Vkadaba 5:0728bde67bdb 845 CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE = 1, /**< Open-Circuit Detection Performed Once Per Measurement Cycle */
Vkadaba 5:0728bde67bdb 846 CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES = 2, /**< Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */
Vkadaba 5:0728bde67bdb 847 CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES = 3 /**< Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */
Vkadaba 8:2f2775c34640 848 } ADMW_CORE_Diagnostics_Control_Diag_OSD_Freq;
Vkadaba 5:0728bde67bdb 849
Vkadaba 5:0728bde67bdb 850
Vkadaba 5:0728bde67bdb 851 /* ==========================================================================
Vkadaba 8:2f2775c34640 852 *! \struct ADMW_CORE_Diagnostics_Control_Struct
Vkadaba 5:0728bde67bdb 853 *! \brief Diagnostic Control Register bit field structure
Vkadaba 5:0728bde67bdb 854 * ========================================================================== */
Vkadaba 8:2f2775c34640 855 typedef struct _ADMW_CORE_Diagnostics_Control_t {
Vkadaba 5:0728bde67bdb 856 union {
Vkadaba 5:0728bde67bdb 857 struct {
Vkadaba 5:0728bde67bdb 858 uint16_t Diag_Global_En : 1; /**< Diagnostics Global Enable */
Vkadaba 5:0728bde67bdb 859 uint16_t Diag_Meas_En : 1; /**< Diagnostics Measure Enable */
Vkadaba 5:0728bde67bdb 860 uint16_t Diag_OSD_Freq : 2; /**< Diagnostics Open Sensor Detect Frequency */
Vkadaba 6:9d393a9677f4 861 uint16_t reserved4 : 12;
Vkadaba 5:0728bde67bdb 862 };
Vkadaba 5:0728bde67bdb 863 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 864 };
Vkadaba 8:2f2775c34640 865 } ADMW_CORE_Diagnostics_Control_t;
Vkadaba 5:0728bde67bdb 866
Vkadaba 5:0728bde67bdb 867 /*@}*/
Vkadaba 5:0728bde67bdb 868
Vkadaba 5:0728bde67bdb 869 /** @defgroup Data_FIFO FIFO Buffer of Sensor Results (Data_FIFO) Register
Vkadaba 5:0728bde67bdb 870 * FIFO Buffer of Sensor Results (Data_FIFO) Register.
Vkadaba 5:0728bde67bdb 871 * @{
Vkadaba 5:0728bde67bdb 872 */
Vkadaba 5:0728bde67bdb 873
Vkadaba 5:0728bde67bdb 874 /* ==========================================================================
Vkadaba 8:2f2775c34640 875 *! \struct ADMW_CORE_Data_FIFO_Struct
Vkadaba 5:0728bde67bdb 876 *! \brief FIFO Buffer of Sensor Results Register bit field structure
Vkadaba 5:0728bde67bdb 877 * ========================================================================== */
Vkadaba 8:2f2775c34640 878 typedef struct _ADMW_CORE_Data_FIFO_t {
Vkadaba 5:0728bde67bdb 879 union {
Vkadaba 5:0728bde67bdb 880 struct {
Vkadaba 5:0728bde67bdb 881 uint8_t Data_Fifo : 8; /**< Fifo Buffer of Sensor Results */
Vkadaba 5:0728bde67bdb 882 };
Vkadaba 5:0728bde67bdb 883 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 884 };
Vkadaba 8:2f2775c34640 885 } ADMW_CORE_Data_FIFO_t;
Vkadaba 5:0728bde67bdb 886
Vkadaba 5:0728bde67bdb 887 /*@}*/
Vkadaba 5:0728bde67bdb 888
Vkadaba 5:0728bde67bdb 889 /** @defgroup Debug_Code Additional Information on Source of Alert or Errors (Debug_Code) Register
Vkadaba 5:0728bde67bdb 890 * Additional Information on Source of Alert or Errors (Debug_Code) Register.
Vkadaba 5:0728bde67bdb 891 * @{
Vkadaba 5:0728bde67bdb 892 */
Vkadaba 5:0728bde67bdb 893
Vkadaba 5:0728bde67bdb 894 /* ==========================================================================
Vkadaba 8:2f2775c34640 895 *! \struct ADMW_CORE_Debug_Code_Struct
Vkadaba 5:0728bde67bdb 896 *! \brief Additional Information on Source of Alert or Errors Register bit field structure
Vkadaba 5:0728bde67bdb 897 * ========================================================================== */
Vkadaba 8:2f2775c34640 898 typedef struct _ADMW_CORE_Debug_Code_t {
Vkadaba 5:0728bde67bdb 899 union {
Vkadaba 5:0728bde67bdb 900 struct {
Vkadaba 5:0728bde67bdb 901 uint32_t Debug_Code : 32; /**< Additional Information on Source of Alert or Errors */
Vkadaba 5:0728bde67bdb 902 };
Vkadaba 5:0728bde67bdb 903 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 904 };
Vkadaba 8:2f2775c34640 905 } ADMW_CORE_Debug_Code_t;
Vkadaba 5:0728bde67bdb 906
Vkadaba 5:0728bde67bdb 907 /*@}*/
Vkadaba 5:0728bde67bdb 908
Vkadaba 5:0728bde67bdb 909 /** @defgroup Advanced_Sensor_Access Enables Access to Advanced Sensor Configuration (Advanced_Sensor_Access) Register
Vkadaba 5:0728bde67bdb 910 * Enables Access to Advanced Sensor Configuration (Advanced_Sensor_Access) Register.
Vkadaba 5:0728bde67bdb 911 * @{
Vkadaba 5:0728bde67bdb 912 */
Vkadaba 5:0728bde67bdb 913
Vkadaba 5:0728bde67bdb 914 /* ==========================================================================
Vkadaba 8:2f2775c34640 915 *! \struct ADMW_CORE_Advanced_Sensor_Access_Struct
Vkadaba 5:0728bde67bdb 916 *! \brief Enables Access to Advanced Sensor Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 917 * ========================================================================== */
Vkadaba 8:2f2775c34640 918 typedef struct _ADMW_CORE_Advanced_Sensor_Access_t {
Vkadaba 5:0728bde67bdb 919 union {
Vkadaba 5:0728bde67bdb 920 struct {
Vkadaba 5:0728bde67bdb 921 uint16_t Advanced_Sensor_Access : 16; /**< Write Specific Key Value to Access Advanced Sensors */
Vkadaba 5:0728bde67bdb 922 };
Vkadaba 5:0728bde67bdb 923 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 924 };
Vkadaba 8:2f2775c34640 925 } ADMW_CORE_Advanced_Sensor_Access_t;
Vkadaba 5:0728bde67bdb 926
Vkadaba 5:0728bde67bdb 927 /*@}*/
Vkadaba 5:0728bde67bdb 928
Vkadaba 5:0728bde67bdb 929 /** @defgroup LUT_Select Read/Write Strobe (LUT_Select) Register
Vkadaba 5:0728bde67bdb 930 * Read/Write Strobe (LUT_Select) Register.
Vkadaba 5:0728bde67bdb 931 * @{
Vkadaba 5:0728bde67bdb 932 */
Vkadaba 5:0728bde67bdb 933
Vkadaba 5:0728bde67bdb 934 /* =========================================================================
Vkadaba 8:2f2775c34640 935 *! \enum ADMW_CORE_LUT_Select_LUT_RW
Vkadaba 5:0728bde67bdb 936 *! \brief Read or Write LUT Data (LUT_RW) Enumerations
Vkadaba 5:0728bde67bdb 937 * ========================================================================= */
Vkadaba 5:0728bde67bdb 938 typedef enum
Vkadaba 5:0728bde67bdb 939 {
Vkadaba 5:0728bde67bdb 940 CORE_LUT_SELECT_LUT_READ = 0, /**< Read Addressed LUT Data */
Vkadaba 5:0728bde67bdb 941 CORE_LUT_SELECT_LUT_WRITE = 1 /**< Write Addressed LUT Data */
Vkadaba 8:2f2775c34640 942 } ADMW_CORE_LUT_Select_LUT_RW;
Vkadaba 5:0728bde67bdb 943
Vkadaba 5:0728bde67bdb 944
Vkadaba 5:0728bde67bdb 945 /* ==========================================================================
Vkadaba 8:2f2775c34640 946 *! \struct ADMW_CORE_LUT_Select_Struct
Vkadaba 5:0728bde67bdb 947 *! \brief Read/Write Strobe Register bit field structure
Vkadaba 5:0728bde67bdb 948 * ========================================================================== */
Vkadaba 8:2f2775c34640 949 typedef struct _ADMW_CORE_LUT_Select_t {
Vkadaba 5:0728bde67bdb 950 union {
Vkadaba 5:0728bde67bdb 951 struct {
Vkadaba 5:0728bde67bdb 952 uint8_t reserved0 : 7;
Vkadaba 5:0728bde67bdb 953 uint8_t LUT_RW : 1; /**< Read or Write LUT Data */
Vkadaba 5:0728bde67bdb 954 };
Vkadaba 5:0728bde67bdb 955 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 956 };
Vkadaba 8:2f2775c34640 957 } ADMW_CORE_LUT_Select_t;
Vkadaba 5:0728bde67bdb 958
Vkadaba 5:0728bde67bdb 959 /*@}*/
Vkadaba 5:0728bde67bdb 960
Vkadaba 5:0728bde67bdb 961 /** @defgroup LUT_Offset Offset into Selected LUT (LUT_Offset) Register
Vkadaba 5:0728bde67bdb 962 * Offset into Selected LUT (LUT_Offset) Register.
Vkadaba 5:0728bde67bdb 963 * @{
Vkadaba 5:0728bde67bdb 964 */
Vkadaba 5:0728bde67bdb 965
Vkadaba 5:0728bde67bdb 966 /* ==========================================================================
Vkadaba 8:2f2775c34640 967 *! \struct ADMW_CORE_LUT_Offset_Struct
Vkadaba 5:0728bde67bdb 968 *! \brief Offset into Selected LUT Register bit field structure
Vkadaba 5:0728bde67bdb 969 * ========================================================================== */
Vkadaba 8:2f2775c34640 970 typedef struct _ADMW_CORE_LUT_Offset_t {
Vkadaba 5:0728bde67bdb 971 union {
Vkadaba 5:0728bde67bdb 972 struct {
Vkadaba 5:0728bde67bdb 973 uint16_t LUT_Offset : 14; /**< Offset into Look-Up-Table */
Vkadaba 5:0728bde67bdb 974 uint16_t reserved14 : 2;
Vkadaba 5:0728bde67bdb 975 };
Vkadaba 5:0728bde67bdb 976 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 977 };
Vkadaba 8:2f2775c34640 978 } ADMW_CORE_LUT_Offset_t;
Vkadaba 5:0728bde67bdb 979
Vkadaba 5:0728bde67bdb 980 /*@}*/
Vkadaba 5:0728bde67bdb 981
Vkadaba 5:0728bde67bdb 982 /** @defgroup LUT_Data Data to Read/Write from Addressed LUT Entry (LUT_Data) Register
Vkadaba 5:0728bde67bdb 983 * Data to Read/Write from Addressed LUT Entry (LUT_Data) Register.
Vkadaba 5:0728bde67bdb 984 * @{
Vkadaba 5:0728bde67bdb 985 */
Vkadaba 5:0728bde67bdb 986
Vkadaba 5:0728bde67bdb 987 /* ==========================================================================
Vkadaba 8:2f2775c34640 988 *! \struct ADMW_CORE_LUT_Data_Struct
Vkadaba 5:0728bde67bdb 989 *! \brief Data to Read/Write from Addressed LUT Entry Register bit field structure
Vkadaba 5:0728bde67bdb 990 * ========================================================================== */
Vkadaba 8:2f2775c34640 991 typedef struct _ADMW_CORE_LUT_Data_t {
Vkadaba 5:0728bde67bdb 992 union {
Vkadaba 5:0728bde67bdb 993 struct {
Vkadaba 5:0728bde67bdb 994 uint8_t LUT_Data : 8; /**< Data Byte to Write to / Read from Look-Up-Table */
Vkadaba 5:0728bde67bdb 995 };
Vkadaba 5:0728bde67bdb 996 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 997 };
Vkadaba 8:2f2775c34640 998 } ADMW_CORE_LUT_Data_t;
Vkadaba 5:0728bde67bdb 999
Vkadaba 5:0728bde67bdb 1000 /*@}*/
Vkadaba 5:0728bde67bdb 1001
Vkadaba 5:0728bde67bdb 1002 /** @defgroup Revision Hardware, Firmware Revision (Revision) Register
Vkadaba 5:0728bde67bdb 1003 * Hardware, Firmware Revision (Revision) Register.
Vkadaba 5:0728bde67bdb 1004 * @{
Vkadaba 5:0728bde67bdb 1005 */
Vkadaba 5:0728bde67bdb 1006
Vkadaba 5:0728bde67bdb 1007 /* ==========================================================================
Vkadaba 8:2f2775c34640 1008 *! \struct ADMW_CORE_Revision_Struct
Vkadaba 5:0728bde67bdb 1009 *! \brief Hardware, Firmware Revision Register bit field structure
Vkadaba 5:0728bde67bdb 1010 * ========================================================================== */
Vkadaba 8:2f2775c34640 1011 typedef struct _ADMW_CORE_Revision_t {
Vkadaba 5:0728bde67bdb 1012 union {
Vkadaba 5:0728bde67bdb 1013 struct {
Vkadaba 5:0728bde67bdb 1014 uint32_t Rev_Patch : 16; /**< Patch Revision Information */
Vkadaba 5:0728bde67bdb 1015 uint32_t Rev_Minor : 8; /**< Minor Revision Information */
Vkadaba 5:0728bde67bdb 1016 uint32_t Rev_Major : 8; /**< Major Revision Information */
Vkadaba 5:0728bde67bdb 1017 };
Vkadaba 5:0728bde67bdb 1018 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1019 };
Vkadaba 8:2f2775c34640 1020 } ADMW_CORE_Revision_t;
Vkadaba 5:0728bde67bdb 1021
Vkadaba 5:0728bde67bdb 1022 /*@}*/
Vkadaba 5:0728bde67bdb 1023
Vkadaba 5:0728bde67bdb 1024 /** @defgroup Channel_Count Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register
Vkadaba 5:0728bde67bdb 1025 * Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register.
Vkadaba 5:0728bde67bdb 1026 * @{
Vkadaba 5:0728bde67bdb 1027 */
Vkadaba 5:0728bde67bdb 1028
Vkadaba 5:0728bde67bdb 1029 /* ==========================================================================
Vkadaba 8:2f2775c34640 1030 *! \struct ADMW_CORE_Channel_Count_Struct
Vkadaba 5:0728bde67bdb 1031 *! \brief Number of Channel Occurrences per Measurement Cycle Register bit field structure
Vkadaba 5:0728bde67bdb 1032 * ========================================================================== */
Vkadaba 8:2f2775c34640 1033 typedef struct _ADMW_CORE_Channel_Count_t {
Vkadaba 5:0728bde67bdb 1034 union {
Vkadaba 5:0728bde67bdb 1035 struct {
Vkadaba 5:0728bde67bdb 1036 uint8_t Channel_Count : 7; /**< How Many Times Channel Should Appear in One Cycle */
Vkadaba 5:0728bde67bdb 1037 uint8_t Channel_Enable : 1; /**< Enable Channel in Measurement Cycle */
Vkadaba 5:0728bde67bdb 1038 };
Vkadaba 5:0728bde67bdb 1039 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1040 };
Vkadaba 8:2f2775c34640 1041 } ADMW_CORE_Channel_Count_t;
Vkadaba 5:0728bde67bdb 1042
Vkadaba 5:0728bde67bdb 1043 /*@}*/
Vkadaba 5:0728bde67bdb 1044
Vkadaba 5:0728bde67bdb 1045 /** @defgroup Channel_Options Position of Channel Within Sequence and Enable for FFT (Channel_Options) Register
Vkadaba 5:0728bde67bdb 1046 * Position of Channel Within Sequence and Enable for FFT (Channel_Options) Register.
Vkadaba 5:0728bde67bdb 1047 * @{
Vkadaba 5:0728bde67bdb 1048 */
Vkadaba 5:0728bde67bdb 1049
Vkadaba 5:0728bde67bdb 1050 /* ==========================================================================
Vkadaba 8:2f2775c34640 1051 *! \struct ADMW_CORE_Channel_Options_Struct
Vkadaba 5:0728bde67bdb 1052 *! \brief Position of Channel Within Sequence and Enable for FFT Register bit field structure
Vkadaba 5:0728bde67bdb 1053 * ========================================================================== */
Vkadaba 8:2f2775c34640 1054 typedef struct _ADMW_CORE_Channel_Options_t {
Vkadaba 5:0728bde67bdb 1055 union {
Vkadaba 5:0728bde67bdb 1056 struct {
Vkadaba 5:0728bde67bdb 1057 uint8_t Channel_Priority : 4; /**< Indicates Priority or Position of This Channel in Sequence */
Vkadaba 6:9d393a9677f4 1058 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 1059 };
Vkadaba 5:0728bde67bdb 1060 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1061 };
Vkadaba 8:2f2775c34640 1062 } ADMW_CORE_Channel_Options_t;
Vkadaba 5:0728bde67bdb 1063
Vkadaba 5:0728bde67bdb 1064 /*@}*/
Vkadaba 5:0728bde67bdb 1065
Vkadaba 5:0728bde67bdb 1066 /** @defgroup Sensor_Type Sensor Select (Sensor_Type) Register
Vkadaba 5:0728bde67bdb 1067 * Sensor Select (Sensor_Type) Register.
Vkadaba 5:0728bde67bdb 1068 * @{
Vkadaba 5:0728bde67bdb 1069 */
Vkadaba 5:0728bde67bdb 1070
Vkadaba 5:0728bde67bdb 1071 /* =========================================================================
Vkadaba 8:2f2775c34640 1072 *! \enum ADMW_CORE_Sensor_Type_Sensor_Type
Vkadaba 5:0728bde67bdb 1073 *! \brief Sensor Type (Sensor_Type) Enumerations
Vkadaba 5:0728bde67bdb 1074 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1075 typedef enum
Vkadaba 5:0728bde67bdb 1076 {
Vkadaba 6:9d393a9677f4 1077 CORE_SENSOR_TYPE_THERMOCOUPLE_T = 0, /**< Thermocouple T-Type Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1078 CORE_SENSOR_TYPE_THERMOCOUPLE_J = 1, /**< Thermocouple J-Type Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1079 CORE_SENSOR_TYPE_THERMOCOUPLE_K = 2, /**< Thermocouple K-Type Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1080 CORE_SENSOR_TYPE_RTD_2W_PT100 = 32, /**< RTD 2 Wire PT100 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1081 CORE_SENSOR_TYPE_RTD_2W_PT1000 = 33, /**< RTD 2 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1082 CORE_SENSOR_TYPE_RTD_3W_PT100 = 64, /**< RTD 3 Wire PT100 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1083 CORE_SENSOR_TYPE_RTD_3W_PT1000 = 65, /**< RTD 3 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1084 CORE_SENSOR_TYPE_RTD_4W_PT100 = 96, /**< RTD 4 Wire PT100 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1085 CORE_SENSOR_TYPE_RTD_4W_PT1000 = 97, /**< RTD 4 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1086 CORE_SENSOR_TYPE_THERMISTOR_A_10K = 128, /**< Thermistor Type A 10kOhm Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1087 CORE_SENSOR_TYPE_THERMISTOR_B_10K = 129, /**< Thermistor Type B 10kOhm Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1088 CORE_SENSOR_TYPE_BRIDGE_4W_2 = 169, /**< Bridge 4 Wire Sensor 2 Defined Level 2 */
Vkadaba 6:9d393a9677f4 1089 CORE_SENSOR_TYPE_BRIDGE_6W_1 = 200, /**< Bridge 6 Wire Sensor 1 Defined Level 2 */
Vkadaba 6:9d393a9677f4 1090 CORE_SENSOR_TYPE_BRIDGE_6W_2 = 201, /**< Bridge 6 Wire Sensor 2 Defined Level 2 */
Vkadaba 6:9d393a9677f4 1091 CORE_SENSOR_TYPE_DIODE_2C_TYPEA = 224, /**< Diode 2 Current Type A Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1092 CORE_SENSOR_TYPE_DIODE_3C_TYPEA = 225, /**< Diode 3 Current Type A Sensor Defined Level 1 */
Vkadaba 6:9d393a9677f4 1093 CORE_SENSOR_TYPE_DIODE_2C_1 = 232, /**< Diode 2 Current Sensor 1 Defined Level 2 */
Vkadaba 6:9d393a9677f4 1094 CORE_SENSOR_TYPE_DIODE_3C_1 = 233, /**< Diode 3 Current Sensor 1 Defined Level 2 */
Vkadaba 6:9d393a9677f4 1095 CORE_SENSOR_TYPE_VOLTAGE = 512, /**< Voltage Input */
Vkadaba 6:9d393a9677f4 1096 CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_A = 544, /**< Voltage Output Pressure Sensor A Defined Level 1 */
Vkadaba 6:9d393a9677f4 1097 CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_B = 545, /**< Voltage Output Pressure Sensor B Defined Level 1 */
Vkadaba 6:9d393a9677f4 1098 CORE_SENSOR_TYPE_CURRENT = 768, /**< Current Input */
Vkadaba 6:9d393a9677f4 1099 CORE_SENSOR_TYPE_I2C_PRESSURE_A = 2048, /**< I2C Pressure Sensor A Defined Level 1 */
Vkadaba 6:9d393a9677f4 1100 CORE_SENSOR_TYPE_I2C_PRESSURE_B = 2049, /**< I2C Pressure Sensor B Defined Level 1 */
Vkadaba 6:9d393a9677f4 1101 CORE_SENSOR_TYPE_I2C_HUMIDITY_A = 2112, /**< I2C Humidity Sensor A Defined Level 1 */
Vkadaba 6:9d393a9677f4 1102 CORE_SENSOR_TYPE_I2C_HUMIDITY_B = 2113, /**< I2C Humidity Sensor B Defined Level 1 */
Vkadaba 6:9d393a9677f4 1103 CORE_SENSOR_TYPE_SPI_ACCELEROMETER_A = 3200, /**< SPI Accelerometer Sensor A 3-Axis Defined Level 1 */
Vkadaba 6:9d393a9677f4 1104 CORE_SENSOR_TYPE_SPI_ACCELEROMETER_B = 3201, /**< SPI Accelerometer Sensor B 3-Axis Defined Level 1 */
Vkadaba 6:9d393a9677f4 1105 CORE_SENSOR_TYPE_CO2_A_DEF = 3584 /**< CO2 Sensor A Defined Level 1 */
Vkadaba 8:2f2775c34640 1106 } ADMW_CORE_Sensor_Type_Sensor_Type;
Vkadaba 5:0728bde67bdb 1107
Vkadaba 5:0728bde67bdb 1108
Vkadaba 5:0728bde67bdb 1109 /* ==========================================================================
Vkadaba 8:2f2775c34640 1110 *! \struct ADMW_CORE_Sensor_Type_Struct
Vkadaba 5:0728bde67bdb 1111 *! \brief Sensor Select Register bit field structure
Vkadaba 5:0728bde67bdb 1112 * ========================================================================== */
Vkadaba 8:2f2775c34640 1113 typedef struct _ADMW_CORE_Sensor_Type_t {
Vkadaba 5:0728bde67bdb 1114 union {
Vkadaba 5:0728bde67bdb 1115 struct {
Vkadaba 5:0728bde67bdb 1116 uint16_t Sensor_Type : 12; /**< Sensor Type */
Vkadaba 5:0728bde67bdb 1117 uint16_t reserved12 : 4;
Vkadaba 5:0728bde67bdb 1118 };
Vkadaba 5:0728bde67bdb 1119 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1120 };
Vkadaba 8:2f2775c34640 1121 } ADMW_CORE_Sensor_Type_t;
Vkadaba 5:0728bde67bdb 1122
Vkadaba 5:0728bde67bdb 1123 /*@}*/
Vkadaba 5:0728bde67bdb 1124
Vkadaba 5:0728bde67bdb 1125 /** @defgroup Sensor_Details Sensor Details (Sensor_Details) Register
Vkadaba 5:0728bde67bdb 1126 * Sensor Details (Sensor_Details) Register.
Vkadaba 5:0728bde67bdb 1127 * @{
Vkadaba 5:0728bde67bdb 1128 */
Vkadaba 5:0728bde67bdb 1129
Vkadaba 5:0728bde67bdb 1130 /* =========================================================================
Vkadaba 8:2f2775c34640 1131 *! \enum ADMW_CORE_Sensor_Details_Measurement_Units
Vkadaba 5:0728bde67bdb 1132 *! \brief Units of Sensor Measurement (Measurement_Units) Enumerations
Vkadaba 5:0728bde67bdb 1133 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1134 typedef enum
Vkadaba 5:0728bde67bdb 1135 {
Vkadaba 5:0728bde67bdb 1136 CORE_SENSOR_DETAILS_UNITS_UNSPECIFIED = 0, /**< Not Specified */
Vkadaba 5:0728bde67bdb 1137 CORE_SENSOR_DETAILS_UNITS_RESERVED = 1, /**< Reserved */
Vkadaba 5:0728bde67bdb 1138 CORE_SENSOR_DETAILS_UNITS_DEGC = 2, /**< Degrees C */
Vkadaba 5:0728bde67bdb 1139 CORE_SENSOR_DETAILS_UNITS_DEGF = 3 /**< Degrees F */
Vkadaba 8:2f2775c34640 1140 } ADMW_CORE_Sensor_Details_Measurement_Units;
Vkadaba 8:2f2775c34640 1141
Vkadaba 5:0728bde67bdb 1142
Vkadaba 6:9d393a9677f4 1143 /* =========================================================================
Vkadaba 6:9d393a9677f4 1144 *! \enum ADMW_CORE_Sensor_Details_LUT_Select
Vkadaba 6:9d393a9677f4 1145 *! \brief Lookup Table Select (LUT_Select) Enumerations
Vkadaba 6:9d393a9677f4 1146 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1147 typedef enum
Vkadaba 6:9d393a9677f4 1148 {
Vkadaba 6:9d393a9677f4 1149 CORE_SENSOR_DETAILS_LUT_DEFAULT = 0, /**< Default Lookup Table for Selected Sensor Type */
Vkadaba 6:9d393a9677f4 1150 CORE_SENSOR_DETAILS_LUT_UNITY = 1, /**< Unity Lookup Table. 1:1 Mapping From Input to Output */
Vkadaba 6:9d393a9677f4 1151 CORE_SENSOR_DETAILS_LUT_CUSTOM = 2, /**< User Defined Custom Lookup Table. */
Vkadaba 6:9d393a9677f4 1152 CORE_SENSOR_DETAILS_LUT_RESERVED = 3 /**< Reserved */
Vkadaba 8:2f2775c34640 1153 } ADMW_CORE_Sensor_Details_LUT_Select;
Vkadaba 6:9d393a9677f4 1154
Vkadaba 6:9d393a9677f4 1155
Vkadaba 6:9d393a9677f4 1156 /* =========================================================================
Vkadaba 8:2f2775c34640 1157 *! \enum ADMW_CORE_Sensor_Details_Reference_Select
Vkadaba 5:0728bde67bdb 1158 *! \brief Reference Selection (Reference_Select) Enumerations
Vkadaba 5:0728bde67bdb 1159 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1160 typedef enum
Vkadaba 5:0728bde67bdb 1161 {
Vkadaba 8:2f2775c34640 1162 CORE_SENSOR_DETAILS_REF_VINT = 0, /**< Internal voltage reference (1.2V) */
Vkadaba 8:2f2775c34640 1163 CORE_SENSOR_DETAILS_REF_VEXT1 = 1, /**< External Voltage reference applied to VERF+ and VREF- */
Vkadaba 8:2f2775c34640 1164 CORE_SENSOR_DETAILS_REF_VRESERVED = 2, /**< ExReserved for future use. */
Vkadaba 8:2f2775c34640 1165 CORE_SENSOR_DETAILS_REF_AVDD = 3, /**< AVDD Supply Used as Excitation and Internally applied as Reference */
Vkadaba 8:2f2775c34640 1166 CORE_SENSOR_DETAILS_REF_NUM /**< Number of reference options. */
Vkadaba 8:2f2775c34640 1167 } ADMW_CORE_Sensor_Details_Reference_Select;
Vkadaba 5:0728bde67bdb 1168
Vkadaba 5:0728bde67bdb 1169
Vkadaba 5:0728bde67bdb 1170 /* =========================================================================
Vkadaba 8:2f2775c34640 1171 *! \enum ADMW_CORE_Sensor_Details_PGA_Gain
Vkadaba 5:0728bde67bdb 1172 *! \brief PGA Gain (PGA_Gain) Enumerations
Vkadaba 5:0728bde67bdb 1173 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1174 typedef enum
Vkadaba 5:0728bde67bdb 1175 {
Vkadaba 5:0728bde67bdb 1176 CORE_SENSOR_DETAILS_PGA_GAIN_1 = 0, /**< Gain of 1 */
Vkadaba 5:0728bde67bdb 1177 CORE_SENSOR_DETAILS_PGA_GAIN_2 = 1, /**< Gain of 2 */
Vkadaba 5:0728bde67bdb 1178 CORE_SENSOR_DETAILS_PGA_GAIN_4 = 2, /**< Gain of 4 */
Vkadaba 5:0728bde67bdb 1179 CORE_SENSOR_DETAILS_PGA_GAIN_8 = 3, /**< Gain of 8 */
Vkadaba 5:0728bde67bdb 1180 CORE_SENSOR_DETAILS_PGA_GAIN_16 = 4, /**< Gain of 16 */
Vkadaba 5:0728bde67bdb 1181 CORE_SENSOR_DETAILS_PGA_GAIN_32 = 5, /**< Gain of 32 */
Vkadaba 5:0728bde67bdb 1182 CORE_SENSOR_DETAILS_PGA_GAIN_64 = 6, /**< Gain of 64 */
Vkadaba 5:0728bde67bdb 1183 CORE_SENSOR_DETAILS_PGA_GAIN_128 = 7 /**< Gain of 128 */
Vkadaba 8:2f2775c34640 1184 } ADMW_CORE_Sensor_Details_PGA_Gain;
Vkadaba 5:0728bde67bdb 1185
Vkadaba 5:0728bde67bdb 1186
Vkadaba 6:9d393a9677f4 1187 /* =========================================================================
Vkadaba 8:2f2775c34640 1188 *! \enum ADMW_CORE_Sensor_Details_RTD_Curve
Vkadaba 6:9d393a9677f4 1189 *! \brief Select RTD Curve for Linearisation (RTD_Curve) Enumerations
Vkadaba 6:9d393a9677f4 1190 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1191 typedef enum
Vkadaba 6:9d393a9677f4 1192 {
Vkadaba 6:9d393a9677f4 1193 CORE_SENSOR_DETAILS_EUROPEAN_CURVE = 0, /**< European Curve */
Vkadaba 6:9d393a9677f4 1194 CORE_SENSOR_DETAILS_AMERICAN_CURVE = 1, /**< American Curve */
Vkadaba 6:9d393a9677f4 1195 CORE_SENSOR_DETAILS_JAPANESE_CURVE = 2, /**< Japanese Curve */
Vkadaba 6:9d393a9677f4 1196 CORE_SENSOR_DETAILS_ITS90_CURVE = 3 /**< ITS-90 Curve */
Vkadaba 8:2f2775c34640 1197 } ADMW_CORE_Sensor_Details_RTD_Curve;
Vkadaba 6:9d393a9677f4 1198
Vkadaba 6:9d393a9677f4 1199
Vkadaba 5:0728bde67bdb 1200 /* ==========================================================================
Vkadaba 8:2f2775c34640 1201 *! \struct ADMW_CORE_Sensor_Details_Struct
Vkadaba 5:0728bde67bdb 1202 *! \brief Sensor Details Register bit field structure
Vkadaba 5:0728bde67bdb 1203 * ========================================================================== */
Vkadaba 8:2f2775c34640 1204 typedef struct _ADMW_CORE_Sensor_Details_t {
Vkadaba 5:0728bde67bdb 1205 union {
Vkadaba 5:0728bde67bdb 1206 struct {
Vkadaba 5:0728bde67bdb 1207 uint32_t Measurement_Units : 4; /**< Units of Sensor Measurement */
Vkadaba 5:0728bde67bdb 1208 uint32_t Compensation_Channel : 4; /**< Indicates Which Channel is Used to Compensate Sensor Result */
Vkadaba 8:2f2775c34640 1209 uint32_t reserved8 : 7;
Vkadaba 8:2f2775c34640 1210 uint32_t LUT_Select : 2; /**< Lookup Table Select */
Vkadaba 5:0728bde67bdb 1211 uint32_t Do_Not_Publish : 1; /**< Do Not Publish Channel Result */
Vkadaba 8:2f2775c34640 1212 uint32_t reserved18 : 2;
Vkadaba 6:9d393a9677f4 1213 uint32_t Reference_Select : 4; /**< Reference Selection */
Vkadaba 6:9d393a9677f4 1214 uint32_t PGA_Gain : 3; /**< PGA Gain */
Vkadaba 6:9d393a9677f4 1215 uint32_t RTD_Curve : 2; /**< Select RTD Curve for Linearisation */
Vkadaba 6:9d393a9677f4 1216 uint32_t reserved29 : 2;
Vkadaba 6:9d393a9677f4 1217 uint32_t Compensation_Disable : 1; /**< Indicates Compensation Data Should Not Be Used */
Vkadaba 5:0728bde67bdb 1218 };
Vkadaba 5:0728bde67bdb 1219 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1220 };
Vkadaba 8:2f2775c34640 1221 } ADMW_CORE_Sensor_Details_t;
Vkadaba 5:0728bde67bdb 1222
Vkadaba 5:0728bde67bdb 1223 /*@}*/
Vkadaba 5:0728bde67bdb 1224
Vkadaba 5:0728bde67bdb 1225 /** @defgroup Channel_Excitation Excitation Current (Channel_Excitation) Register
Vkadaba 5:0728bde67bdb 1226 * Excitation Current (Channel_Excitation) Register.
Vkadaba 5:0728bde67bdb 1227 * @{
Vkadaba 5:0728bde67bdb 1228 */
Vkadaba 5:0728bde67bdb 1229
Vkadaba 5:0728bde67bdb 1230 /* =========================================================================
Vkadaba 8:2f2775c34640 1231 *! \enum ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current
Vkadaba 5:0728bde67bdb 1232 *! \brief Current Source Value (IOUT_Excitation_Current) Enumerations
Vkadaba 5:0728bde67bdb 1233 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1234 typedef enum
Vkadaba 5:0728bde67bdb 1235 {
Vkadaba 18:cbf514cce921 1236 CORE_CHANNEL_EXCITATION_NONE =-1, /**< No External urrent Source */
Vkadaba 18:cbf514cce921 1237 CORE_CHANNEL_EXCITATION_EXTERNAL = 0, /**< External Current Sourced */
Vkadaba 18:cbf514cce921 1238 CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */
Vkadaba 18:cbf514cce921 1239 CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */
Vkadaba 18:cbf514cce921 1240 CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */
Vkadaba 18:cbf514cce921 1241 CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */
Vkadaba 18:cbf514cce921 1242 CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */
Vkadaba 18:cbf514cce921 1243 CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */
Vkadaba 18:cbf514cce921 1244 CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */
Vkadaba 18:cbf514cce921 1245 CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8 /**< 1000 \mu;A */
Vkadaba 8:2f2775c34640 1246 } ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current;
Vkadaba 5:0728bde67bdb 1247
Vkadaba 5:0728bde67bdb 1248
Vkadaba 5:0728bde67bdb 1249 /* =========================================================================
Vkadaba 8:2f2775c34640 1250 *! \enum ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio
Vkadaba 5:0728bde67bdb 1251 *! \brief Modify Current Ratios Used for Diode Sensor (IOUT_Diode_Ratio) Enumerations
Vkadaba 5:0728bde67bdb 1252 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1253 typedef enum
Vkadaba 5:0728bde67bdb 1254 {
Vkadaba 6:9d393a9677f4 1255 CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA = 0, /**< 2 Current measurement 10uA 100uA */
Vkadaba 6:9d393a9677f4 1256 CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA = 1, /**< 2 Current measurement 20uA 160uA */
Vkadaba 6:9d393a9677f4 1257 CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA = 2, /**< 2 Current measurement 50uA 300uA */
Vkadaba 6:9d393a9677f4 1258 CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA = 3, /**< 2 Current measurement 100uA 600uA */
Vkadaba 6:9d393a9677f4 1259 CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA = 4, /**< 3 current measuremet 10uA 50uA 100uA */
Vkadaba 6:9d393a9677f4 1260 CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA = 5, /**< 3 current measuremet 20uA 100uA 160uA */
Vkadaba 6:9d393a9677f4 1261 CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA = 6, /**< 3 current measuremet 50uA 150uA 300uA */
Vkadaba 6:9d393a9677f4 1262 CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA = 7 /**< 3 current measuremet 100uA 300uA 600uA */
Vkadaba 8:2f2775c34640 1263 } ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio;
Vkadaba 5:0728bde67bdb 1264
Vkadaba 5:0728bde67bdb 1265
Vkadaba 5:0728bde67bdb 1266 /* ==========================================================================
Vkadaba 8:2f2775c34640 1267 *! \struct ADMW_CORE_Channel_Excitation_Struct
Vkadaba 5:0728bde67bdb 1268 *! \brief Excitation Current Register bit field structure
Vkadaba 5:0728bde67bdb 1269 * ========================================================================== */
Vkadaba 8:2f2775c34640 1270 typedef struct _ADMW_CORE_Channel_Excitation_t {
Vkadaba 5:0728bde67bdb 1271 union {
Vkadaba 5:0728bde67bdb 1272 struct {
Vkadaba 6:9d393a9677f4 1273 uint16_t IOUT_Excitation_Current : 4; /**< Current Source Value */
Vkadaba 6:9d393a9677f4 1274 uint16_t reserved4 : 2;
Vkadaba 6:9d393a9677f4 1275 uint16_t IOUT_Diode_Ratio : 3; /**< Modify Current Ratios Used for Diode Sensor */
Vkadaba 6:9d393a9677f4 1276 uint16_t reserved9 : 7;
Vkadaba 5:0728bde67bdb 1277 };
Vkadaba 6:9d393a9677f4 1278 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1279 };
Vkadaba 8:2f2775c34640 1280 } ADMW_CORE_Channel_Excitation_t;
Vkadaba 5:0728bde67bdb 1281
Vkadaba 5:0728bde67bdb 1282 /*@}*/
Vkadaba 5:0728bde67bdb 1283
Vkadaba 5:0728bde67bdb 1284 /** @defgroup Settling_Time Settling Time (Settling_Time) Register
Vkadaba 5:0728bde67bdb 1285 * Settling Time (Settling_Time) Register.
Vkadaba 5:0728bde67bdb 1286 * @{
Vkadaba 5:0728bde67bdb 1287 */
Vkadaba 5:0728bde67bdb 1288
Vkadaba 5:0728bde67bdb 1289 /* =========================================================================
Vkadaba 8:2f2775c34640 1290 *! \enum ADMW_CORE_Settling_Time_Settling_Time_Units
Vkadaba 5:0728bde67bdb 1291 *! \brief Units for Settling Time (Settling_Time_Units) Enumerations
Vkadaba 5:0728bde67bdb 1292 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1293 typedef enum
Vkadaba 5:0728bde67bdb 1294 {
Vkadaba 5:0728bde67bdb 1295 CORE_SETTLING_TIME_MICROSECONDS = 0, /**< Micro-Seconds */
Vkadaba 5:0728bde67bdb 1296 CORE_SETTLING_TIME_MILLISECONDS = 1, /**< Milli-Seconds */
Vkadaba 5:0728bde67bdb 1297 CORE_SETTLING_TIME_SECONDS = 2 /**< Seconds */
Vkadaba 8:2f2775c34640 1298 } ADMW_CORE_Settling_Time_Settling_Time_Units;
Vkadaba 5:0728bde67bdb 1299
Vkadaba 5:0728bde67bdb 1300
Vkadaba 5:0728bde67bdb 1301 /* ==========================================================================
Vkadaba 8:2f2775c34640 1302 *! \struct ADMW_CORE_Settling_Time_Struct
Vkadaba 5:0728bde67bdb 1303 *! \brief Settling Time Register bit field structure
Vkadaba 5:0728bde67bdb 1304 * ========================================================================== */
Vkadaba 8:2f2775c34640 1305 typedef struct _ADMW_CORE_Settling_Time_t {
Vkadaba 5:0728bde67bdb 1306 union {
Vkadaba 5:0728bde67bdb 1307 struct {
Vkadaba 5:0728bde67bdb 1308 uint16_t Settling_Time : 14; /**< Settling Time to Allow When Switching to Channel */
Vkadaba 5:0728bde67bdb 1309 uint16_t Settling_Time_Units : 2; /**< Units for Settling Time */
Vkadaba 5:0728bde67bdb 1310 };
Vkadaba 5:0728bde67bdb 1311 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1312 };
Vkadaba 8:2f2775c34640 1313 } ADMW_CORE_Settling_Time_t;
Vkadaba 5:0728bde67bdb 1314
Vkadaba 5:0728bde67bdb 1315 /*@}*/
Vkadaba 5:0728bde67bdb 1316
Vkadaba 6:9d393a9677f4 1317 /** @defgroup Measurement_Setup ADC Digital Filter Selection (Measurement_Setup) Register
Vkadaba 6:9d393a9677f4 1318 * ADC Digital Filter Selection (Measurement_Setup) Register.
Vkadaba 5:0728bde67bdb 1319 * @{
Vkadaba 5:0728bde67bdb 1320 */
Vkadaba 5:0728bde67bdb 1321
Vkadaba 5:0728bde67bdb 1322 /* =========================================================================
Vkadaba 8:2f2775c34640 1323 *! \enum ADMW_CORE_Measurement_Setup_Custom_Calibration
Vkadaba 6:9d393a9677f4 1324 *! \brief Enables Custom Calibration for Selected Sensor (Custom_Calibration) Enumerations
Vkadaba 6:9d393a9677f4 1325 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1326 typedef enum
Vkadaba 6:9d393a9677f4 1327 {
Vkadaba 6:9d393a9677f4 1328 CORE_MEASUREMENT_SETUP_INTERNAL_CALIBRATION = 0, /**< */
Vkadaba 6:9d393a9677f4 1329 CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION = 1 /**< */
Vkadaba 8:2f2775c34640 1330 } ADMW_CORE_Measurement_Setup_Custom_Calibration;
Vkadaba 6:9d393a9677f4 1331
Vkadaba 6:9d393a9677f4 1332
Vkadaba 6:9d393a9677f4 1333 /* =========================================================================
Vkadaba 8:2f2775c34640 1334 *! \enum ADMW_CORE_Measurement_Setup_NOTCH_EN_2
Vkadaba 6:9d393a9677f4 1335 *! \brief Enable Notch 2 Filter Mode (NOTCH_EN_2) Enumerations
Vkadaba 6:9d393a9677f4 1336 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1337 typedef enum
Vkadaba 6:9d393a9677f4 1338 {
Vkadaba 6:9d393a9677f4 1339 CORE_MEASUREMENT_SETUP_NOTCH_DIS = 0, /**< Disable Notch Filter */
Vkadaba 6:9d393a9677f4 1340 CORE_MEASUREMENT_SETUP_NOTCH_EN = 1 /**< Enable Notch 2 Filter option. Places a addtional notch at 1.2X ODR. Can be used for 50 and 60Hz rejection simultaneously */
Vkadaba 8:2f2775c34640 1341 } ADMW_CORE_Measurement_Setup_NOTCH_EN_2;
Vkadaba 6:9d393a9677f4 1342
Vkadaba 6:9d393a9677f4 1343
Vkadaba 6:9d393a9677f4 1344 /* =========================================================================
Vkadaba 8:2f2775c34640 1345 *! \enum ADMW_CORE_Measurement_Setup_PST_MEAS_EXC_CTRL
Vkadaba 8:2f2775c34640 1346 *! \brief Disabled Current Sources After Measurement Has Been Complete (PST_MEAS_EXC_CTRL) Enumerations
Vkadaba 8:2f2775c34640 1347 * ========================================================================= */
Vkadaba 8:2f2775c34640 1348 typedef enum
Vkadaba 8:2f2775c34640 1349 {
Vkadaba 8:2f2775c34640 1350 CORE_MEASUREMENT_SETUP_POWERCYCLE = 0, /**< */
Vkadaba 8:2f2775c34640 1351 CORE_MEASUREMENT_SETUP_ALWAYSON = 1 /**< */
Vkadaba 8:2f2775c34640 1352 } ADMW_CORE_Measurement_Setup_PST_MEAS_EXC_CTRL;
Vkadaba 8:2f2775c34640 1353
Vkadaba 8:2f2775c34640 1354
Vkadaba 8:2f2775c34640 1355 /* =========================================================================
Vkadaba 8:2f2775c34640 1356 *! \enum ADMW_CORE_Measurement_Setup_Chop_Mode
Vkadaba 6:9d393a9677f4 1357 *! \brief Enabled and Disable Chop Mode (Chop_Mode) Enumerations
Vkadaba 6:9d393a9677f4 1358 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1359 typedef enum
Vkadaba 6:9d393a9677f4 1360 {
Vkadaba 6:9d393a9677f4 1361 CORE_MEASUREMENT_SETUP_DISABLE_CHOP = 0, /**< Chop Mode Disabled */
Vkadaba 8:2f2775c34640 1362 CORE_MEASUREMENT_SETUP_HW_CHOP = 1, /**< Chop Mode Enabled */
Vkadaba 8:2f2775c34640 1363 CORE_MEASUREMENT_SETUP_ENABLE_CHOP = 2, /**< Chop Mode Enabled */
Vkadaba 8:2f2775c34640 1364 CORE_MEASUREMENT_SETUP_HW_SW_CHOP = 3 /**< Chop Mode Enabled */
Vkadaba 8:2f2775c34640 1365 } ADMW_CORE_Measurement_Setup_Chop_Mode;
Vkadaba 6:9d393a9677f4 1366
Vkadaba 6:9d393a9677f4 1367
Vkadaba 6:9d393a9677f4 1368 /* =========================================================================
Vkadaba 8:2f2775c34640 1369 *! \enum ADMW_CORE_Measurement_Setup_ADC_Filter_Type
Vkadaba 5:0728bde67bdb 1370 *! \brief ADC Digital Filter Type (ADC_Filter_Type) Enumerations
Vkadaba 5:0728bde67bdb 1371 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1372 typedef enum
Vkadaba 5:0728bde67bdb 1373 {
Vkadaba 6:9d393a9677f4 1374 CORE_MEASUREMENT_SETUP_ENABLE_SINC4 = 0, /**< Enabled SINC4 Filter */
Vkadaba 6:9d393a9677f4 1375 CORE_MEASUREMENT_SETUP_ENABLE_SINC3 = 1 /**< Enabled SINC3 Filter */
Vkadaba 8:2f2775c34640 1376 } ADMW_CORE_Measurement_Setup_ADC_Filter_Type;
Vkadaba 6:9d393a9677f4 1377
Vkadaba 6:9d393a9677f4 1378
Vkadaba 6:9d393a9677f4 1379 /* =========================================================================
Vkadaba 8:2f2775c34640 1380 *! \enum ADMW_CORE_Measurement_Setup_GND_SW
Vkadaba 6:9d393a9677f4 1381 *! \brief GND_SW (GND_SW) Enumerations
Vkadaba 6:9d393a9677f4 1382 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1383 typedef enum
Vkadaba 6:9d393a9677f4 1384 {
Vkadaba 6:9d393a9677f4 1385 CORE_MEASUREMENT_SETUP_GND_SW_OPEN = 0, /**< GND_SW Open. The GND SW is not enabled for the sensor measurement */
Vkadaba 6:9d393a9677f4 1386 CORE_MEASUREMENT_SETUP_GND_SW_CLOSED = 1 /**< GND_SW Closed. The GND SW is enabled for the sensor measurement, bit wiil Remain Closed After the Measurement */
Vkadaba 8:2f2775c34640 1387 } ADMW_CORE_Measurement_Setup_GND_SW;
Vkadaba 8:2f2775c34640 1388
Vkadaba 8:2f2775c34640 1389
Vkadaba 8:2f2775c34640 1390 /* =========================================================================
Vkadaba 8:2f2775c34640 1391 *! \enum ADMW_CORE_Measurement_Setup_Buffer_Bypass
Vkadaba 8:2f2775c34640 1392 *! \brief Disable Buffers (Buffer_Bypass) Enumerations
Vkadaba 8:2f2775c34640 1393 * ========================================================================= */
Vkadaba 8:2f2775c34640 1394 typedef enum
Vkadaba 8:2f2775c34640 1395 {
Vkadaba 8:2f2775c34640 1396 CORE_MEASUREMENT_SETUP_BUFFERS_ENABLED = 0, /**< */
Vkadaba 8:2f2775c34640 1397 CORE_MEASUREMENT_SETUP_BUFFERS_DISABLED = 1 /**< */
Vkadaba 8:2f2775c34640 1398 } ADMW_CORE_Measurement_Setup_Buffer_Bypass;
Vkadaba 5:0728bde67bdb 1399
Vkadaba 5:0728bde67bdb 1400
Vkadaba 5:0728bde67bdb 1401 /* ==========================================================================
Vkadaba 8:2f2775c34640 1402 *! \struct ADMW_CORE_Measurement_Setup_Struct
Vkadaba 5:0728bde67bdb 1403 *! \brief ADC Digital Filter Selection Register bit field structure
Vkadaba 5:0728bde67bdb 1404 * ========================================================================== */
Vkadaba 8:2f2775c34640 1405 typedef struct _ADMW_CORE_Measurement_Setup_t {
Vkadaba 5:0728bde67bdb 1406 union {
Vkadaba 5:0728bde67bdb 1407 struct {
Vkadaba 6:9d393a9677f4 1408 uint32_t ADC_SF : 7; /**< ADC Digital Filter Select */
Vkadaba 6:9d393a9677f4 1409 uint32_t Custom_Calibration : 1; /**< Enables Custom Calibration for Selected Sensor */
Vkadaba 6:9d393a9677f4 1410 uint32_t NOTCH_EN_2 : 1; /**< Enable Notch 2 Filter Mode */
Vkadaba 6:9d393a9677f4 1411 uint32_t PST_MEAS_EXC_CTRL : 1; /**< Disabled Current Sources After Measurement Has Been Complete */
Vkadaba 6:9d393a9677f4 1412 uint32_t Chop_Mode : 2; /**< Enabled and Disable Chop Mode */
Vkadaba 6:9d393a9677f4 1413 uint32_t ADC_Filter_Type : 1; /**< ADC Digital Filter Type */
Vkadaba 6:9d393a9677f4 1414 uint32_t GND_SW : 2; /**< GND_SW */
Vkadaba 8:2f2775c34640 1415 uint32_t Buffer_Bypass : 1; /**< Disable Buffers */
Vkadaba 8:2f2775c34640 1416 uint32_t reserved16 : 16;
Vkadaba 5:0728bde67bdb 1417 };
Vkadaba 5:0728bde67bdb 1418 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1419 };
Vkadaba 8:2f2775c34640 1420 } ADMW_CORE_Measurement_Setup_t;
Vkadaba 5:0728bde67bdb 1421
Vkadaba 5:0728bde67bdb 1422 /*@}*/
Vkadaba 5:0728bde67bdb 1423
Vkadaba 5:0728bde67bdb 1424 /** @defgroup High_Threshold_Limit High Threshold (High_Threshold_Limit) Register
Vkadaba 5:0728bde67bdb 1425 * High Threshold (High_Threshold_Limit) Register.
Vkadaba 5:0728bde67bdb 1426 * @{
Vkadaba 5:0728bde67bdb 1427 */
Vkadaba 5:0728bde67bdb 1428
Vkadaba 5:0728bde67bdb 1429 /* ==========================================================================
Vkadaba 8:2f2775c34640 1430 *! \struct ADMW_CORE_High_Threshold_Limit_Struct
Vkadaba 5:0728bde67bdb 1431 *! \brief High Threshold Register bit field structure
Vkadaba 5:0728bde67bdb 1432 * ========================================================================== */
Vkadaba 8:2f2775c34640 1433 typedef struct _ADMW_CORE_High_Threshold_Limit_t {
Vkadaba 5:0728bde67bdb 1434 union {
Vkadaba 5:0728bde67bdb 1435 struct {
Vkadaba 5:0728bde67bdb 1436 float High_Threshold; /**< Upper Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 1437 };
Vkadaba 5:0728bde67bdb 1438 float VALUE32;
Vkadaba 5:0728bde67bdb 1439 };
Vkadaba 8:2f2775c34640 1440 } ADMW_CORE_High_Threshold_Limit_t;
Vkadaba 5:0728bde67bdb 1441
Vkadaba 5:0728bde67bdb 1442 /*@}*/
Vkadaba 5:0728bde67bdb 1443
Vkadaba 5:0728bde67bdb 1444 /** @defgroup Low_Threshold_Limit Low Threshold (Low_Threshold_Limit) Register
Vkadaba 5:0728bde67bdb 1445 * Low Threshold (Low_Threshold_Limit) Register.
Vkadaba 5:0728bde67bdb 1446 * @{
Vkadaba 5:0728bde67bdb 1447 */
Vkadaba 5:0728bde67bdb 1448
Vkadaba 5:0728bde67bdb 1449 /* ==========================================================================
Vkadaba 8:2f2775c34640 1450 *! \struct ADMW_CORE_Low_Threshold_Limit_Struct
Vkadaba 5:0728bde67bdb 1451 *! \brief Low Threshold Register bit field structure
Vkadaba 5:0728bde67bdb 1452 * ========================================================================== */
Vkadaba 8:2f2775c34640 1453 typedef struct _ADMW_CORE_Low_Threshold_Limit_t {
Vkadaba 5:0728bde67bdb 1454 union {
Vkadaba 5:0728bde67bdb 1455 struct {
Vkadaba 5:0728bde67bdb 1456 float Low_Threshold; /**< Lower Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 1457 };
Vkadaba 5:0728bde67bdb 1458 float VALUE32;
Vkadaba 5:0728bde67bdb 1459 };
Vkadaba 8:2f2775c34640 1460 } ADMW_CORE_Low_Threshold_Limit_t;
Vkadaba 5:0728bde67bdb 1461
Vkadaba 5:0728bde67bdb 1462 /*@}*/
Vkadaba 5:0728bde67bdb 1463
Vkadaba 5:0728bde67bdb 1464 /** @defgroup Sensor_Offset Sensor Offset Adjustment (Sensor_Offset) Register
Vkadaba 5:0728bde67bdb 1465 * Sensor Offset Adjustment (Sensor_Offset) Register.
Vkadaba 5:0728bde67bdb 1466 * @{
Vkadaba 5:0728bde67bdb 1467 */
Vkadaba 5:0728bde67bdb 1468
Vkadaba 5:0728bde67bdb 1469 /* ==========================================================================
Vkadaba 8:2f2775c34640 1470 *! \struct ADMW_CORE_Sensor_Offset_Struct
Vkadaba 5:0728bde67bdb 1471 *! \brief Sensor Offset Adjustment Register bit field structure
Vkadaba 5:0728bde67bdb 1472 * ========================================================================== */
Vkadaba 8:2f2775c34640 1473 typedef struct _ADMW_CORE_Sensor_Offset_t {
Vkadaba 5:0728bde67bdb 1474 union {
Vkadaba 5:0728bde67bdb 1475 struct {
Vkadaba 5:0728bde67bdb 1476 float Sensor_Offset; /**< Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 1477 };
Vkadaba 5:0728bde67bdb 1478 float VALUE32;
Vkadaba 5:0728bde67bdb 1479 };
Vkadaba 8:2f2775c34640 1480 } ADMW_CORE_Sensor_Offset_t;
Vkadaba 5:0728bde67bdb 1481
Vkadaba 5:0728bde67bdb 1482 /*@}*/
Vkadaba 5:0728bde67bdb 1483
Vkadaba 5:0728bde67bdb 1484 /** @defgroup Sensor_Gain Sensor Gain Adjustment (Sensor_Gain) Register
Vkadaba 5:0728bde67bdb 1485 * Sensor Gain Adjustment (Sensor_Gain) Register.
Vkadaba 5:0728bde67bdb 1486 * @{
Vkadaba 5:0728bde67bdb 1487 */
Vkadaba 5:0728bde67bdb 1488
Vkadaba 5:0728bde67bdb 1489 /* ==========================================================================
Vkadaba 8:2f2775c34640 1490 *! \struct ADMW_CORE_Sensor_Gain_Struct
Vkadaba 5:0728bde67bdb 1491 *! \brief Sensor Gain Adjustment Register bit field structure
Vkadaba 5:0728bde67bdb 1492 * ========================================================================== */
Vkadaba 8:2f2775c34640 1493 typedef struct _ADMW_CORE_Sensor_Gain_t {
Vkadaba 5:0728bde67bdb 1494 union {
Vkadaba 5:0728bde67bdb 1495 struct {
Vkadaba 5:0728bde67bdb 1496 float Sensor_Gain; /**< Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 1497 };
Vkadaba 5:0728bde67bdb 1498 float VALUE32;
Vkadaba 5:0728bde67bdb 1499 };
Vkadaba 8:2f2775c34640 1500 } ADMW_CORE_Sensor_Gain_t;
Vkadaba 5:0728bde67bdb 1501
Vkadaba 5:0728bde67bdb 1502 /*@}*/
Vkadaba 5:0728bde67bdb 1503
Vkadaba 5:0728bde67bdb 1504 /** @defgroup Alert_Code_Ch Per-Channel Detailed Alert-Code Information (Alert_Code_Ch) Register
Vkadaba 5:0728bde67bdb 1505 * Per-Channel Detailed Alert-Code Information (Alert_Code_Ch) Register.
Vkadaba 5:0728bde67bdb 1506 * @{
Vkadaba 5:0728bde67bdb 1507 */
Vkadaba 5:0728bde67bdb 1508
Vkadaba 5:0728bde67bdb 1509 /* ==========================================================================
Vkadaba 8:2f2775c34640 1510 *! \struct ADMW_CORE_Alert_Code_Ch_Struct
Vkadaba 5:0728bde67bdb 1511 *! \brief Per-Channel Detailed Alert-Code Information Register bit field structure
Vkadaba 5:0728bde67bdb 1512 * ========================================================================== */
Vkadaba 8:2f2775c34640 1513 typedef struct _ADMW_CORE_Alert_Code_Ch_t {
Vkadaba 5:0728bde67bdb 1514 union {
Vkadaba 5:0728bde67bdb 1515 struct {
Vkadaba 5:0728bde67bdb 1516 uint16_t Alert_Code_Ch : 16; /**< Per-Channel Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 1517 };
Vkadaba 5:0728bde67bdb 1518 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1519 };
Vkadaba 8:2f2775c34640 1520 } ADMW_CORE_Alert_Code_Ch_t;
Vkadaba 5:0728bde67bdb 1521
Vkadaba 5:0728bde67bdb 1522 /*@}*/
Vkadaba 5:0728bde67bdb 1523
Vkadaba 5:0728bde67bdb 1524 /** @defgroup Channel_Skip Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register
Vkadaba 5:0728bde67bdb 1525 * Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register.
Vkadaba 5:0728bde67bdb 1526 * @{
Vkadaba 5:0728bde67bdb 1527 */
Vkadaba 5:0728bde67bdb 1528
Vkadaba 5:0728bde67bdb 1529 /* ==========================================================================
Vkadaba 8:2f2775c34640 1530 *! \struct ADMW_CORE_Channel_Skip_Struct
Vkadaba 5:0728bde67bdb 1531 *! \brief Indicates If Channel Will Skip Some Measurement Cycles Register bit field structure
Vkadaba 5:0728bde67bdb 1532 * ========================================================================== */
Vkadaba 8:2f2775c34640 1533 typedef struct _ADMW_CORE_Channel_Skip_t {
Vkadaba 5:0728bde67bdb 1534 union {
Vkadaba 5:0728bde67bdb 1535 struct {
Vkadaba 5:0728bde67bdb 1536 uint16_t Channel_Skip : 8; /**< Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 1537 uint16_t reserved8 : 8;
Vkadaba 5:0728bde67bdb 1538 };
Vkadaba 5:0728bde67bdb 1539 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1540 };
Vkadaba 8:2f2775c34640 1541 } ADMW_CORE_Channel_Skip_t;
Vkadaba 5:0728bde67bdb 1542
Vkadaba 5:0728bde67bdb 1543 /*@}*/
Vkadaba 5:0728bde67bdb 1544
Vkadaba 5:0728bde67bdb 1545 /** @defgroup Sensor_Parameter Sensor Parameter Adjustment (Sensor_Parameter) Register
Vkadaba 5:0728bde67bdb 1546 * Sensor Parameter Adjustment (Sensor_Parameter) Register.
Vkadaba 5:0728bde67bdb 1547 * @{
Vkadaba 5:0728bde67bdb 1548 */
Vkadaba 5:0728bde67bdb 1549
Vkadaba 5:0728bde67bdb 1550 /* ==========================================================================
Vkadaba 8:2f2775c34640 1551 *! \struct ADMW_CORE_Sensor_Parameter_Struct
Vkadaba 5:0728bde67bdb 1552 *! \brief Sensor Parameter Adjustment Register bit field structure
Vkadaba 5:0728bde67bdb 1553 * ========================================================================== */
Vkadaba 8:2f2775c34640 1554 typedef struct _ADMW_CORE_Sensor_Parameter_t {
Vkadaba 5:0728bde67bdb 1555 union {
Vkadaba 5:0728bde67bdb 1556 struct {
Vkadaba 5:0728bde67bdb 1557 float Sensor_Parameter; /**< Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 1558 };
Vkadaba 5:0728bde67bdb 1559 float VALUE32;
Vkadaba 5:0728bde67bdb 1560 };
Vkadaba 8:2f2775c34640 1561 } ADMW_CORE_Sensor_Parameter_t;
Vkadaba 5:0728bde67bdb 1562
Vkadaba 5:0728bde67bdb 1563 /*@}*/
Vkadaba 5:0728bde67bdb 1564
Vkadaba 5:0728bde67bdb 1565 /** @defgroup Calibration_Parameter Calibration Parameter Value (Calibration_Parameter) Register
Vkadaba 5:0728bde67bdb 1566 * Calibration Parameter Value (Calibration_Parameter) Register.
Vkadaba 5:0728bde67bdb 1567 * @{
Vkadaba 5:0728bde67bdb 1568 */
Vkadaba 5:0728bde67bdb 1569
Vkadaba 5:0728bde67bdb 1570 /* ==========================================================================
Vkadaba 8:2f2775c34640 1571 *! \struct ADMW_CORE_Calibration_Parameter_Struct
Vkadaba 5:0728bde67bdb 1572 *! \brief Calibration Parameter Value Register bit field structure
Vkadaba 5:0728bde67bdb 1573 * ========================================================================== */
Vkadaba 8:2f2775c34640 1574 typedef struct _ADMW_CORE_Calibration_Parameter_t {
Vkadaba 5:0728bde67bdb 1575 union {
Vkadaba 5:0728bde67bdb 1576 struct {
Vkadaba 5:0728bde67bdb 1577 uint32_t Calibration_Parameter : 24; /**< Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 1578 uint32_t Calibration_Parameter_Enable : 1; /**< Enables Use of Calibration_Parameter */
Vkadaba 5:0728bde67bdb 1579 uint32_t reserved25 : 7;
Vkadaba 5:0728bde67bdb 1580 };
Vkadaba 5:0728bde67bdb 1581 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1582 };
Vkadaba 8:2f2775c34640 1583 } ADMW_CORE_Calibration_Parameter_t;
Vkadaba 5:0728bde67bdb 1584
Vkadaba 5:0728bde67bdb 1585 /*@}*/
Vkadaba 5:0728bde67bdb 1586
Vkadaba 5:0728bde67bdb 1587 /** @defgroup Digital_Sensor_Config Digital Sensor Data Coding (Digital_Sensor_Config) Register
Vkadaba 5:0728bde67bdb 1588 * Digital Sensor Data Coding (Digital_Sensor_Config) Register.
Vkadaba 5:0728bde67bdb 1589 * @{
Vkadaba 5:0728bde67bdb 1590 */
Vkadaba 5:0728bde67bdb 1591
Vkadaba 5:0728bde67bdb 1592 /* =========================================================================
Vkadaba 8:2f2775c34640 1593 *! \enum ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding
Vkadaba 5:0728bde67bdb 1594 *! \brief Data Encoding of Sensor Result (Digital_Sensor_Coding) Enumerations
Vkadaba 5:0728bde67bdb 1595 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1596 typedef enum
Vkadaba 5:0728bde67bdb 1597 {
Vkadaba 5:0728bde67bdb 1598 CORE_DIGITAL_SENSOR_CONFIG_CODING_NONE = 0, /**< None/Invalid */
Vkadaba 5:0728bde67bdb 1599 CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR = 1, /**< Unipolar */
Vkadaba 5:0728bde67bdb 1600 CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL = 2, /**< Twos Complement */
Vkadaba 5:0728bde67bdb 1601 CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY = 3 /**< Offset Binary */
Vkadaba 8:2f2775c34640 1602 } ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding;
Vkadaba 5:0728bde67bdb 1603
Vkadaba 5:0728bde67bdb 1604
Vkadaba 5:0728bde67bdb 1605 /* ==========================================================================
Vkadaba 8:2f2775c34640 1606 *! \struct ADMW_CORE_Digital_Sensor_Config_Struct
Vkadaba 5:0728bde67bdb 1607 *! \brief Digital Sensor Data Coding Register bit field structure
Vkadaba 5:0728bde67bdb 1608 * ========================================================================== */
Vkadaba 8:2f2775c34640 1609 typedef struct _ADMW_CORE_Digital_Sensor_Config_t {
Vkadaba 5:0728bde67bdb 1610 union {
Vkadaba 5:0728bde67bdb 1611 struct {
Vkadaba 5:0728bde67bdb 1612 uint16_t Digital_Sensor_Coding : 2; /**< Data Encoding of Sensor Result */
Vkadaba 5:0728bde67bdb 1613 uint16_t Digital_Sensor_Little_Endian : 1; /**< Data Endianness of Sensor Result */
Vkadaba 5:0728bde67bdb 1614 uint16_t Digital_Sensor_Left_Aligned : 1; /**< Data Alignment Within the Data Frame */
Vkadaba 5:0728bde67bdb 1615 uint16_t Digital_Sensor_Bit_Offset : 4; /**< Data Bit Offset, Relative to Alignment */
Vkadaba 5:0728bde67bdb 1616 uint16_t Digital_Sensor_Read_Bytes : 3; /**< Number of Bytes to Read from the Sensor */
Vkadaba 5:0728bde67bdb 1617 uint16_t Digital_Sensor_Data_Bits : 5; /**< Number of Relevant Data Bits */
Vkadaba 5:0728bde67bdb 1618 };
Vkadaba 5:0728bde67bdb 1619 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1620 };
Vkadaba 8:2f2775c34640 1621 } ADMW_CORE_Digital_Sensor_Config_t;
Vkadaba 5:0728bde67bdb 1622
Vkadaba 5:0728bde67bdb 1623 /*@}*/
Vkadaba 5:0728bde67bdb 1624
Vkadaba 5:0728bde67bdb 1625 /** @defgroup Digital_Sensor_Address Sensor Address (Digital_Sensor_Address) Register
Vkadaba 5:0728bde67bdb 1626 * Sensor Address (Digital_Sensor_Address) Register.
Vkadaba 5:0728bde67bdb 1627 * @{
Vkadaba 5:0728bde67bdb 1628 */
Vkadaba 5:0728bde67bdb 1629
Vkadaba 5:0728bde67bdb 1630 /* ==========================================================================
Vkadaba 8:2f2775c34640 1631 *! \struct ADMW_CORE_Digital_Sensor_Address_Struct
Vkadaba 5:0728bde67bdb 1632 *! \brief Sensor Address Register bit field structure
Vkadaba 5:0728bde67bdb 1633 * ========================================================================== */
Vkadaba 8:2f2775c34640 1634 typedef struct _ADMW_CORE_Digital_Sensor_Address_t {
Vkadaba 5:0728bde67bdb 1635 union {
Vkadaba 5:0728bde67bdb 1636 struct {
Vkadaba 5:0728bde67bdb 1637 uint8_t Digital_Sensor_Address : 8; /**< I2C Address or Write Address Command for SPI Sensor */
Vkadaba 5:0728bde67bdb 1638 };
Vkadaba 5:0728bde67bdb 1639 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1640 };
Vkadaba 8:2f2775c34640 1641 } ADMW_CORE_Digital_Sensor_Address_t;
Vkadaba 5:0728bde67bdb 1642
Vkadaba 5:0728bde67bdb 1643 /*@}*/
Vkadaba 5:0728bde67bdb 1644
Vkadaba 5:0728bde67bdb 1645 /** @defgroup Digital_Sensor_Num_Cmds Number of Configuration, Read Commands for Digital Sensors (Digital_Sensor_Num_Cmds) Register
Vkadaba 5:0728bde67bdb 1646 * Number of Configuration, Read Commands for Digital Sensors (Digital_Sensor_Num_Cmds) Register.
Vkadaba 5:0728bde67bdb 1647 * @{
Vkadaba 5:0728bde67bdb 1648 */
Vkadaba 5:0728bde67bdb 1649
Vkadaba 5:0728bde67bdb 1650 /* ==========================================================================
Vkadaba 8:2f2775c34640 1651 *! \struct ADMW_CORE_Digital_Sensor_Num_Cmds_Struct
Vkadaba 5:0728bde67bdb 1652 *! \brief Number of Configuration, Read Commands for Digital Sensors Register bit field structure
Vkadaba 5:0728bde67bdb 1653 * ========================================================================== */
Vkadaba 8:2f2775c34640 1654 typedef struct _ADMW_CORE_Digital_Sensor_Num_Cmds_t {
Vkadaba 5:0728bde67bdb 1655 union {
Vkadaba 5:0728bde67bdb 1656 struct {
Vkadaba 5:0728bde67bdb 1657 uint8_t Digital_Sensor_Num_Cfg_Cmds : 3; /**< Number of Configuration Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 1658 uint8_t reserved3 : 1;
Vkadaba 5:0728bde67bdb 1659 uint8_t Digital_Sensor_Num_Read_Cmds : 3; /**< Number of Read Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 1660 uint8_t reserved7 : 1;
Vkadaba 5:0728bde67bdb 1661 };
Vkadaba 5:0728bde67bdb 1662 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1663 };
Vkadaba 8:2f2775c34640 1664 } ADMW_CORE_Digital_Sensor_Num_Cmds_t;
Vkadaba 5:0728bde67bdb 1665
Vkadaba 5:0728bde67bdb 1666 /*@}*/
Vkadaba 5:0728bde67bdb 1667
Vkadaba 5:0728bde67bdb 1668 /** @defgroup Digital_Sensor_Comms Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register
Vkadaba 5:0728bde67bdb 1669 * Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register.
Vkadaba 5:0728bde67bdb 1670 * @{
Vkadaba 5:0728bde67bdb 1671 */
Vkadaba 5:0728bde67bdb 1672
Vkadaba 5:0728bde67bdb 1673 /* =========================================================================
Vkadaba 8:2f2775c34640 1674 *! \enum ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En
Vkadaba 5:0728bde67bdb 1675 *! \brief Enable Digital Sensor Comms Register Parameters (Digital_Sensor_Comms_En) Enumerations
Vkadaba 5:0728bde67bdb 1676 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1677 typedef enum
Vkadaba 5:0728bde67bdb 1678 {
Vkadaba 5:0728bde67bdb 1679 CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_DEFAULT = 0, /**< Default Parameters Used for Digital Sensor Communications */
Vkadaba 5:0728bde67bdb 1680 CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_USER = 1 /**< User Supplied Parameters Used for Digital Sensor Communications */
Vkadaba 8:2f2775c34640 1681 } ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En;
Vkadaba 5:0728bde67bdb 1682
Vkadaba 5:0728bde67bdb 1683
Vkadaba 5:0728bde67bdb 1684 /* =========================================================================
Vkadaba 8:2f2775c34640 1685 *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Clock
Vkadaba 5:0728bde67bdb 1686 *! \brief Controls Clock Frequency for SPI Sensors (SPI_Clock) Enumerations
Vkadaba 5:0728bde67bdb 1687 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1688 typedef enum
Vkadaba 5:0728bde67bdb 1689 {
Vkadaba 8:2f2775c34640 1690 CORE_DIGITAL_SENSOR_COMMS_SPI_8MHZ = 0, /**< 8MHz */
Vkadaba 8:2f2775c34640 1691 CORE_DIGITAL_SENSOR_COMMS_SPI_4MHZ = 1, /**< 4MHz */
Vkadaba 8:2f2775c34640 1692 CORE_DIGITAL_SENSOR_COMMS_SPI_2MHZ = 2, /**< 2MHz */
Vkadaba 8:2f2775c34640 1693 CORE_DIGITAL_SENSOR_COMMS_SPI_1MHZ = 3, /**< 1MHz */
Vkadaba 8:2f2775c34640 1694 CORE_DIGITAL_SENSOR_COMMS_SPI_500KHZ = 4, /**< 500kHz */
Vkadaba 8:2f2775c34640 1695 CORE_DIGITAL_SENSOR_COMMS_SPI_250KHZ = 5, /**< 250kHz */
Vkadaba 8:2f2775c34640 1696 CORE_DIGITAL_SENSOR_COMMS_SPI_125KHZ = 6, /**< 125kHz */
Vkadaba 8:2f2775c34640 1697 CORE_DIGITAL_SENSOR_COMMS_SPI_62P5KHZ = 7, /**< 62.5kHz */
Vkadaba 8:2f2775c34640 1698 CORE_DIGITAL_SENSOR_COMMS_SPI_31P3KHZ = 8, /**< 31.25kHz */
Vkadaba 8:2f2775c34640 1699 CORE_DIGITAL_SENSOR_COMMS_SPI_15P6KHZ = 9, /**< 15.625kHz */
Vkadaba 8:2f2775c34640 1700 CORE_DIGITAL_SENSOR_COMMS_SPI_7P8KHZ = 10, /**< 7.8kHz */
Vkadaba 8:2f2775c34640 1701 CORE_DIGITAL_SENSOR_COMMS_SPI_3P9KHZ = 11, /**< 3.9kHz */
Vkadaba 8:2f2775c34640 1702 CORE_DIGITAL_SENSOR_COMMS_SPI_1P9KHZ = 12, /**< 1.95kHz */
Vkadaba 8:2f2775c34640 1703 CORE_DIGITAL_SENSOR_COMMS_SPI_977HZ = 13, /**< 977Hz */
Vkadaba 8:2f2775c34640 1704 CORE_DIGITAL_SENSOR_COMMS_SPI_488HZ = 14, /**< 488Hz */
Vkadaba 8:2f2775c34640 1705 CORE_DIGITAL_SENSOR_COMMS_SPI_244HZ = 15 /**< 244Hz */
Vkadaba 8:2f2775c34640 1706 } ADMW_CORE_Digital_Sensor_Comms_SPI_Clock;
Vkadaba 5:0728bde67bdb 1707
Vkadaba 5:0728bde67bdb 1708
Vkadaba 5:0728bde67bdb 1709 /* =========================================================================
Vkadaba 8:2f2775c34640 1710 *! \enum ADMW_CORE_Digital_Sensor_Comms_I2C_Clock
Vkadaba 5:0728bde67bdb 1711 *! \brief Controls SCLK Frequency for I2C Sensors (I2C_Clock) Enumerations
Vkadaba 5:0728bde67bdb 1712 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1713 typedef enum
Vkadaba 5:0728bde67bdb 1714 {
Vkadaba 5:0728bde67bdb 1715 CORE_DIGITAL_SENSOR_COMMS_I2C_100K = 0, /**< 100kHz SCL */
Vkadaba 5:0728bde67bdb 1716 CORE_DIGITAL_SENSOR_COMMS_I2C_400K = 1, /**< 400kHz SCL */
Vkadaba 5:0728bde67bdb 1717 CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 = 2, /**< Reserved */
Vkadaba 5:0728bde67bdb 1718 CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 = 3 /**< Reserved */
Vkadaba 8:2f2775c34640 1719 } ADMW_CORE_Digital_Sensor_Comms_I2C_Clock;
Vkadaba 5:0728bde67bdb 1720
Vkadaba 5:0728bde67bdb 1721
Vkadaba 5:0728bde67bdb 1722 /* =========================================================================
Vkadaba 8:2f2775c34640 1723 *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Mode
Vkadaba 5:0728bde67bdb 1724 *! \brief Configuration for Sensor SPI Protocol (SPI_Mode) Enumerations
Vkadaba 5:0728bde67bdb 1725 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1726 typedef enum
Vkadaba 5:0728bde67bdb 1727 {
Vkadaba 5:0728bde67bdb 1728 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_0 = 0, /**< Clock Polarity = 0 Clock Phase = 0 */
Vkadaba 5:0728bde67bdb 1729 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 = 1, /**< Clock Polarity = 0 Clock Phase = 1 */
Vkadaba 5:0728bde67bdb 1730 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 = 2, /**< Clock Polarity = 1 Clock Phase = 0 */
Vkadaba 5:0728bde67bdb 1731 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 = 3 /**< Clock Polarity = 1 Clock Phase = 1 */
Vkadaba 8:2f2775c34640 1732 } ADMW_CORE_Digital_Sensor_Comms_SPI_Mode;
Vkadaba 5:0728bde67bdb 1733
Vkadaba 5:0728bde67bdb 1734
Vkadaba 5:0728bde67bdb 1735 /* ==========================================================================
Vkadaba 8:2f2775c34640 1736 *! \struct ADMW_CORE_Digital_Sensor_Comms_Struct
Vkadaba 5:0728bde67bdb 1737 *! \brief Digital Sensor Communication Clock Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 1738 * ========================================================================== */
Vkadaba 8:2f2775c34640 1739 typedef struct _ADMW_CORE_Digital_Sensor_Comms_t {
Vkadaba 5:0728bde67bdb 1740 union {
Vkadaba 5:0728bde67bdb 1741 struct {
Vkadaba 5:0728bde67bdb 1742 uint16_t Digital_Sensor_Comms_En : 1; /**< Enable Digital Sensor Comms Register Parameters */
Vkadaba 5:0728bde67bdb 1743 uint16_t SPI_Clock : 4; /**< Controls Clock Frequency for SPI Sensors */
Vkadaba 5:0728bde67bdb 1744 uint16_t I2C_Clock : 2; /**< Controls SCLK Frequency for I2C Sensors */
Vkadaba 6:9d393a9677f4 1745 uint16_t reserved7 : 3;
Vkadaba 5:0728bde67bdb 1746 uint16_t SPI_Mode : 2; /**< Configuration for Sensor SPI Protocol */
Vkadaba 6:9d393a9677f4 1747 uint16_t reserved12 : 4;
Vkadaba 5:0728bde67bdb 1748 };
Vkadaba 5:0728bde67bdb 1749 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1750 };
Vkadaba 8:2f2775c34640 1751 } ADMW_CORE_Digital_Sensor_Comms_t;
Vkadaba 5:0728bde67bdb 1752
Vkadaba 5:0728bde67bdb 1753 /*@}*/
Vkadaba 5:0728bde67bdb 1754
Vkadaba 5:0728bde67bdb 1755 /** @defgroup Digital_Sensor_Command1 Sensor Configuration Command1 (Digital_Sensor_Command1) Register
Vkadaba 5:0728bde67bdb 1756 * Sensor Configuration Command1 (Digital_Sensor_Command1) Register.
Vkadaba 5:0728bde67bdb 1757 * @{
Vkadaba 5:0728bde67bdb 1758 */
Vkadaba 5:0728bde67bdb 1759
Vkadaba 5:0728bde67bdb 1760 /* ==========================================================================
Vkadaba 8:2f2775c34640 1761 *! \struct ADMW_CORE_Digital_Sensor_Command1_Struct
Vkadaba 5:0728bde67bdb 1762 *! \brief Sensor Configuration Command1 Register bit field structure
Vkadaba 5:0728bde67bdb 1763 * ========================================================================== */
Vkadaba 8:2f2775c34640 1764 typedef struct _ADMW_CORE_Digital_Sensor_Command1_t {
Vkadaba 5:0728bde67bdb 1765 union {
Vkadaba 5:0728bde67bdb 1766 struct {
Vkadaba 5:0728bde67bdb 1767 uint8_t Digital_Sensor_Command1 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1768 };
Vkadaba 5:0728bde67bdb 1769 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1770 };
Vkadaba 8:2f2775c34640 1771 } ADMW_CORE_Digital_Sensor_Command1_t;
Vkadaba 5:0728bde67bdb 1772
Vkadaba 5:0728bde67bdb 1773 /*@}*/
Vkadaba 5:0728bde67bdb 1774
Vkadaba 5:0728bde67bdb 1775 /** @defgroup Digital_Sensor_Command2 Sensor Configuration Command2 (Digital_Sensor_Command2) Register
Vkadaba 5:0728bde67bdb 1776 * Sensor Configuration Command2 (Digital_Sensor_Command2) Register.
Vkadaba 5:0728bde67bdb 1777 * @{
Vkadaba 5:0728bde67bdb 1778 */
Vkadaba 5:0728bde67bdb 1779
Vkadaba 5:0728bde67bdb 1780 /* ==========================================================================
Vkadaba 8:2f2775c34640 1781 *! \struct ADMW_CORE_Digital_Sensor_Command2_Struct
Vkadaba 5:0728bde67bdb 1782 *! \brief Sensor Configuration Command2 Register bit field structure
Vkadaba 5:0728bde67bdb 1783 * ========================================================================== */
Vkadaba 8:2f2775c34640 1784 typedef struct _ADMW_CORE_Digital_Sensor_Command2_t {
Vkadaba 5:0728bde67bdb 1785 union {
Vkadaba 5:0728bde67bdb 1786 struct {
Vkadaba 5:0728bde67bdb 1787 uint8_t Digital_Sensor_Command2 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1788 };
Vkadaba 5:0728bde67bdb 1789 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1790 };
Vkadaba 8:2f2775c34640 1791 } ADMW_CORE_Digital_Sensor_Command2_t;
Vkadaba 5:0728bde67bdb 1792
Vkadaba 5:0728bde67bdb 1793 /*@}*/
Vkadaba 5:0728bde67bdb 1794
Vkadaba 5:0728bde67bdb 1795 /** @defgroup Digital_Sensor_Command3 Sensor Configuration Command3 (Digital_Sensor_Command3) Register
Vkadaba 5:0728bde67bdb 1796 * Sensor Configuration Command3 (Digital_Sensor_Command3) Register.
Vkadaba 5:0728bde67bdb 1797 * @{
Vkadaba 5:0728bde67bdb 1798 */
Vkadaba 5:0728bde67bdb 1799
Vkadaba 5:0728bde67bdb 1800 /* ==========================================================================
Vkadaba 8:2f2775c34640 1801 *! \struct ADMW_CORE_Digital_Sensor_Command3_Struct
Vkadaba 5:0728bde67bdb 1802 *! \brief Sensor Configuration Command3 Register bit field structure
Vkadaba 5:0728bde67bdb 1803 * ========================================================================== */
Vkadaba 8:2f2775c34640 1804 typedef struct _ADMW_CORE_Digital_Sensor_Command3_t {
Vkadaba 5:0728bde67bdb 1805 union {
Vkadaba 5:0728bde67bdb 1806 struct {
Vkadaba 5:0728bde67bdb 1807 uint8_t Digital_Sensor_Command3 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1808 };
Vkadaba 5:0728bde67bdb 1809 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1810 };
Vkadaba 8:2f2775c34640 1811 } ADMW_CORE_Digital_Sensor_Command3_t;
Vkadaba 5:0728bde67bdb 1812
Vkadaba 5:0728bde67bdb 1813 /*@}*/
Vkadaba 5:0728bde67bdb 1814
Vkadaba 5:0728bde67bdb 1815 /** @defgroup Digital_Sensor_Command4 Sensor Configuration Command4 (Digital_Sensor_Command4) Register
Vkadaba 5:0728bde67bdb 1816 * Sensor Configuration Command4 (Digital_Sensor_Command4) Register.
Vkadaba 5:0728bde67bdb 1817 * @{
Vkadaba 5:0728bde67bdb 1818 */
Vkadaba 5:0728bde67bdb 1819
Vkadaba 5:0728bde67bdb 1820 /* ==========================================================================
Vkadaba 8:2f2775c34640 1821 *! \struct ADMW_CORE_Digital_Sensor_Command4_Struct
Vkadaba 5:0728bde67bdb 1822 *! \brief Sensor Configuration Command4 Register bit field structure
Vkadaba 5:0728bde67bdb 1823 * ========================================================================== */
Vkadaba 8:2f2775c34640 1824 typedef struct _ADMW_CORE_Digital_Sensor_Command4_t {
Vkadaba 5:0728bde67bdb 1825 union {
Vkadaba 5:0728bde67bdb 1826 struct {
Vkadaba 5:0728bde67bdb 1827 uint8_t Digital_Sensor_Command4 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1828 };
Vkadaba 5:0728bde67bdb 1829 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1830 };
Vkadaba 8:2f2775c34640 1831 } ADMW_CORE_Digital_Sensor_Command4_t;
Vkadaba 5:0728bde67bdb 1832
Vkadaba 5:0728bde67bdb 1833 /*@}*/
Vkadaba 5:0728bde67bdb 1834
Vkadaba 5:0728bde67bdb 1835 /** @defgroup Digital_Sensor_Command5 Sensor Configuration Command5 (Digital_Sensor_Command5) Register
Vkadaba 5:0728bde67bdb 1836 * Sensor Configuration Command5 (Digital_Sensor_Command5) Register.
Vkadaba 5:0728bde67bdb 1837 * @{
Vkadaba 5:0728bde67bdb 1838 */
Vkadaba 5:0728bde67bdb 1839
Vkadaba 5:0728bde67bdb 1840 /* ==========================================================================
Vkadaba 8:2f2775c34640 1841 *! \struct ADMW_CORE_Digital_Sensor_Command5_Struct
Vkadaba 5:0728bde67bdb 1842 *! \brief Sensor Configuration Command5 Register bit field structure
Vkadaba 5:0728bde67bdb 1843 * ========================================================================== */
Vkadaba 8:2f2775c34640 1844 typedef struct _ADMW_CORE_Digital_Sensor_Command5_t {
Vkadaba 5:0728bde67bdb 1845 union {
Vkadaba 5:0728bde67bdb 1846 struct {
Vkadaba 5:0728bde67bdb 1847 uint8_t Digital_Sensor_Command5 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1848 };
Vkadaba 5:0728bde67bdb 1849 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1850 };
Vkadaba 8:2f2775c34640 1851 } ADMW_CORE_Digital_Sensor_Command5_t;
Vkadaba 5:0728bde67bdb 1852
Vkadaba 5:0728bde67bdb 1853 /*@}*/
Vkadaba 5:0728bde67bdb 1854
Vkadaba 5:0728bde67bdb 1855 /** @defgroup Digital_Sensor_Command6 Sensor Configuration Command6 (Digital_Sensor_Command6) Register
Vkadaba 5:0728bde67bdb 1856 * Sensor Configuration Command6 (Digital_Sensor_Command6) Register.
Vkadaba 5:0728bde67bdb 1857 * @{
Vkadaba 5:0728bde67bdb 1858 */
Vkadaba 5:0728bde67bdb 1859
Vkadaba 5:0728bde67bdb 1860 /* ==========================================================================
Vkadaba 8:2f2775c34640 1861 *! \struct ADMW_CORE_Digital_Sensor_Command6_Struct
Vkadaba 5:0728bde67bdb 1862 *! \brief Sensor Configuration Command6 Register bit field structure
Vkadaba 5:0728bde67bdb 1863 * ========================================================================== */
Vkadaba 8:2f2775c34640 1864 typedef struct _ADMW_CORE_Digital_Sensor_Command6_t {
Vkadaba 5:0728bde67bdb 1865 union {
Vkadaba 5:0728bde67bdb 1866 struct {
Vkadaba 5:0728bde67bdb 1867 uint8_t Digital_Sensor_Command6 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1868 };
Vkadaba 5:0728bde67bdb 1869 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1870 };
Vkadaba 8:2f2775c34640 1871 } ADMW_CORE_Digital_Sensor_Command6_t;
Vkadaba 5:0728bde67bdb 1872
Vkadaba 5:0728bde67bdb 1873 /*@}*/
Vkadaba 5:0728bde67bdb 1874
Vkadaba 5:0728bde67bdb 1875 /** @defgroup Digital_Sensor_Command7 Sensor Configuration Command7 (Digital_Sensor_Command7) Register
Vkadaba 5:0728bde67bdb 1876 * Sensor Configuration Command7 (Digital_Sensor_Command7) Register.
Vkadaba 5:0728bde67bdb 1877 * @{
Vkadaba 5:0728bde67bdb 1878 */
Vkadaba 5:0728bde67bdb 1879
Vkadaba 5:0728bde67bdb 1880 /* ==========================================================================
Vkadaba 8:2f2775c34640 1881 *! \struct ADMW_CORE_Digital_Sensor_Command7_Struct
Vkadaba 5:0728bde67bdb 1882 *! \brief Sensor Configuration Command7 Register bit field structure
Vkadaba 5:0728bde67bdb 1883 * ========================================================================== */
Vkadaba 8:2f2775c34640 1884 typedef struct _ADMW_CORE_Digital_Sensor_Command7_t {
Vkadaba 5:0728bde67bdb 1885 union {
Vkadaba 5:0728bde67bdb 1886 struct {
Vkadaba 5:0728bde67bdb 1887 uint8_t Digital_Sensor_Command7 : 8; /**< Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1888 };
Vkadaba 5:0728bde67bdb 1889 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1890 };
Vkadaba 8:2f2775c34640 1891 } ADMW_CORE_Digital_Sensor_Command7_t;
Vkadaba 5:0728bde67bdb 1892
Vkadaba 5:0728bde67bdb 1893 /*@}*/
Vkadaba 5:0728bde67bdb 1894
Vkadaba 5:0728bde67bdb 1895 /** @defgroup Digital_Sensor_Read_Cmd1 Sensor Read Command1 (Digital_Sensor_Read_Cmd1) Register
Vkadaba 5:0728bde67bdb 1896 * Sensor Read Command1 (Digital_Sensor_Read_Cmd1) Register.
Vkadaba 5:0728bde67bdb 1897 * @{
Vkadaba 5:0728bde67bdb 1898 */
Vkadaba 5:0728bde67bdb 1899
Vkadaba 5:0728bde67bdb 1900 /* ==========================================================================
Vkadaba 8:2f2775c34640 1901 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd1_Struct
Vkadaba 5:0728bde67bdb 1902 *! \brief Sensor Read Command1 Register bit field structure
Vkadaba 5:0728bde67bdb 1903 * ========================================================================== */
Vkadaba 8:2f2775c34640 1904 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd1_t {
Vkadaba 5:0728bde67bdb 1905 union {
Vkadaba 5:0728bde67bdb 1906 struct {
Vkadaba 5:0728bde67bdb 1907 uint8_t Digital_Sensor_Read_Cmd1 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1908 };
Vkadaba 5:0728bde67bdb 1909 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1910 };
Vkadaba 8:2f2775c34640 1911 } ADMW_CORE_Digital_Sensor_Read_Cmd1_t;
Vkadaba 5:0728bde67bdb 1912
Vkadaba 5:0728bde67bdb 1913 /*@}*/
Vkadaba 5:0728bde67bdb 1914
Vkadaba 5:0728bde67bdb 1915 /** @defgroup Digital_Sensor_Read_Cmd2 Sensor Read Command2 (Digital_Sensor_Read_Cmd2) Register
Vkadaba 5:0728bde67bdb 1916 * Sensor Read Command2 (Digital_Sensor_Read_Cmd2) Register.
Vkadaba 5:0728bde67bdb 1917 * @{
Vkadaba 5:0728bde67bdb 1918 */
Vkadaba 5:0728bde67bdb 1919
Vkadaba 5:0728bde67bdb 1920 /* ==========================================================================
Vkadaba 8:2f2775c34640 1921 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd2_Struct
Vkadaba 5:0728bde67bdb 1922 *! \brief Sensor Read Command2 Register bit field structure
Vkadaba 5:0728bde67bdb 1923 * ========================================================================== */
Vkadaba 8:2f2775c34640 1924 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd2_t {
Vkadaba 5:0728bde67bdb 1925 union {
Vkadaba 5:0728bde67bdb 1926 struct {
Vkadaba 5:0728bde67bdb 1927 uint8_t Digital_Sensor_Read_Cmd2 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1928 };
Vkadaba 5:0728bde67bdb 1929 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1930 };
Vkadaba 8:2f2775c34640 1931 } ADMW_CORE_Digital_Sensor_Read_Cmd2_t;
Vkadaba 5:0728bde67bdb 1932
Vkadaba 5:0728bde67bdb 1933 /*@}*/
Vkadaba 5:0728bde67bdb 1934
Vkadaba 5:0728bde67bdb 1935 /** @defgroup Digital_Sensor_Read_Cmd3 Sensor Read Command3 (Digital_Sensor_Read_Cmd3) Register
Vkadaba 5:0728bde67bdb 1936 * Sensor Read Command3 (Digital_Sensor_Read_Cmd3) Register.
Vkadaba 5:0728bde67bdb 1937 * @{
Vkadaba 5:0728bde67bdb 1938 */
Vkadaba 5:0728bde67bdb 1939
Vkadaba 5:0728bde67bdb 1940 /* ==========================================================================
Vkadaba 8:2f2775c34640 1941 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd3_Struct
Vkadaba 5:0728bde67bdb 1942 *! \brief Sensor Read Command3 Register bit field structure
Vkadaba 5:0728bde67bdb 1943 * ========================================================================== */
Vkadaba 8:2f2775c34640 1944 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd3_t {
Vkadaba 5:0728bde67bdb 1945 union {
Vkadaba 5:0728bde67bdb 1946 struct {
Vkadaba 5:0728bde67bdb 1947 uint8_t Digital_Sensor_Read_Cmd3 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1948 };
Vkadaba 5:0728bde67bdb 1949 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1950 };
Vkadaba 8:2f2775c34640 1951 } ADMW_CORE_Digital_Sensor_Read_Cmd3_t;
Vkadaba 5:0728bde67bdb 1952
Vkadaba 5:0728bde67bdb 1953 /*@}*/
Vkadaba 5:0728bde67bdb 1954
Vkadaba 5:0728bde67bdb 1955 /** @defgroup Digital_Sensor_Read_Cmd4 Sensor Read Command4 (Digital_Sensor_Read_Cmd4) Register
Vkadaba 5:0728bde67bdb 1956 * Sensor Read Command4 (Digital_Sensor_Read_Cmd4) Register.
Vkadaba 5:0728bde67bdb 1957 * @{
Vkadaba 5:0728bde67bdb 1958 */
Vkadaba 5:0728bde67bdb 1959
Vkadaba 5:0728bde67bdb 1960 /* ==========================================================================
Vkadaba 8:2f2775c34640 1961 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd4_Struct
Vkadaba 5:0728bde67bdb 1962 *! \brief Sensor Read Command4 Register bit field structure
Vkadaba 5:0728bde67bdb 1963 * ========================================================================== */
Vkadaba 8:2f2775c34640 1964 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd4_t {
Vkadaba 5:0728bde67bdb 1965 union {
Vkadaba 5:0728bde67bdb 1966 struct {
Vkadaba 5:0728bde67bdb 1967 uint8_t Digital_Sensor_Read_Cmd4 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1968 };
Vkadaba 5:0728bde67bdb 1969 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1970 };
Vkadaba 8:2f2775c34640 1971 } ADMW_CORE_Digital_Sensor_Read_Cmd4_t;
Vkadaba 5:0728bde67bdb 1972
Vkadaba 5:0728bde67bdb 1973 /*@}*/
Vkadaba 5:0728bde67bdb 1974
Vkadaba 5:0728bde67bdb 1975 /** @defgroup Digital_Sensor_Read_Cmd5 Sensor Read Command5 (Digital_Sensor_Read_Cmd5) Register
Vkadaba 5:0728bde67bdb 1976 * Sensor Read Command5 (Digital_Sensor_Read_Cmd5) Register.
Vkadaba 5:0728bde67bdb 1977 * @{
Vkadaba 5:0728bde67bdb 1978 */
Vkadaba 5:0728bde67bdb 1979
Vkadaba 5:0728bde67bdb 1980 /* ==========================================================================
Vkadaba 8:2f2775c34640 1981 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd5_Struct
Vkadaba 5:0728bde67bdb 1982 *! \brief Sensor Read Command5 Register bit field structure
Vkadaba 5:0728bde67bdb 1983 * ========================================================================== */
Vkadaba 8:2f2775c34640 1984 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd5_t {
Vkadaba 5:0728bde67bdb 1985 union {
Vkadaba 5:0728bde67bdb 1986 struct {
Vkadaba 5:0728bde67bdb 1987 uint8_t Digital_Sensor_Read_Cmd5 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 1988 };
Vkadaba 5:0728bde67bdb 1989 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1990 };
Vkadaba 8:2f2775c34640 1991 } ADMW_CORE_Digital_Sensor_Read_Cmd5_t;
Vkadaba 5:0728bde67bdb 1992
Vkadaba 5:0728bde67bdb 1993 /*@}*/
Vkadaba 5:0728bde67bdb 1994
Vkadaba 5:0728bde67bdb 1995 /** @defgroup Digital_Sensor_Read_Cmd6 Sensor Read Command6 (Digital_Sensor_Read_Cmd6) Register
Vkadaba 5:0728bde67bdb 1996 * Sensor Read Command6 (Digital_Sensor_Read_Cmd6) Register.
Vkadaba 5:0728bde67bdb 1997 * @{
Vkadaba 5:0728bde67bdb 1998 */
Vkadaba 5:0728bde67bdb 1999
Vkadaba 5:0728bde67bdb 2000 /* ==========================================================================
Vkadaba 8:2f2775c34640 2001 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd6_Struct
Vkadaba 5:0728bde67bdb 2002 *! \brief Sensor Read Command6 Register bit field structure
Vkadaba 5:0728bde67bdb 2003 * ========================================================================== */
Vkadaba 8:2f2775c34640 2004 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd6_t {
Vkadaba 5:0728bde67bdb 2005 union {
Vkadaba 5:0728bde67bdb 2006 struct {
Vkadaba 5:0728bde67bdb 2007 uint8_t Digital_Sensor_Read_Cmd6 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2008 };
Vkadaba 5:0728bde67bdb 2009 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 2010 };
Vkadaba 8:2f2775c34640 2011 } ADMW_CORE_Digital_Sensor_Read_Cmd6_t;
Vkadaba 5:0728bde67bdb 2012
Vkadaba 5:0728bde67bdb 2013 /*@}*/
Vkadaba 5:0728bde67bdb 2014
Vkadaba 5:0728bde67bdb 2015 /** @defgroup Digital_Sensor_Read_Cmd7 Sensor Read Command7 (Digital_Sensor_Read_Cmd7) Register
Vkadaba 5:0728bde67bdb 2016 * Sensor Read Command7 (Digital_Sensor_Read_Cmd7) Register.
Vkadaba 5:0728bde67bdb 2017 * @{
Vkadaba 5:0728bde67bdb 2018 */
Vkadaba 5:0728bde67bdb 2019
Vkadaba 5:0728bde67bdb 2020 /* ==========================================================================
Vkadaba 8:2f2775c34640 2021 *! \struct ADMW_CORE_Digital_Sensor_Read_Cmd7_Struct
Vkadaba 5:0728bde67bdb 2022 *! \brief Sensor Read Command7 Register bit field structure
Vkadaba 5:0728bde67bdb 2023 * ========================================================================== */
Vkadaba 8:2f2775c34640 2024 typedef struct _ADMW_CORE_Digital_Sensor_Read_Cmd7_t {
Vkadaba 5:0728bde67bdb 2025 union {
Vkadaba 5:0728bde67bdb 2026 struct {
Vkadaba 5:0728bde67bdb 2027 uint8_t Digital_Sensor_Read_Cmd7 : 8; /**< Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2028 };
Vkadaba 5:0728bde67bdb 2029 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 2030 };
Vkadaba 8:2f2775c34640 2031 } ADMW_CORE_Digital_Sensor_Read_Cmd7_t;
Vkadaba 5:0728bde67bdb 2032
Vkadaba 5:0728bde67bdb 2033 /*@}*/
Vkadaba 5:0728bde67bdb 2034
Vkadaba 5:0728bde67bdb 2035
Vkadaba 5:0728bde67bdb 2036 #if defined (__CC_ARM)
Vkadaba 5:0728bde67bdb 2037 #pragma pop
Vkadaba 5:0728bde67bdb 2038 #endif
Vkadaba 5:0728bde67bdb 2039
Vkadaba 5:0728bde67bdb 2040 #endif