Diff: inc/admw1001/ADMW1001_REGISTERS.h

Revision:

50:d84305e5e1c0

Parent:

44:94bdfaefddac

Child:

59:3d395512b442

--- a/inc/admw1001/ADMW1001_REGISTERS.h	Thu Feb 06 11:04:31 2020 +0000
+++ b/inc/admw1001/ADMW1001_REGISTERS.h	Mon Feb 17 11:23:39 2020 +0000
@@ -279,7 +279,7 @@
 #define REG_CORE_LUT_DATA_RESET              0x00000000            /*      Reset Value for LUT_Data  */
 #define REG_CORE_LUT_DATA                    0x00000074            /*  CORE Data to Read/Write from Addressed LUT Entry */
 #define REG_CORE_REVISION_RESET              0x01000000            /*      Reset Value for Revision  */
-#define REG_CORE_REVISION                    0x0000008C            /*  CORE Hardware, Firmware Revision */
+#define REG_CORE_REVISION                    0x0000008A            /*  CORE Hardware, Firmware Revision */
 #define REG_CORE_CHANNEL_COUNTn_RESET        0x00000000            /*      Reset Value for Channel_Count[n]  */
 #define REG_CORE_CHANNEL_COUNT0_RESET        0x00000000            /*      Reset Value for REG_CORE_CHANNEL_COUNT0  */
 #define REG_CORE_CHANNEL_COUNT1_RESET        0x00000000            /*      Reset Value for REG_CORE_CHANNEL_COUNT1  */