Victor Mirkhan / TextLCD

a

Fork of TextLCD by Wim Huiskamp

TextLCD.cpp@42:07cca6ffd9a5, 2017-05-09 (annotated)

Committer:
Victor_Mirkhan
Date:
Tue May 09 13:16:53 2017 +0000
Revision:
42:07cca6ffd9a5
Parent:
37:ce348c002929
Child:
38:cbe275b0b647
a

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
simon 1:ac48b187213c 21 *
simon 1:ac48b187213c 22 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 23 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 24 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 25 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 26 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 27 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 28 *
simon 1:ac48b187213c 29 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 30 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 31 *
simon 1:ac48b187213c 32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 34 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 35 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 36 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 37 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 38 * THE SOFTWARE.
simon 1:ac48b187213c 39 */
wim 34:e5a0dcb43ecc 40 #include "mbed.h"
simon 1:ac48b187213c 41 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 42 #include "TextLCD_UDC.inc"
wim 34:e5a0dcb43ecc 43
wim 21:9eb628d9e164 44 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 45 *
wim 21:9eb628d9e164 46 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 47 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 48 */
wim 21:9eb628d9e164 49 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 50
wim 30:033048611c01 51 // Extract LCDType data
wim 30:033048611c01 52
wim 30:033048611c01 53 // Columns encoded in b7..b0
wim 30:033048611c01 54 _nr_cols = (_type & 0xFF);
wim 30:033048611c01 55
wim 30:033048611c01 56 // Rows encoded in b15..b8
wim 30:033048611c01 57 _nr_rows = ((_type >> 8) & 0xFF);
wim 30:033048611c01 58
wim 30:033048611c01 59 // Addressing mode encoded in b19..b16
wim 30:033048611c01 60 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 61
wim 37:ce348c002929 62 // Font table, encoded in LCDCtrl
wim 37:ce348c002929 63 _font = _type & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 64 }
wim 14:0c32b66b14b8 65
wim 21:9eb628d9e164 66 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 67 * Clear display
wim 36:9f5f86dfd44a 68 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 69 * @return none
wim 21:9eb628d9e164 70 */
wim 36:9f5f86dfd44a 71 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 15:b70ebfffb258 72
wim 15:b70ebfffb258 73 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 74 if(_type==LCD40x4) {
wim 30:033048611c01 75 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 76 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 77 }
wim 15:b70ebfffb258 78
wim 15:b70ebfffb258 79 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 80 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 81 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 82
wim 32:59c4b8f648d4 83 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 84 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 85 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 86 cls();
wim 15:b70ebfffb258 87 }
wim 15:b70ebfffb258 88
wim 21:9eb628d9e164 89 /** Init the LCD controller
wim 36:9f5f86dfd44a 90 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 91 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 92 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 93 *
wim 36:9f5f86dfd44a 94 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes.
wim 36:9f5f86dfd44a 95 * @return none
wim 30:033048611c01 96 *
wim 30:033048611c01 97 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 98 */
wim 36:9f5f86dfd44a 99 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 100 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 101 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 102
wim 26:bd897a001012 103 this->_setRS(false); // command mode
wim 13:24506ba22480 104
wim 26:bd897a001012 105 wait_ms(20); // Wait 20ms to ensure powered up
simon 1:ac48b187213c 106
wim 37:ce348c002929 107 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 108 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 109 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 110 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 111 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 112 //
wim 37:ce348c002929 113 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 114 //-------------------------------------------------------------------------------------------------
wim 37:ce348c002929 115 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 37:ce348c002929 116 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 117 wait_ms(15); //
wim 37:ce348c002929 118
wim 37:ce348c002929 119 _writeNibble(0x3); // set 8 bit mode and dummy LSN, | set 8 bit mode and dummy LSN, | set 8bit mode (MSN),
wim 37:ce348c002929 120 // remains in 8 bit mode | remains in 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 121 wait_ms(15); //
wim 33:900a94bc7585 122
wim 37:ce348c002929 123 _writeNibble(0x3); // set 8 bit mode and dummy LSN, | set 8 bit mode and dummy LSN, | set dummy LSN,
wim 37:ce348c002929 124 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 125 wait_ms(15); //
wim 37:ce348c002929 126
wim 37:ce348c002929 127 // Controller is now in 8 bit mode
wim 37:ce348c002929 128
wim 37:ce348c002929 129 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 130 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 131
wim 37:ce348c002929 132 // Controller is now in 4-bit mode
wim 37:ce348c002929 133 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 134 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 37:ce348c002929 135 }
wim 25:6162b31128c9 136
wim 29:a3663151aa65 137 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 138 switch (_ctrl) {
wim 32:59c4b8f648d4 139
wim 36:9f5f86dfd44a 140 case KS0073:
wim 36:9f5f86dfd44a 141 // Initialise Display configuration
wim 36:9f5f86dfd44a 142 switch (_type) {
wim 36:9f5f86dfd44a 143 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 144 case LCD12x1:
wim 36:9f5f86dfd44a 145 case LCD16x1:
wim 36:9f5f86dfd44a 146 case LCD20x1:
wim 36:9f5f86dfd44a 147 case LCD24x1:
wim 36:9f5f86dfd44a 148 // case LCD32x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 149 // case LCD40x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 150 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 151 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 152 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 153 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 154 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 155 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 156
wim 36:9f5f86dfd44a 157 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 158 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 159 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 160 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 161 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 162 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 163
wim 36:9f5f86dfd44a 164 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 165 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 166 break;
wim 36:9f5f86dfd44a 167
wim 36:9f5f86dfd44a 168 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 169 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 170 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 171 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 172 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 173 case LCD20x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 174 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 175 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 176 // N=0 (dont care for 4 line mode)
wim 36:9f5f86dfd44a 177 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 178 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 179 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 180
wim 36:9f5f86dfd44a 181 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 182 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 183 // N=0 (1-line mode), N=1 (2-line mode)
wim 36:9f5f86dfd44a 184 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 185 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 186 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 187
wim 36:9f5f86dfd44a 188 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 189 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 190 break;
wim 36:9f5f86dfd44a 191
wim 36:9f5f86dfd44a 192
wim 36:9f5f86dfd44a 193 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 194 // case LCD24x3D: // Special mode for KS0078
wim 36:9f5f86dfd44a 195 // case LCD24x3D1: // Special mode for KS0078
wim 36:9f5f86dfd44a 196 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 197 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 198 break;
wim 36:9f5f86dfd44a 199
wim 36:9f5f86dfd44a 200 default:
wim 36:9f5f86dfd44a 201 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 202 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 203 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 204 // N=1 (2-line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 205 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 206 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 207 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 208
wim 36:9f5f86dfd44a 209 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 210 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 211 // N=1 (2 line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 212 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 213 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 214 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 215
wim 36:9f5f86dfd44a 216 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 217 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 218 break;
wim 36:9f5f86dfd44a 219 } // switch type
wim 36:9f5f86dfd44a 220
wim 36:9f5f86dfd44a 221 // init special features
wim 36:9f5f86dfd44a 222 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 223 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 224 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 225 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 226 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 227 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 228
wim 36:9f5f86dfd44a 229 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 230 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 231 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 232 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 233
wim 36:9f5f86dfd44a 234 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 235 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 236
wim 36:9f5f86dfd44a 237 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 238 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 239
wim 36:9f5f86dfd44a 240 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 241 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 242 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 243 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 244 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 245 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 246 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 247
wim 36:9f5f86dfd44a 248
wim 29:a3663151aa65 249 case KS0078:
wim 29:a3663151aa65 250 // Initialise Display configuration
wim 29:a3663151aa65 251 switch (_type) {
wim 29:a3663151aa65 252 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 253 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 254 // case LCD12x1:
wim 29:a3663151aa65 255 case LCD16x1:
wim 30:033048611c01 256 // case LCD20x1:
wim 29:a3663151aa65 257 case LCD24x1:
wim 32:59c4b8f648d4 258 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 259 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 260 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 261 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 262 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 263 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 264
wim 33:900a94bc7585 265 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 266 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 267 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 268 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 269 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 270 // 0
wim 30:033048611c01 271
wim 32:59c4b8f648d4 272 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 273 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 274 break;
wim 29:a3663151aa65 275
wim 36:9f5f86dfd44a 276 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 277 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 278 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 279 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 280 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 281 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 282 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 283 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 284 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 285 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 286 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 287 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 288 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 289 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 290 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 291
wim 33:900a94bc7585 292 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 293 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 294 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 295 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 296 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 297 // 0
wim 29:a3663151aa65 298
wim 32:59c4b8f648d4 299 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 300 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 301 break;
wim 33:900a94bc7585 302
wim 33:900a94bc7585 303 case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 304 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 305 break;
wim 30:033048611c01 306
wim 29:a3663151aa65 307 default:
wim 30:033048611c01 308 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 309 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 310 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 311 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 312 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 313 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 314 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 315
wim 33:900a94bc7585 316 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 317 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 318 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 319 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 320 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 321 // 0
wim 30:033048611c01 322
wim 32:59c4b8f648d4 323 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 324 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 325 break;
wim 29:a3663151aa65 326 } // switch type
wim 29:a3663151aa65 327
wim 32:59c4b8f648d4 328 // init special features
wim 32:59c4b8f648d4 329 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 330 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 331 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 332 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 333 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 334 // 0
wim 32:59c4b8f648d4 335
wim 32:59c4b8f648d4 336 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 337 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 338 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 339 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 340
wim 32:59c4b8f648d4 341 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 342 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 343
wim 32:59c4b8f648d4 344 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 345 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 346
wim 32:59c4b8f648d4 347 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 348 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 349 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 350 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 351 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 352 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 353 break; // case KS0078 Controller
wim 29:a3663151aa65 354
wim 26:bd897a001012 355 case ST7032_3V3:
wim 26:bd897a001012 356 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 26:bd897a001012 357 case ST7032_5V:
wim 32:59c4b8f648d4 358 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 29:a3663151aa65 359
wim 29:a3663151aa65 360 // Initialise Display configuration
wim 29:a3663151aa65 361 switch (_type) {
wim 29:a3663151aa65 362 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 363 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 364 // case LCD12x1:
wim 29:a3663151aa65 365 case LCD16x1:
wim 30:033048611c01 366 // case LCD20x1:
wim 32:59c4b8f648d4 367 case LCD24x1:
wim 32:59c4b8f648d4 368 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 369 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 370 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 371 break;
wim 28:30fa94f7341c 372
wim 32:59c4b8f648d4 373 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 374 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 375 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 376 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 377 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 378 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 379 break;
wim 29:a3663151aa65 380
wim 32:59c4b8f648d4 381 default:
wim 32:59c4b8f648d4 382 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 383 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 384 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 385 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 386 break;
wim 32:59c4b8f648d4 387 } // switch type
wim 32:59c4b8f648d4 388
wim 32:59c4b8f648d4 389 // init special features
wim 33:900a94bc7585 390 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 391
wim 33:900a94bc7585 392 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 32:59c4b8f648d4 393
wim 32:59c4b8f648d4 394 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 395 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 396
wim 32:59c4b8f648d4 397
wim 32:59c4b8f648d4 398 if (_ctrl == ST7032_3V3) {
wim 36:9f5f86dfd44a 399 // _icon_power = 0x04; // Icon display off, Booster circuit is turned on (IS=1)
wim 36:9f5f86dfd44a 400 _icon_power = 0x0C; // Icon display on, Booster circuit is turned on (IS=1)
wim 32:59c4b8f648d4 401 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 402 }
wim 32:59c4b8f648d4 403 else {
wim 36:9f5f86dfd44a 404 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 405 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 406 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 407 }
wim 32:59c4b8f648d4 408 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 409 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 410
wim 32:59c4b8f648d4 411 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 412 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 413
wim 32:59c4b8f648d4 414 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 415
wim 32:59c4b8f648d4 416 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 417 // case ST7032_5V Controller
wim 32:59c4b8f648d4 418
wim 32:59c4b8f648d4 419 case ST7036_3V3:
wim 32:59c4b8f648d4 420 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 421 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 422 case ST7036_5V:
wim 32:59c4b8f648d4 423 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 424 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 425
wim 32:59c4b8f648d4 426 // Initialise Display configuration
wim 32:59c4b8f648d4 427 switch (_type) {
wim 32:59c4b8f648d4 428 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 429 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 430 // case LCD12x1:
wim 32:59c4b8f648d4 431 case LCD16x1:
wim 32:59c4b8f648d4 432 case LCD24x1:
wim 32:59c4b8f648d4 433 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 434 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 435 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 436
wim 32:59c4b8f648d4 437 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 438 break;
wim 32:59c4b8f648d4 439
wim 32:59c4b8f648d4 440 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 441 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 442 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 443 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 444 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 445
wim 32:59c4b8f648d4 446 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 447 break;
wim 32:59c4b8f648d4 448
wim 32:59c4b8f648d4 449 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 450 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 451 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 452 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 453 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 454 break;
wim 28:30fa94f7341c 455
wim 29:a3663151aa65 456 default:
wim 32:59c4b8f648d4 457 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 458 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 459 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 460 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 461
wim 32:59c4b8f648d4 462 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 463 break;
wim 32:59c4b8f648d4 464 } // switch type
wim 32:59c4b8f648d4 465
wim 29:a3663151aa65 466
wim 32:59c4b8f648d4 467 // init special features
wim 33:900a94bc7585 468 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 469 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 470
wim 32:59c4b8f648d4 471 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 472 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 473
wim 32:59c4b8f648d4 474 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 475 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 476 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 477 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 478 }
wim 32:59c4b8f648d4 479 else {
wim 36:9f5f86dfd44a 480 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 481 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 482 }
wim 29:a3663151aa65 483
wim 32:59c4b8f648d4 484 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 485 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 486
wim 32:59c4b8f648d4 487 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 488 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 489
wim 32:59c4b8f648d4 490 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 491
wim 32:59c4b8f648d4 492 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 493 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 494
wim 36:9f5f86dfd44a 495 case ST7070:
wim 36:9f5f86dfd44a 496 // Initialise Display configuration
wim 36:9f5f86dfd44a 497 switch (_type) {
wim 36:9f5f86dfd44a 498 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 499 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 500 // case LCD12x1:
wim 36:9f5f86dfd44a 501 case LCD16x1:
wim 36:9f5f86dfd44a 502 case LCD24x1:
wim 36:9f5f86dfd44a 503 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 504 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 505 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 506 break;
wim 36:9f5f86dfd44a 507
wim 36:9f5f86dfd44a 508 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 509 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 510 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 511 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 512 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 513 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 514 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 515 break;
wim 36:9f5f86dfd44a 516
wim 36:9f5f86dfd44a 517 default:
wim 36:9f5f86dfd44a 518 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 519 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 520 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 521 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 522 break;
wim 36:9f5f86dfd44a 523 } // switch type
wim 36:9f5f86dfd44a 524
wim 36:9f5f86dfd44a 525 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 526
wim 36:9f5f86dfd44a 527 // init special features
wim 36:9f5f86dfd44a 528 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 529
wim 36:9f5f86dfd44a 530 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 531
wim 36:9f5f86dfd44a 532 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 533 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 534 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 535
wim 36:9f5f86dfd44a 536 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 537
wim 36:9f5f86dfd44a 538 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 539
wim 32:59c4b8f648d4 540 case SSD1803_3V3:
wim 32:59c4b8f648d4 541 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 542 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 543 // case SSD1803_5V:
wim 32:59c4b8f648d4 544 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 545
wim 29:a3663151aa65 546 // Initialise Display configuration
wim 29:a3663151aa65 547 switch (_type) {
wim 29:a3663151aa65 548 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 549 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 550 // case LCD12x1:
wim 29:a3663151aa65 551 case LCD16x1:
wim 29:a3663151aa65 552 case LCD24x1:
wim 32:59c4b8f648d4 553 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 554 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 555 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 556 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 557 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 558 // DH=0 Double Height disable
wim 32:59c4b8f648d4 559 // IS=0
wim 32:59c4b8f648d4 560
wim 33:900a94bc7585 561 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 562 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 563 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 564 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 565 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 566 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 567 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 568
wim 32:59c4b8f648d4 569 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 570 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 571 break;
wim 32:59c4b8f648d4 572
wim 33:900a94bc7585 573 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 574 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 575 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 576 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 577 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 578 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 579 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 580 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 581 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 582 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 583 // DH=0 Double Height disable
wim 32:59c4b8f648d4 584 // IS=0
wim 32:59c4b8f648d4 585
wim 33:900a94bc7585 586 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 587 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 588 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 589 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 590 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 591 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 592 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 593
wim 32:59c4b8f648d4 594 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 595 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 596 break;
wim 30:033048611c01 597
wim 32:59c4b8f648d4 598 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 599 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 600 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 601 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 602 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 603 // N=1 4 Line
wim 32:59c4b8f648d4 604 // DH=0 Double Height disable
wim 32:59c4b8f648d4 605 // IS=0
wim 32:59c4b8f648d4 606
wim 33:900a94bc7585 607 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 608 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 609 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 610 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 611 // N=1 4 Line
wim 32:59c4b8f648d4 612 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 613 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 614
wim 32:59c4b8f648d4 615 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 616 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 617 break;
wim 32:59c4b8f648d4 618
wim 33:900a94bc7585 619 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 620 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 621 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 622 break;
wim 30:033048611c01 623
wim 29:a3663151aa65 624 default:
wim 30:033048611c01 625 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 626 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 627 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 628 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 629 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 630 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 631 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 632 // RE=0
wim 32:59c4b8f648d4 633 // IS=0
wim 29:a3663151aa65 634
wim 33:900a94bc7585 635 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 636 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 637 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 638 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 639 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 640 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 641 // RE=1
wim 32:59c4b8f648d4 642 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 643
wim 32:59c4b8f648d4 644 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 645 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 646 break;
wim 32:59c4b8f648d4 647 } // switch type
wim 32:59c4b8f648d4 648
wim 32:59c4b8f648d4 649
wim 32:59c4b8f648d4 650 // init special features
wim 33:900a94bc7585 651 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 652 // Select Extended Instruction Set
wim 33:900a94bc7585 653
wim 33:900a94bc7585 654 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 655 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 656 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 657
wim 33:900a94bc7585 658 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 659
wim 32:59c4b8f648d4 660 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 661
wim 32:59c4b8f648d4 662 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 663 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 664
wim 32:59c4b8f648d4 665 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 666 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 667
wim 32:59c4b8f648d4 668 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 669 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 670
wim 36:9f5f86dfd44a 671 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 672 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 673 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 674 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 675 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 676
wim 32:59c4b8f648d4 677 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 678 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 679
wim 33:900a94bc7585 680 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 681 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 682 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 683
wim 32:59c4b8f648d4 684
wim 32:59c4b8f648d4 685 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 686 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 687
wim 32:59c4b8f648d4 688 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 689
wim 29:a3663151aa65 690
wim 32:59c4b8f648d4 691 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 692 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 693 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 694 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 695 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 696 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 697 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 698 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 699 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 700 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 701 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 702 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 703
wim 34:e5a0dcb43ecc 704 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 705 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 706 // Initialise Display configuration
wim 34:e5a0dcb43ecc 707 switch (_type) {
wim 34:e5a0dcb43ecc 708 case LCD24x1:
wim 34:e5a0dcb43ecc 709 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 710 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 711 break;
wim 34:e5a0dcb43ecc 712
wim 34:e5a0dcb43ecc 713 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 714 case LCD12x2:
wim 34:e5a0dcb43ecc 715 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 716 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 717 break;
wim 34:e5a0dcb43ecc 718
wim 34:e5a0dcb43ecc 719 default:
wim 34:e5a0dcb43ecc 720 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 721 break;
wim 34:e5a0dcb43ecc 722
wim 34:e5a0dcb43ecc 723 } // switch type
wim 34:e5a0dcb43ecc 724
wim 34:e5a0dcb43ecc 725 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 726 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 727
wim 34:e5a0dcb43ecc 728 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 729 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 730
wim 34:e5a0dcb43ecc 731 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 732 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 733
wim 34:e5a0dcb43ecc 734 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 735
wim 36:9f5f86dfd44a 736 #if(0)
wim 34:e5a0dcb43ecc 737 // Select CG RAM
wim 34:e5a0dcb43ecc 738 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 739 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 740 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 741 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 742 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 743 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 744 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 745 }
wim 36:9f5f86dfd44a 746 #endif
wim 34:e5a0dcb43ecc 747 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 748
wim 30:033048611c01 749 case PCF2113_3V3:
wim 32:59c4b8f648d4 750 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 751 // Initialise Display configuration
wim 29:a3663151aa65 752 switch (_type) {
wim 29:a3663151aa65 753 // case LCD12x1:
wim 33:900a94bc7585 754 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 755 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 756 case LCD24x1:
wim 33:900a94bc7585 757 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 758 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 759 break;
wim 30:033048611c01 760
wim 30:033048611c01 761 case LCD12x2:
wim 33:900a94bc7585 762 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 763 break;
wim 30:033048611c01 764
wim 30:033048611c01 765 default:
wim 30:033048611c01 766 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 767 break;
wim 30:033048611c01 768
wim 30:033048611c01 769 } // switch type
wim 30:033048611c01 770
wim 32:59c4b8f648d4 771 // Init special features
wim 33:900a94bc7585 772 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 773
wim 33:900a94bc7585 774 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 775 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 776 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 777 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 778
wim 32:59c4b8f648d4 779 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 780 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 781 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 782 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 783
wim 33:900a94bc7585 784 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 785 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 786
wim 33:900a94bc7585 787 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 788
wim 30:033048611c01 789 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 790
wim 30:033048611c01 791
wim 32:59c4b8f648d4 792 // case PCF2113_5V:
wim 32:59c4b8f648d4 793 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 794 //@TODO
wim 32:59c4b8f648d4 795
wim 30:033048611c01 796
wim 30:033048611c01 797 case PCF2116_3V3:
wim 32:59c4b8f648d4 798 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 799 // Initialise Display configuration
wim 30:033048611c01 800 switch (_type) {
wim 30:033048611c01 801 // case LCD12x1:
wim 30:033048611c01 802 // case LCD12x2:
wim 30:033048611c01 803 case LCD24x1:
wim 34:e5a0dcb43ecc 804 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 805 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 806 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 807 break;
wim 29:a3663151aa65 808
wim 32:59c4b8f648d4 809 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 810 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 811 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 812 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 813 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 814 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 815 break;
wim 30:033048611c01 816
wim 30:033048611c01 817 case LCD24x2:
wim 34:e5a0dcb43ecc 818 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 819 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 820 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 821 break;
wim 32:59c4b8f648d4 822
wim 30:033048611c01 823 default:
wim 30:033048611c01 824 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 825 break;
wim 30:033048611c01 826
wim 29:a3663151aa65 827 } // switch type
wim 29:a3663151aa65 828
wim 30:033048611c01 829 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 830
wim 32:59c4b8f648d4 831
wim 32:59c4b8f648d4 832 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 833 //@TODO
wim 32:59c4b8f648d4 834 case PCF2116_5V:
wim 32:59c4b8f648d4 835 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 836 // Initialise Display configuration
wim 32:59c4b8f648d4 837 switch (_type) {
wim 32:59c4b8f648d4 838 // case LCD12x1:
wim 32:59c4b8f648d4 839 // case LCD12x2:
wim 32:59c4b8f648d4 840 // case LCD24x1:
wim 34:e5a0dcb43ecc 841 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 842 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 843 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 844 // break;
wim 32:59c4b8f648d4 845
wim 32:59c4b8f648d4 846 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 847 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 848 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 849 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 850 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 851 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 852 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 853 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 854 break;
wim 32:59c4b8f648d4 855
wim 32:59c4b8f648d4 856 // case LCD24x2:
wim 32:59c4b8f648d4 857 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 858 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 859 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 860 // break;
wim 32:59c4b8f648d4 861
wim 32:59c4b8f648d4 862 default:
wim 32:59c4b8f648d4 863 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 864 break;
wim 32:59c4b8f648d4 865
wim 32:59c4b8f648d4 866 } // switch type
wim 32:59c4b8f648d4 867
wim 32:59c4b8f648d4 868 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 869
wim 32:59c4b8f648d4 870 case PCF2119_3V3:
wim 32:59c4b8f648d4 871 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 872 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 873 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 874
wim 32:59c4b8f648d4 875 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 876 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 877
wim 32:59c4b8f648d4 878 // Initialise Display configuration
wim 32:59c4b8f648d4 879 switch (_type) {
wim 32:59c4b8f648d4 880 case LCD8x1:
wim 32:59c4b8f648d4 881 // case LCD12x1:
wim 32:59c4b8f648d4 882 case LCD16x1:
wim 34:e5a0dcb43ecc 883 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 884 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 885 break;
wim 32:59c4b8f648d4 886
wim 32:59c4b8f648d4 887 case LCD24x1:
wim 32:59c4b8f648d4 888 // case LCD32x1:
wim 34:e5a0dcb43ecc 889 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 890 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 891 break;
wim 32:59c4b8f648d4 892
wim 32:59c4b8f648d4 893 case LCD8x2:
wim 32:59c4b8f648d4 894 // case LCD12x2:
wim 32:59c4b8f648d4 895 case LCD16x2:
wim 34:e5a0dcb43ecc 896 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 897 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 898 break;
wim 32:59c4b8f648d4 899
wim 32:59c4b8f648d4 900 default:
wim 32:59c4b8f648d4 901 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 902 break;
wim 32:59c4b8f648d4 903
wim 32:59c4b8f648d4 904 } // switch type
wim 32:59c4b8f648d4 905
wim 32:59c4b8f648d4 906 // Init special features
wim 32:59c4b8f648d4 907 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 908
wim 32:59c4b8f648d4 909 _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0
wim 32:59c4b8f648d4 910 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 911 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 912 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 913
wim 32:59c4b8f648d4 914 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 915 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 916 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 917 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 918
wim 32:59c4b8f648d4 919 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 920 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 921
wim 32:59c4b8f648d4 922 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 923
wim 32:59c4b8f648d4 924 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 925
wim 32:59c4b8f648d4 926 // case PCF2119_5V:
wim 32:59c4b8f648d4 927 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 928 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 929 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 930 //@TODO
wim 29:a3663151aa65 931
wim 19:c747b9e2e7b8 932 case WS0010:
wim 19:c747b9e2e7b8 933 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 934 // Note1: Identical to RS0010
wim 30:033048611c01 935 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 936 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 937 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 938 //
wim 30:033048611c01 939 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 940 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 941 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 942
wim 30:033048611c01 943 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 944 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 945 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 946 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 947 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 948
wim 29:a3663151aa65 949 // Initialise Display configuration
wim 29:a3663151aa65 950 switch (_type) {
wim 29:a3663151aa65 951 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 952 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 953 // case LCD12x1:
wim 29:a3663151aa65 954 case LCD16x1:
wim 30:033048611c01 955 case LCD24x1:
wim 30:033048611c01 956 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 957 // DL=0 (4 bits bus)
wim 30:033048611c01 958 // N=0 (1 line)
wim 30:033048611c01 959 // F=0 (5x7 dots font)
wim 30:033048611c01 960 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 961 break;
wim 30:033048611c01 962
wim 32:59c4b8f648d4 963 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 964 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 965 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 966 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 967 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 968 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 969 break;
wim 29:a3663151aa65 970
wim 29:a3663151aa65 971 default:
wim 30:033048611c01 972 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 973 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 974 // DL=0 (4 bits bus)
wim 30:033048611c01 975 // N=1 (2 lines)
wim 30:033048611c01 976 // F=0 (5x7 dots font)
wim 30:033048611c01 977 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 978
wim 29:a3663151aa65 979 break;
wim 29:a3663151aa65 980 } // switch type
wim 29:a3663151aa65 981
wim 32:59c4b8f648d4 982 break; // case WS0010 Controller
wim 33:900a94bc7585 983
wim 33:900a94bc7585 984
wim 33:900a94bc7585 985 case US2066_3V3:
wim 33:900a94bc7585 986 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 987 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 988 // case USS2066_5V:
wim 33:900a94bc7585 989 // US2066 controller, VDD=5V
wim 33:900a94bc7585 990
wim 33:900a94bc7585 991 // Initialise Display configuration
wim 33:900a94bc7585 992 switch (_type) {
wim 33:900a94bc7585 993 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 994 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 995 // case LCD12x1:
wim 33:900a94bc7585 996 case LCD16x1:
wim 33:900a94bc7585 997 // case LCD20x1:
wim 33:900a94bc7585 998 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 999 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1000 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1001 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1002 // DH=0 Double Height disable
wim 33:900a94bc7585 1003 // IS=0
wim 33:900a94bc7585 1004
wim 33:900a94bc7585 1005 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1006 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1007 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1008 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1009 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1010 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1011
wim 33:900a94bc7585 1012 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1013 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1014 break;
wim 33:900a94bc7585 1015
wim 33:900a94bc7585 1016 case LCD16x1C:
wim 33:900a94bc7585 1017 case LCD8x2:
wim 33:900a94bc7585 1018 case LCD16x2:
wim 33:900a94bc7585 1019 case LCD20x2:
wim 33:900a94bc7585 1020 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1021 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1022 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1023 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1024 // DH=0 Double Height disable
wim 33:900a94bc7585 1025 // IS=0
wim 33:900a94bc7585 1026
wim 33:900a94bc7585 1027 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1028 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1029 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1030 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1031 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1032 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1033
wim 33:900a94bc7585 1034 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1035 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1036 break;
wim 33:900a94bc7585 1037
wim 33:900a94bc7585 1038 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1039 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1040 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1041 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1042 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1043 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1044 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1045 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1046 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1047 // DH=0 Double Height disable
wim 33:900a94bc7585 1048 // IS=0
wim 33:900a94bc7585 1049
wim 33:900a94bc7585 1050 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1051 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1052 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1053 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1054 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1055 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1056
wim 33:900a94bc7585 1057 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1058 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1059 break;
wim 33:900a94bc7585 1060
wim 33:900a94bc7585 1061 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1062 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1063 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1064 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1065 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1066 // DH=0 Double Height disable
wim 33:900a94bc7585 1067 // IS=0
wim 33:900a94bc7585 1068
wim 33:900a94bc7585 1069 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1070 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1071 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1072 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1073 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1074 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1075
wim 33:900a94bc7585 1076 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1077 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1078 break;
wim 33:900a94bc7585 1079
wim 33:900a94bc7585 1080 // case LCD24x1:
wim 33:900a94bc7585 1081 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1082 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1083 default:
wim 33:900a94bc7585 1084 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1085 break;
wim 33:900a94bc7585 1086
wim 33:900a94bc7585 1087 } // switch type
wim 33:900a94bc7585 1088
wim 34:e5a0dcb43ecc 1089 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1090
wim 33:900a94bc7585 1091 // init special features
wim 33:900a94bc7585 1092 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1093 // Select Extended Instruction Set
wim 33:900a94bc7585 1094
wim 33:900a94bc7585 1095 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1096 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1097
wim 33:900a94bc7585 1098 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1099
wim 33:900a94bc7585 1100 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1101 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1102
wim 33:900a94bc7585 1103 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1104
wim 33:900a94bc7585 1105 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1106 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1107
wim 33:900a94bc7585 1108 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1109
wim 34:e5a0dcb43ecc 1110 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1111 // // Default
wim 33:900a94bc7585 1112
wim 33:900a94bc7585 1113 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1114 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1115
wim 33:900a94bc7585 1116 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1117
wim 33:900a94bc7585 1118 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1119 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1120
wim 33:900a94bc7585 1121 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1122 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1123 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1124
wim 33:900a94bc7585 1125 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1126 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1127 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1128
wim 33:900a94bc7585 1129 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1130 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1131
wim 33:900a94bc7585 1132 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1133 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1134
wim 33:900a94bc7585 1135 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1136
wim 33:900a94bc7585 1137 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1138 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1139 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1140 //End Test Blinking
wim 33:900a94bc7585 1141
wim 33:900a94bc7585 1142 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1143
wim 33:900a94bc7585 1144 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1145 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1146
wim 33:900a94bc7585 1147 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1148 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1149 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1150
wim 33:900a94bc7585 1151 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1152 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1153 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1154
wim 34:e5a0dcb43ecc 1155 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1156 case PT6314 :
wim 34:e5a0dcb43ecc 1157 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1158 switch (_type) {
wim 34:e5a0dcb43ecc 1159 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1160 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1161 // case LCD12x1:
wim 34:e5a0dcb43ecc 1162 case LCD16x1:
wim 34:e5a0dcb43ecc 1163 case LCD20x1:
wim 34:e5a0dcb43ecc 1164 case LCD24x1:
wim 34:e5a0dcb43ecc 1165 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1166 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1167 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1168 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1169 // X
wim 34:e5a0dcb43ecc 1170 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1171 // BR0=0
wim 34:e5a0dcb43ecc 1172 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1173 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1174 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1175 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1176
wim 34:e5a0dcb43ecc 1177 break;
wim 34:e5a0dcb43ecc 1178
wim 34:e5a0dcb43ecc 1179 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1180 case LCD8x2:
wim 34:e5a0dcb43ecc 1181 case LCD16x2:
wim 34:e5a0dcb43ecc 1182 case LCD20x2:
wim 34:e5a0dcb43ecc 1183 case LCD24x2:
wim 34:e5a0dcb43ecc 1184 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1185 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1186 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1187 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1188 // X
wim 34:e5a0dcb43ecc 1189 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1190 // BR0=0
wim 34:e5a0dcb43ecc 1191 break;
wim 34:e5a0dcb43ecc 1192
wim 34:e5a0dcb43ecc 1193 default:
wim 34:e5a0dcb43ecc 1194 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1195 break;
wim 34:e5a0dcb43ecc 1196 } // switch type
wim 34:e5a0dcb43ecc 1197
wim 34:e5a0dcb43ecc 1198 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1199 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1200 break; // case PT6314 Controller (VFD)
wim 29:a3663151aa65 1201
wim 37:ce348c002929 1202 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1203 default:
wim 32:59c4b8f648d4 1204 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1205
wim 29:a3663151aa65 1206 // Initialise Display configuration
wim 29:a3663151aa65 1207 switch (_type) {
wim 29:a3663151aa65 1208 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1209 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1210 // case LCD12x1:
wim 29:a3663151aa65 1211 case LCD16x1:
wim 30:033048611c01 1212 // case LCD20x1:
wim 29:a3663151aa65 1213 case LCD24x1:
wim 30:033048611c01 1214 // case LCD40x1:
wim 32:59c4b8f648d4 1215 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1216 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1217 // N=0 (1 line)
wim 29:a3663151aa65 1218 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1219 break;
wim 29:a3663151aa65 1220
wim 32:59c4b8f648d4 1221 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1222 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1223 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1224 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1225 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1226 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1227 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1228 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1229 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1230 break;
wim 30:033048611c01 1231
wim 30:033048611c01 1232 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1233 default:
wim 32:59c4b8f648d4 1234 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1235 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1236 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1237 // N=1 (2 lines)
wim 29:a3663151aa65 1238 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1239 // - (Don't care)
wim 29:a3663151aa65 1240 break;
wim 29:a3663151aa65 1241 } // switch type
wim 10:dd9b3a696acd 1242
wim 34:e5a0dcb43ecc 1243 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1244 break; // case default Controller
wim 29:a3663151aa65 1245
wim 34:e5a0dcb43ecc 1246 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1247
wim 30:033048611c01 1248 // Controller general initialisations
wim 32:59c4b8f648d4 1249 // _writeCommand(0x01); // cls, and set cursor to 0
wim 32:59c4b8f648d4 1250 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1251 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1252
wim 28:30fa94f7341c 1253 _writeCommand(0x02); // Return Home
wim 28:30fa94f7341c 1254 // Cursor Home, DDRAM Address to Origin
wim 28:30fa94f7341c 1255
wim 28:30fa94f7341c 1256 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1257 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1258 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1259 // S=0 (No display shift)
wim 10:dd9b3a696acd 1260
wim 29:a3663151aa65 1261 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1262 // S/C=0 Cursor moves
wim 29:a3663151aa65 1263 // R/L=1 Right
wim 29:a3663151aa65 1264 //
wim 29:a3663151aa65 1265
wim 13:24506ba22480 1266 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1267 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1268
wim 21:9eb628d9e164 1269 setCursor(CurOff_BlkOff);
wim 21:9eb628d9e164 1270 setMode(DispOn);
simon 1:ac48b187213c 1271 }
simon 1:ac48b187213c 1272
wim 8:03116f75b66e 1273
wim 21:9eb628d9e164 1274 /** Clear the screen, Cursor home.
wim 21:9eb628d9e164 1275 */
wim 21:9eb628d9e164 1276 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1277
wim 15:b70ebfffb258 1278 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1279 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1280 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1281
wim 15:b70ebfffb258 1282 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1283 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1284
wim 15:b70ebfffb258 1285 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1286 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1287 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1288 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1289
wim 21:9eb628d9e164 1290 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1291 }
wim 15:b70ebfffb258 1292
wim 15:b70ebfffb258 1293 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1294 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1295 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1296 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1297
wim 15:b70ebfffb258 1298 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1299 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1300 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1301 }
wim 15:b70ebfffb258 1302
wim 29:a3663151aa65 1303 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1304 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1305 }
simon 1:ac48b187213c 1306
wim 29:a3663151aa65 1307 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1308 *
wim 29:a3663151aa65 1309 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1310 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1311 */
wim 21:9eb628d9e164 1312 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1313
wim 15:b70ebfffb258 1314 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1315 // check column and row sanity,
wim 15:b70ebfffb258 1316 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1317 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1318 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1319 setAddress(column, row);
wim 15:b70ebfffb258 1320 }
wim 30:033048611c01 1321
wim 15:b70ebfffb258 1322
wim 21:9eb628d9e164 1323 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1324 */
wim 21:9eb628d9e164 1325 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1326 int addr;
wim 15:b70ebfffb258 1327
wim 15:b70ebfffb258 1328 if (value == '\n') {
wim 15:b70ebfffb258 1329 //No character to write
wim 15:b70ebfffb258 1330
wim 15:b70ebfffb258 1331 //Update Cursor
wim 15:b70ebfffb258 1332 _column = 0;
wim 15:b70ebfffb258 1333 _row++;
wim 15:b70ebfffb258 1334 if (_row >= rows()) {
wim 15:b70ebfffb258 1335 _row = 0;
wim 15:b70ebfffb258 1336 }
wim 15:b70ebfffb258 1337 }
wim 15:b70ebfffb258 1338 else {
wim 37:ce348c002929 1339 //Character to write
wim 37:ce348c002929 1340 #if (LCD_DEFAULT_FONT == 1)
wim 37:ce348c002929 1341 _writeData(value);
wim 37:ce348c002929 1342 #else
wim 37:ce348c002929 1343 _writeData(ASCII_2_LCD(value));
wim 37:ce348c002929 1344 #endif
wim 15:b70ebfffb258 1345 //Update Cursor
wim 15:b70ebfffb258 1346 _column++;
wim 15:b70ebfffb258 1347 if (_column >= columns()) {
wim 15:b70ebfffb258 1348 _column = 0;
wim 15:b70ebfffb258 1349 _row++;
wim 15:b70ebfffb258 1350 if (_row >= rows()) {
wim 15:b70ebfffb258 1351 _row = 0;
wim 15:b70ebfffb258 1352 }
wim 15:b70ebfffb258 1353 }
wim 15:b70ebfffb258 1354 } //else
wim 15:b70ebfffb258 1355
wim 15:b70ebfffb258 1356 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1357 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1358 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1359
wim 15:b70ebfffb258 1360 return value;
wim 15:b70ebfffb258 1361 }
wim 15:b70ebfffb258 1362
wim 15:b70ebfffb258 1363
wim 16:c276b75e6585 1364 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1365 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1366 return -1;
simon 1:ac48b187213c 1367 }
simon 1:ac48b187213c 1368
wim 37:ce348c002929 1369 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1370 *
wim 37:ce348c002929 1371 * @param c The character to write to the display
wim 37:ce348c002929 1372 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1373 */
wim 37:ce348c002929 1374 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1375
wim 37:ce348c002929 1376 //LCD_C_FT0 is default for HD44780 and compatible series
wim 37:ce348c002929 1377 if (_font == LCD_C_FT0) return c;
wim 37:ce348c002929 1378
wim 37:ce348c002929 1379 //LCD_C_FT1 for PCF21XXC series
wim 37:ce348c002929 1380 //Used code from Suga koubou library for PCF2119
wim 37:ce348c002929 1381 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1382 c |= 0x80;
wim 37:ce348c002929 1383 } else if (c >= 0xf0 && c <= 0xff) {
wim 37:ce348c002929 1384 c &= 0x0f;
wim 37:ce348c002929 1385 }
wim 37:ce348c002929 1386 return c;
wim 37:ce348c002929 1387
wim 37:ce348c002929 1388 //LCD_C_FT2 ...
wim 37:ce348c002929 1389 //@TODO add more, eg cyrillic
wim 37:ce348c002929 1390 //@TODO add method to switch between fonts for controllers that support this
wim 37:ce348c002929 1391 }
wim 37:ce348c002929 1392
wim 14:0c32b66b14b8 1393
wim 34:e5a0dcb43ecc 1394 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1395 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1396 *
wim 34:e5a0dcb43ecc 1397 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1398 */
wim 34:e5a0dcb43ecc 1399 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1400 return _putc(c);
wim 34:e5a0dcb43ecc 1401 }
wim 34:e5a0dcb43ecc 1402
wim 34:e5a0dcb43ecc 1403
wim 34:e5a0dcb43ecc 1404 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1405 *
wim 34:e5a0dcb43ecc 1406 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1407 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1408 */
wim 34:e5a0dcb43ecc 1409 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1410
wim 34:e5a0dcb43ecc 1411 while (*text !=0) {
wim 34:e5a0dcb43ecc 1412 _putc(*text);
wim 34:e5a0dcb43ecc 1413 text++;
wim 34:e5a0dcb43ecc 1414 }
wim 34:e5a0dcb43ecc 1415 return 0;
wim 34:e5a0dcb43ecc 1416 }
wim 34:e5a0dcb43ecc 1417 #endif
wim 34:e5a0dcb43ecc 1418
wim 34:e5a0dcb43ecc 1419
wim 17:652ab113bc2e 1420 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1421 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1422
wim 17:652ab113bc2e 1423 // Enable is Low
wim 21:9eb628d9e164 1424 this->_setEnable(true);
wim 37:ce348c002929 1425 this->_setData(value); // Low nibble
wim 17:652ab113bc2e 1426 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1427 this->_setEnable(false);
wim 17:652ab113bc2e 1428 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1429 // Enable is Low
wim 17:652ab113bc2e 1430 }
wim 17:652ab113bc2e 1431
wim 16:c276b75e6585 1432 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1433 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1434
wim 15:b70ebfffb258 1435 // Enable is Low
wim 21:9eb628d9e164 1436 this->_setEnable(true);
wim 21:9eb628d9e164 1437 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1438 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1439 this->_setEnable(false);
wim 15:b70ebfffb258 1440 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1441
wim 21:9eb628d9e164 1442 this->_setEnable(true);
wim 37:ce348c002929 1443 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1444 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1445 this->_setEnable(false);
wim 15:b70ebfffb258 1446 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1447
wim 15:b70ebfffb258 1448 // Enable is Low
simon 1:ac48b187213c 1449 }
simon 1:ac48b187213c 1450
wim 21:9eb628d9e164 1451 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1452 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1453
wim 21:9eb628d9e164 1454 this->_setRS(false);
wim 16:c276b75e6585 1455 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1456
wim 21:9eb628d9e164 1457 this->_writeByte(command);
wim 15:b70ebfffb258 1458 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1459 }
simon 1:ac48b187213c 1460
wim 21:9eb628d9e164 1461 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1462 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1463
wim 21:9eb628d9e164 1464 this->_setRS(true);
wim 16:c276b75e6585 1465 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1466
wim 21:9eb628d9e164 1467 this->_writeByte(data);
wim 15:b70ebfffb258 1468 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1469 }
simon 1:ac48b187213c 1470
wim 8:03116f75b66e 1471
wim 32:59c4b8f648d4 1472 // This replaces the original _address() method.
wim 8:03116f75b66e 1473 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1474 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1475 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1476 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1477 }
wim 8:03116f75b66e 1478
wim 30:033048611c01 1479
wim 30:033048611c01 1480 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1481 //
wim 30:033048611c01 1482 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1483 *
wim 30:033048611c01 1484 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1485 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1486 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1487 *
wim 30:033048611c01 1488 */
wim 30:033048611c01 1489 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1490
wim 30:033048611c01 1491 switch (_addr_mode) {
wim 30:033048611c01 1492
wim 30:033048611c01 1493 case LCD_T_A:
wim 30:033048611c01 1494 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1495 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1496 //Displays top rows when less than four are used.
wim 30:033048611c01 1497 switch (row) {
wim 30:033048611c01 1498 case 0:
wim 30:033048611c01 1499 return 0x00 + column;
wim 30:033048611c01 1500 case 1:
wim 30:033048611c01 1501 return 0x40 + column;
wim 30:033048611c01 1502 case 2:
wim 30:033048611c01 1503 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1504 case 3:
wim 30:033048611c01 1505 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1506 // Should never get here.
wim 30:033048611c01 1507 default:
wim 30:033048611c01 1508 return 0x00;
wim 30:033048611c01 1509 }
wim 30:033048611c01 1510
wim 30:033048611c01 1511 case LCD_T_B:
wim 30:033048611c01 1512 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1513 if (row==0)
wim 30:033048611c01 1514 return 0x00 + column;
wim 30:033048611c01 1515 else
wim 30:033048611c01 1516 // return _nr_cols + column;
wim 30:033048611c01 1517 return 0x08 + column;
wim 30:033048611c01 1518
wim 30:033048611c01 1519 case LCD_T_C:
wim 30:033048611c01 1520 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1521 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1522 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1523 #if(0)
wim 32:59c4b8f648d4 1524 if (column < 8)
wim 30:033048611c01 1525 return 0x00 + column;
wim 30:033048611c01 1526 else
wim 30:033048611c01 1527 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1528 #else
wim 32:59c4b8f648d4 1529 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1530 return 0x00 + column;
wim 32:59c4b8f648d4 1531 else
wim 32:59c4b8f648d4 1532 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1533 #endif
wim 30:033048611c01 1534
wim 30:033048611c01 1535 // Not sure about this one, seems wrong.
wim 30:033048611c01 1536 // Left in for compatibility with original library
wim 30:033048611c01 1537 // case LCD16x2B:
wim 30:033048611c01 1538 // return 0x00 + (row * 40) + column;
wim 30:033048611c01 1539
wim 30:033048611c01 1540 case LCD_T_D:
wim 36:9f5f86dfd44a 1541 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1542 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1543 //Displays top rows when less than four are used.
wim 30:033048611c01 1544 switch (row) {
wim 30:033048611c01 1545 case 0:
wim 30:033048611c01 1546 return 0x00 + column;
wim 30:033048611c01 1547 case 1:
wim 30:033048611c01 1548 return 0x20 + column;
wim 30:033048611c01 1549 case 2:
wim 30:033048611c01 1550 return 0x40 + column;
wim 30:033048611c01 1551 case 3:
wim 30:033048611c01 1552 return 0x60 + column;
wim 30:033048611c01 1553 // Should never get here.
wim 30:033048611c01 1554 default:
wim 30:033048611c01 1555 return 0x00;
wim 30:033048611c01 1556 }
wim 30:033048611c01 1557
wim 30:033048611c01 1558 case LCD_T_D1:
wim 36:9f5f86dfd44a 1559 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1560 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1561 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1562 switch (row) {
wim 30:033048611c01 1563 case 0:
wim 30:033048611c01 1564 return 0x20 + column;
wim 30:033048611c01 1565 case 1:
wim 30:033048611c01 1566 return 0x40 + column;
wim 30:033048611c01 1567 case 2:
wim 30:033048611c01 1568 return 0x60 + column;
wim 30:033048611c01 1569 // Should never get here.
wim 30:033048611c01 1570 default:
wim 30:033048611c01 1571 return 0x00;
wim 30:033048611c01 1572 }
wim 30:033048611c01 1573
wim 30:033048611c01 1574 case LCD_T_E:
wim 30:033048611c01 1575 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1576 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1577 if (row<2) {
wim 30:033048611c01 1578 // Test to see if we need to switch between controllers
wim 30:033048611c01 1579 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1580
wim 30:033048611c01 1581 // Second LCD controller Cursor Off
wim 30:033048611c01 1582 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1583
wim 30:033048611c01 1584 // Select primary controller
wim 30:033048611c01 1585 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1586
wim 30:033048611c01 1587 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1588 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1589 }
wim 30:033048611c01 1590
wim 30:033048611c01 1591 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1592 }
wim 30:033048611c01 1593 else {
wim 30:033048611c01 1594
wim 30:033048611c01 1595 // Test to see if we need to switch between controllers
wim 30:033048611c01 1596 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1597 // Primary LCD controller Cursor Off
wim 30:033048611c01 1598 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1599
wim 30:033048611c01 1600 // Select secondary controller
wim 30:033048611c01 1601 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1602
wim 30:033048611c01 1603 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1604 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1605 }
wim 30:033048611c01 1606
wim 30:033048611c01 1607 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1608 }
wim 30:033048611c01 1609
wim 32:59c4b8f648d4 1610 case LCD_T_F:
wim 32:59c4b8f648d4 1611 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1612 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1613 switch (row) {
wim 32:59c4b8f648d4 1614 case 0:
wim 32:59c4b8f648d4 1615 return 0x00 + column;
wim 32:59c4b8f648d4 1616 case 1:
wim 32:59c4b8f648d4 1617 return 0x40 + column;
wim 32:59c4b8f648d4 1618 case 2:
wim 32:59c4b8f648d4 1619 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1620 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1621 else
wim 32:59c4b8f648d4 1622 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1623 // Should never get here.
wim 32:59c4b8f648d4 1624 default:
wim 32:59c4b8f648d4 1625 return 0x00;
wim 32:59c4b8f648d4 1626 }
wim 32:59c4b8f648d4 1627
wim 32:59c4b8f648d4 1628 case LCD_T_G:
wim 32:59c4b8f648d4 1629 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1630 switch (row) {
wim 32:59c4b8f648d4 1631 case 0:
wim 32:59c4b8f648d4 1632 return 0x00 + column;
wim 32:59c4b8f648d4 1633 case 1:
wim 32:59c4b8f648d4 1634 return 0x10 + column;
wim 32:59c4b8f648d4 1635 case 2:
wim 32:59c4b8f648d4 1636 return 0x20 + column;
wim 32:59c4b8f648d4 1637 // Should never get here.
wim 32:59c4b8f648d4 1638 default:
wim 32:59c4b8f648d4 1639 return 0x00;
wim 32:59c4b8f648d4 1640 }
wim 32:59c4b8f648d4 1641
wim 30:033048611c01 1642 // Should never get here.
wim 30:033048611c01 1643 default:
wim 30:033048611c01 1644 return 0x00;
wim 32:59c4b8f648d4 1645
wim 32:59c4b8f648d4 1646 } // switch _addr_mode
wim 30:033048611c01 1647 }
wim 30:033048611c01 1648
wim 30:033048611c01 1649
wim 29:a3663151aa65 1650 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1651 *
wim 29:a3663151aa65 1652 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1653 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1654 */
wim 21:9eb628d9e164 1655 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1656
wim 15:b70ebfffb258 1657 // Sanity Check column
wim 15:b70ebfffb258 1658 if (column < 0) {
wim 15:b70ebfffb258 1659 _column = 0;
wim 15:b70ebfffb258 1660 }
wim 36:9f5f86dfd44a 1661 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1662 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1663 } else _column = column;
wim 8:03116f75b66e 1664
wim 15:b70ebfffb258 1665 // Sanity Check row
wim 15:b70ebfffb258 1666 if (row < 0) {
wim 15:b70ebfffb258 1667 _row = 0;
wim 15:b70ebfffb258 1668 }
wim 36:9f5f86dfd44a 1669 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1670 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1671 } else _row = row;
wim 15:b70ebfffb258 1672
wim 15:b70ebfffb258 1673
wim 15:b70ebfffb258 1674 // Compute the memory address
wim 15:b70ebfffb258 1675 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1676 // switch cursor if needed
wim 15:b70ebfffb258 1677 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1678
wim 13:24506ba22480 1679 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1680 }
simon 1:ac48b187213c 1681
wim 29:a3663151aa65 1682
wim 29:a3663151aa65 1683 /** Return the number of columns
wim 29:a3663151aa65 1684 *
wim 36:9f5f86dfd44a 1685 * @return The number of columns
wim 30:033048611c01 1686 *
wim 30:033048611c01 1687 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1688 */
wim 21:9eb628d9e164 1689 int TextLCD_Base::columns() {
wim 30:033048611c01 1690
wim 30:033048611c01 1691 // Columns encoded in b7..b0
wim 30:033048611c01 1692 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1693 return _nr_cols;
simon 1:ac48b187213c 1694 }
simon 1:ac48b187213c 1695
wim 29:a3663151aa65 1696 /** Return the number of rows
wim 29:a3663151aa65 1697 *
wim 36:9f5f86dfd44a 1698 * @return The number of rows
wim 30:033048611c01 1699 *
wim 30:033048611c01 1700 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1701 */
wim 21:9eb628d9e164 1702 int TextLCD_Base::rows() {
wim 30:033048611c01 1703
wim 30:033048611c01 1704 // Rows encoded in b15..b8
wim 30:033048611c01 1705 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 1706 return _nr_rows;
simon 1:ac48b187213c 1707 }
wim 10:dd9b3a696acd 1708
wim 29:a3663151aa65 1709 /** Set the Cursormode
wim 29:a3663151aa65 1710 *
wim 29:a3663151aa65 1711 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 1712 */
wim 21:9eb628d9e164 1713 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 1714
wim 17:652ab113bc2e 1715 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 1716 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 1717
wim 17:652ab113bc2e 1718 // Configure only current LCD controller
wim 31:ef31cd8a00d1 1719 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 1720 }
wim 15:b70ebfffb258 1721
wim 29:a3663151aa65 1722 /** Set the Displaymode
wim 29:a3663151aa65 1723 *
wim 29:a3663151aa65 1724 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 1725 */
wim 21:9eb628d9e164 1726 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 1727
wim 17:652ab113bc2e 1728 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 1729 _currentMode = displayMode;
wim 15:b70ebfffb258 1730
wim 17:652ab113bc2e 1731 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 1732 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1733 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 1734 // Configure primary LCD controller
wim 17:652ab113bc2e 1735 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 1736
wim 17:652ab113bc2e 1737 // Select 2nd controller
wim 21:9eb628d9e164 1738 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 1739
wim 17:652ab113bc2e 1740 // Configure secondary LCD controller
wim 21:9eb628d9e164 1741 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 1742
wim 17:652ab113bc2e 1743 // Restore current controller
wim 21:9eb628d9e164 1744 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1745 }
wim 17:652ab113bc2e 1746 else {
wim 17:652ab113bc2e 1747 // Select primary controller
wim 21:9eb628d9e164 1748 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1749
wim 17:652ab113bc2e 1750 // Configure primary LCD controller
wim 21:9eb628d9e164 1751 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 1752
wim 17:652ab113bc2e 1753 // Restore current controller
wim 21:9eb628d9e164 1754 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 1755
wim 17:652ab113bc2e 1756 // Configure secondary LCD controller
wim 17:652ab113bc2e 1757 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 1758 }
wim 17:652ab113bc2e 1759 }
wim 17:652ab113bc2e 1760 else {
wim 17:652ab113bc2e 1761 // Configure primary LCD controller
wim 17:652ab113bc2e 1762 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1763 }
wim 17:652ab113bc2e 1764 }
wim 17:652ab113bc2e 1765
wim 29:a3663151aa65 1766 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 1767 */
wim 36:9f5f86dfd44a 1768 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 1769
wim 36:9f5f86dfd44a 1770 // Configure current LCD controller
wim 36:9f5f86dfd44a 1771 switch (_ctrl) {
wim 36:9f5f86dfd44a 1772 case ST7070:
wim 36:9f5f86dfd44a 1773 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 1774 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 1775 break;
wim 36:9f5f86dfd44a 1776 default:
wim 36:9f5f86dfd44a 1777 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 1778 break;
wim 36:9f5f86dfd44a 1779 } //switch
wim 10:dd9b3a696acd 1780 }
wim 10:dd9b3a696acd 1781
wim 29:a3663151aa65 1782 /** Set the Backlight mode
wim 29:a3663151aa65 1783 *
wim 29:a3663151aa65 1784 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 1785 */
wim 21:9eb628d9e164 1786 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 1787
wim 35:311be6444a39 1788 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 1789 // Positive Backlight control pin logic
wim 20:e0da005a777f 1790 if (backlightMode == LightOn) {
wim 35:311be6444a39 1791 this->_setBL(true);
wim 20:e0da005a777f 1792 }
wim 20:e0da005a777f 1793 else {
wim 21:9eb628d9e164 1794 this->_setBL(false);
wim 20:e0da005a777f 1795 }
wim 35:311be6444a39 1796 #else
wim 35:311be6444a39 1797 // Inverted Backlight control pin logic
wim 35:311be6444a39 1798 if (backlightMode == LightOn) {
wim 35:311be6444a39 1799 this->_setBL(false);
wim 35:311be6444a39 1800 }
wim 35:311be6444a39 1801 else {
wim 35:311be6444a39 1802 this->_setBL(true);
wim 35:311be6444a39 1803 }
wim 35:311be6444a39 1804 #endif
wim 20:e0da005a777f 1805 }
wim 20:e0da005a777f 1806
wim 29:a3663151aa65 1807 /** Set User Defined Characters
wim 29:a3663151aa65 1808 *
wim 34:e5a0dcb43ecc 1809 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1810 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 1811 */
wim 21:9eb628d9e164 1812 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 15:b70ebfffb258 1813
wim 15:b70ebfffb258 1814 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1815 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 1816 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 1817
wim 15:b70ebfffb258 1818 // Select primary controller
wim 21:9eb628d9e164 1819 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 1820
wim 15:b70ebfffb258 1821 // Configure primary LCD controller
wim 15:b70ebfffb258 1822 _setUDC(c, udc_data);
wim 15:b70ebfffb258 1823
wim 15:b70ebfffb258 1824 // Select 2nd controller
wim 21:9eb628d9e164 1825 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 1826
wim 15:b70ebfffb258 1827 // Configure secondary LCD controller
wim 15:b70ebfffb258 1828 _setUDC(c, udc_data);
wim 11:9ec02df863a1 1829
wim 15:b70ebfffb258 1830 // Restore current controller
wim 19:c747b9e2e7b8 1831 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 1832 }
wim 15:b70ebfffb258 1833 else {
wim 15:b70ebfffb258 1834 // Configure primary LCD controller
wim 15:b70ebfffb258 1835 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 1836 }
wim 15:b70ebfffb258 1837 }
wim 15:b70ebfffb258 1838
wim 34:e5a0dcb43ecc 1839 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 1840 *
wim 34:e5a0dcb43ecc 1841 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1842 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 1843 */
wim 34:e5a0dcb43ecc 1844 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 1845
wim 34:e5a0dcb43ecc 1846 switch (_ctrl) {
wim 34:e5a0dcb43ecc 1847 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1848 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1849 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 1850 case PCF2116_5V :
wim 34:e5a0dcb43ecc 1851 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1852 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 1853 break;
wim 34:e5a0dcb43ecc 1854
wim 34:e5a0dcb43ecc 1855 default:
wim 34:e5a0dcb43ecc 1856 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 1857 break;
wim 34:e5a0dcb43ecc 1858 } //switch _ctrl
wim 34:e5a0dcb43ecc 1859
wim 34:e5a0dcb43ecc 1860 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 1861 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 1862 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 1863
wim 34:e5a0dcb43ecc 1864 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 1865 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 1866 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 1867 // Store UDC pattern
wim 34:e5a0dcb43ecc 1868 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 1869 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 1870 }
wim 34:e5a0dcb43ecc 1871
wim 34:e5a0dcb43ecc 1872 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 1873 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 1874 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 1875 }
wim 32:59c4b8f648d4 1876
wim 36:9f5f86dfd44a 1877 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 1878 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 1879 *
wim 33:900a94bc7585 1880 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 1881 */
wim 33:900a94bc7585 1882 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 1883 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 1884 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 1885 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 1886 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 1887 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 1888 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1889 // .............
wim 33:900a94bc7585 1890 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1891 //
wim 33:900a94bc7585 1892 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 1893 // B1 B0 Mode
wim 33:900a94bc7585 1894 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 1895 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 1896 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 1897 //
wim 36:9f5f86dfd44a 1898 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 1899 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 1900 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 1901 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 1902 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 1903 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 1904 switch (blinkMode) {
wim 33:900a94bc7585 1905 case BlinkOn:
wim 36:9f5f86dfd44a 1906 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 1907 switch (_ctrl) {
wim 36:9f5f86dfd44a 1908 case KS0073 :
wim 33:900a94bc7585 1909 case KS0078 :
wim 36:9f5f86dfd44a 1910 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 1911 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1912
wim 33:900a94bc7585 1913 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1914 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1915
wim 33:900a94bc7585 1916 case US2066_3V3 :
wim 33:900a94bc7585 1917 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1918 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 1919 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1920 // Select Ext Instr Set
wim 33:900a94bc7585 1921
wim 33:900a94bc7585 1922 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1923 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1924 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1925
wim 36:9f5f86dfd44a 1926 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1927 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1928 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1929 // Enable Icon Blink
wim 36:9f5f86dfd44a 1930 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1931 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1932 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1933
wim 36:9f5f86dfd44a 1934 break;
wim 33:900a94bc7585 1935
wim 33:900a94bc7585 1936 default:
wim 33:900a94bc7585 1937 //Unsupported feature for other controllers
wim 33:900a94bc7585 1938 break;
wim 33:900a94bc7585 1939 } //switch _ctrl
wim 33:900a94bc7585 1940
wim 36:9f5f86dfd44a 1941 break; // BlinkOn
wim 33:900a94bc7585 1942
wim 33:900a94bc7585 1943 case BlinkOff:
wim 33:900a94bc7585 1944 // Controllers that support UDC Blink
wim 33:900a94bc7585 1945 switch (_ctrl) {
wim 36:9f5f86dfd44a 1946 case KS0073 :
wim 33:900a94bc7585 1947 case KS0078 :
wim 36:9f5f86dfd44a 1948 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 1949 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1950
wim 33:900a94bc7585 1951 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1952 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1953
wim 33:900a94bc7585 1954 case US2066_3V3 :
wim 33:900a94bc7585 1955 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1956 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 1957 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1958 // Select Ext Instr Set
wim 33:900a94bc7585 1959
wim 33:900a94bc7585 1960 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1961 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1962 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1963
wim 36:9f5f86dfd44a 1964 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1965 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1966 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1967 // Disable Icon Blink
wim 36:9f5f86dfd44a 1968 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1969 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1970 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1971
wim 36:9f5f86dfd44a 1972 break;
wim 33:900a94bc7585 1973
wim 33:900a94bc7585 1974 default:
wim 33:900a94bc7585 1975 //Unsupported feature for other controllers
wim 33:900a94bc7585 1976 break;
wim 33:900a94bc7585 1977 } //switch _ctrl
wim 33:900a94bc7585 1978
wim 36:9f5f86dfd44a 1979 break; //BlinkOff
wim 33:900a94bc7585 1980
wim 33:900a94bc7585 1981 default:
wim 33:900a94bc7585 1982 break;
wim 33:900a94bc7585 1983 } // blinkMode
wim 33:900a94bc7585 1984
wim 33:900a94bc7585 1985 } // setUDCBlink()
wim 33:900a94bc7585 1986
wim 33:900a94bc7585 1987
wim 32:59c4b8f648d4 1988 /** Set Contrast
wim 32:59c4b8f648d4 1989 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 1990 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 1991 *
wim 32:59c4b8f648d4 1992 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 1993 * @return none
wim 32:59c4b8f648d4 1994 */
wim 32:59c4b8f648d4 1995 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 1996 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 1997
wim 32:59c4b8f648d4 1998 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 1999 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2000
wim 32:59c4b8f648d4 2001 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2002
wim 33:900a94bc7585 2003 switch (_ctrl) {
wim 32:59c4b8f648d4 2004 case PCF2113_3V3 :
wim 32:59c4b8f648d4 2005 case PCF2119_3V3 :
wim 32:59c4b8f648d4 2006 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2007 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2008
wim 32:59c4b8f648d4 2009 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2010 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2011 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2012 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2013 break;
wim 32:59c4b8f648d4 2014
wim 32:59c4b8f648d4 2015 case ST7032_3V3 :
wim 32:59c4b8f648d4 2016 case ST7032_5V :
wim 32:59c4b8f648d4 2017 case ST7036_3V3 :
wim 32:59c4b8f648d4 2018 // case ST7036_5V :
wim 32:59c4b8f648d4 2019 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2020 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2021 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2022 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2023 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2024 break;
wim 32:59c4b8f648d4 2025
wim 33:900a94bc7585 2026 case US2066_3V3 :
wim 33:900a94bc7585 2027 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2028 // Select Extended Instruction Set
wim 33:900a94bc7585 2029
wim 33:900a94bc7585 2030 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2031
wim 33:900a94bc7585 2032 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2033 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2034
wim 33:900a94bc7585 2035 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2036
wim 33:900a94bc7585 2037 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2038 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2039 break;
wim 33:900a94bc7585 2040
wim 34:e5a0dcb43ecc 2041 //not yet tested on hardware
wim 32:59c4b8f648d4 2042 case PT6314 :
wim 32:59c4b8f648d4 2043 // Only 2 significant bits
wim 32:59c4b8f648d4 2044 // 0x00 = 100%
wim 32:59c4b8f648d4 2045 // 0x01 = 75%
wim 32:59c4b8f648d4 2046 // 0x02 = 50%
wim 32:59c4b8f648d4 2047 // 0x03 = 25%
wim 32:59c4b8f648d4 2048 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2049 break;
wim 32:59c4b8f648d4 2050
wim 32:59c4b8f648d4 2051 default:
wim 32:59c4b8f648d4 2052 //Unsupported feature for other controllers
wim 33:900a94bc7585 2053 break;
wim 33:900a94bc7585 2054 } // end switch
wim 33:900a94bc7585 2055 } // end setContrast()
wim 32:59c4b8f648d4 2056
wim 32:59c4b8f648d4 2057
wim 32:59c4b8f648d4 2058 /** Set Power
wim 32:59c4b8f648d4 2059 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2060 *
wim 32:59c4b8f648d4 2061 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2062 * @return none
wim 32:59c4b8f648d4 2063 */
wim 32:59c4b8f648d4 2064 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2065 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2066
wim 32:59c4b8f648d4 2067 if (powerOn) {
wim 32:59c4b8f648d4 2068 // Switch on
wim 32:59c4b8f648d4 2069 setMode(DispOn);
wim 32:59c4b8f648d4 2070
wim 32:59c4b8f648d4 2071 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2072 switch (_ctrl) {
wim 32:59c4b8f648d4 2073
wim 32:59c4b8f648d4 2074 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2075 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2076 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2077 //@todo
wim 33:900a94bc7585 2078 // enable Booster Bon
wim 33:900a94bc7585 2079
wim 33:900a94bc7585 2080 case WS0010:
wim 33:900a94bc7585 2081 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2082 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2083 break;
wim 33:900a94bc7585 2084
wim 36:9f5f86dfd44a 2085 case KS0073:
wim 33:900a94bc7585 2086 case KS0078:
wim 32:59c4b8f648d4 2087 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2088 // case SSD1803_5V :
wim 33:900a94bc7585 2089 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2090 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2091 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2092 break;
wim 32:59c4b8f648d4 2093
wim 32:59c4b8f648d4 2094 default:
wim 32:59c4b8f648d4 2095 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2096 break;
wim 32:59c4b8f648d4 2097 } // end switch
wim 32:59c4b8f648d4 2098 }
wim 32:59c4b8f648d4 2099 else {
wim 32:59c4b8f648d4 2100 // Switch off
wim 32:59c4b8f648d4 2101 setMode(DispOff);
wim 32:59c4b8f648d4 2102
wim 32:59c4b8f648d4 2103 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2104 switch (_ctrl) {
wim 32:59c4b8f648d4 2105
wim 32:59c4b8f648d4 2106 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2107 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2108 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2109 //@todo
wim 33:900a94bc7585 2110 // disable Booster Bon
wim 33:900a94bc7585 2111
wim 33:900a94bc7585 2112 case WS0010:
wim 33:900a94bc7585 2113 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2114 break;
wim 33:900a94bc7585 2115
wim 36:9f5f86dfd44a 2116 case KS0073:
wim 33:900a94bc7585 2117 case KS0078:
wim 32:59c4b8f648d4 2118 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2119 // case SSD1803_5V :
wim 33:900a94bc7585 2120 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2121 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2122 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2123 break;
wim 32:59c4b8f648d4 2124
wim 32:59c4b8f648d4 2125 default:
wim 32:59c4b8f648d4 2126 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2127 break;
wim 32:59c4b8f648d4 2128 } // end switch
wim 32:59c4b8f648d4 2129 }
wim 33:900a94bc7585 2130 } // end setPower()
wim 33:900a94bc7585 2131
wim 33:900a94bc7585 2132
wim 33:900a94bc7585 2133 /** Set Orient
wim 33:900a94bc7585 2134 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2135 *
wim 33:900a94bc7585 2136 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2137 * @return none
wim 33:900a94bc7585 2138 */
wim 33:900a94bc7585 2139 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2140
wim 33:900a94bc7585 2141 switch (orient) {
wim 33:900a94bc7585 2142
wim 33:900a94bc7585 2143 case Top:
wim 33:900a94bc7585 2144 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2145 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2146 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2147 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2148 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2149 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2150 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2151 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2152 break;
wim 34:e5a0dcb43ecc 2153
wim 33:900a94bc7585 2154 case SSD1803_3V3 :
wim 33:900a94bc7585 2155 // case SSD1803_5V :
wim 33:900a94bc7585 2156 case US2066_3V3 :
wim 33:900a94bc7585 2157 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2158 // Select Extended Instruction Set
wim 33:900a94bc7585 2159 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2160 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2161
wim 33:900a94bc7585 2162 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2163 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2164 break;
wim 36:9f5f86dfd44a 2165
wim 36:9f5f86dfd44a 2166 case ST7070:
wim 36:9f5f86dfd44a 2167 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2168
wim 36:9f5f86dfd44a 2169 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2170 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2171 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2172 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2173
wim 36:9f5f86dfd44a 2174 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2175
wim 36:9f5f86dfd44a 2176 break; // case ST7070 Controller
wim 33:900a94bc7585 2177
wim 33:900a94bc7585 2178 default:
wim 33:900a94bc7585 2179 //Unsupported feature for other controllers
wim 33:900a94bc7585 2180 break;
wim 33:900a94bc7585 2181
wim 33:900a94bc7585 2182 } // end switch _ctrl
wim 33:900a94bc7585 2183 break; // end Top
wim 33:900a94bc7585 2184
wim 33:900a94bc7585 2185 case Bottom:
wim 33:900a94bc7585 2186 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2187 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2188 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2189 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2190 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2191 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2192 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2193 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2194 break;
wim 34:e5a0dcb43ecc 2195
wim 33:900a94bc7585 2196 case SSD1803_3V3 :
wim 33:900a94bc7585 2197 // case SSD1803_5V :
wim 33:900a94bc7585 2198 case US2066_3V3 :
wim 33:900a94bc7585 2199 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2200 // Select Extended Instruction Set
wim 33:900a94bc7585 2201 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2202 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2203
wim 33:900a94bc7585 2204 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2205 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2206 break;
wim 36:9f5f86dfd44a 2207
wim 36:9f5f86dfd44a 2208 case ST7070:
wim 36:9f5f86dfd44a 2209 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2210 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2211 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2212 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2213 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2214 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2215
wim 36:9f5f86dfd44a 2216 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2217 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2218 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2219 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2220
wim 36:9f5f86dfd44a 2221 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2222
wim 36:9f5f86dfd44a 2223 break; // case ST7070 Controller
wim 33:900a94bc7585 2224
wim 33:900a94bc7585 2225 default:
wim 33:900a94bc7585 2226 //Unsupported feature for other controllers
wim 33:900a94bc7585 2227 break;
wim 33:900a94bc7585 2228
wim 33:900a94bc7585 2229 } // end switch _ctrl
wim 33:900a94bc7585 2230
wim 33:900a94bc7585 2231 break; // end Bottom
wim 33:900a94bc7585 2232 } // end switch orient
wim 33:900a94bc7585 2233 } // end setOrient()
wim 33:900a94bc7585 2234
wim 34:e5a0dcb43ecc 2235 /** Set Big Font
wim 34:e5a0dcb43ecc 2236 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2237 *
wim 34:e5a0dcb43ecc 2238 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2239 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2240 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2241 */
wim 34:e5a0dcb43ecc 2242 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2243
wim 34:e5a0dcb43ecc 2244 switch (lines) {
wim 34:e5a0dcb43ecc 2245 case None:
wim 34:e5a0dcb43ecc 2246 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2247 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2248 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2249 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2250 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2251 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2252 // Default
wim 34:e5a0dcb43ecc 2253 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2254 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2255 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2256 break; // end US2066
wim 34:e5a0dcb43ecc 2257
wim 34:e5a0dcb43ecc 2258 default:
wim 34:e5a0dcb43ecc 2259 break; // end default
wim 34:e5a0dcb43ecc 2260 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2261 break; // end None
wim 34:e5a0dcb43ecc 2262
wim 34:e5a0dcb43ecc 2263 case TopLine:
wim 34:e5a0dcb43ecc 2264 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2265
wim 34:e5a0dcb43ecc 2266 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2267 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2268 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2269 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2270 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2271 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2272 // Default
wim 34:e5a0dcb43ecc 2273 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2274 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2275 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2276 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2277
wim 34:e5a0dcb43ecc 2278 default:
wim 34:e5a0dcb43ecc 2279 break; // end default
wim 34:e5a0dcb43ecc 2280 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2281 break; // end TopLine
wim 34:e5a0dcb43ecc 2282
wim 34:e5a0dcb43ecc 2283 case CenterLine:
wim 34:e5a0dcb43ecc 2284 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2285
wim 34:e5a0dcb43ecc 2286 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2287 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2288 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2289 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2290 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2291 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2292 // Default
wim 34:e5a0dcb43ecc 2293 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2294 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2295 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2296 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2297
wim 34:e5a0dcb43ecc 2298 default:
wim 34:e5a0dcb43ecc 2299 break; // end default
wim 34:e5a0dcb43ecc 2300 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2301 break; // end CenterLine
wim 34:e5a0dcb43ecc 2302
wim 34:e5a0dcb43ecc 2303 case BottomLine:
wim 34:e5a0dcb43ecc 2304 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2305
wim 34:e5a0dcb43ecc 2306 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2307 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2308 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2309 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2310 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2311 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2312 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2313 }
wim 34:e5a0dcb43ecc 2314 else {
wim 34:e5a0dcb43ecc 2315 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2316 }
wim 34:e5a0dcb43ecc 2317 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2318 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2319 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2320 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2321
wim 34:e5a0dcb43ecc 2322 default:
wim 34:e5a0dcb43ecc 2323 break; // end default
wim 34:e5a0dcb43ecc 2324 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2325 break; // end BottomLine
wim 34:e5a0dcb43ecc 2326
wim 34:e5a0dcb43ecc 2327 case TopBottomLine:
wim 34:e5a0dcb43ecc 2328 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2329
wim 34:e5a0dcb43ecc 2330 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2331 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2332 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2333 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2334 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2335 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2336 // Default
wim 34:e5a0dcb43ecc 2337 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2338 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2339 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2340 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2341
wim 34:e5a0dcb43ecc 2342 default:
wim 34:e5a0dcb43ecc 2343 break; // end default
wim 34:e5a0dcb43ecc 2344 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2345 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2346
wim 34:e5a0dcb43ecc 2347 } // end switch lines
wim 34:e5a0dcb43ecc 2348
wim 34:e5a0dcb43ecc 2349 } // end setBigFont()
wim 32:59c4b8f648d4 2350
wim 36:9f5f86dfd44a 2351
wim 36:9f5f86dfd44a 2352 /** Set Icons
wim 36:9f5f86dfd44a 2353 *
wim 36:9f5f86dfd44a 2354 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2355 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2356 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2357 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2358 */
wim 36:9f5f86dfd44a 2359 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2360 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2361 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2362 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2363 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2364 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2365 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2366 // .............
wim 36:9f5f86dfd44a 2367 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2368 //
wim 36:9f5f86dfd44a 2369 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2370 // B1 B0 Mode
wim 36:9f5f86dfd44a 2371 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2372 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2373 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2374 //
wim 36:9f5f86dfd44a 2375 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2376 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2377 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2378 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2379 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2380 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2381
wim 36:9f5f86dfd44a 2382 switch (_ctrl) {
wim 36:9f5f86dfd44a 2383 case KS0073:
wim 36:9f5f86dfd44a 2384 case KS0078:
wim 36:9f5f86dfd44a 2385 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2386 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2387 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2388
wim 36:9f5f86dfd44a 2389 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2390
wim 36:9f5f86dfd44a 2391 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2392 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2393 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2394
wim 36:9f5f86dfd44a 2395 case ST7032_3V3:
wim 36:9f5f86dfd44a 2396 case ST7032_5V:
wim 36:9f5f86dfd44a 2397 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2398 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2399
wim 36:9f5f86dfd44a 2400 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2401
wim 36:9f5f86dfd44a 2402 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2403 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2404 break; // end ST7032
wim 36:9f5f86dfd44a 2405
wim 36:9f5f86dfd44a 2406 case ST7036_3V3:
wim 36:9f5f86dfd44a 2407 case ST7036_5V:
wim 36:9f5f86dfd44a 2408 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2409 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2410
wim 36:9f5f86dfd44a 2411 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2412
wim 36:9f5f86dfd44a 2413 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2414 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2415 break; // end ST7036
wim 36:9f5f86dfd44a 2416
wim 36:9f5f86dfd44a 2417 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2418 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2419 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2420 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2421 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2422 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2423
wim 36:9f5f86dfd44a 2424 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2425 // Select IS=0
wim 36:9f5f86dfd44a 2426 break; // end SSD1803
wim 36:9f5f86dfd44a 2427
wim 36:9f5f86dfd44a 2428 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2429 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2430 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2431 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2432 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2433 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2434 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2435 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2436 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2437 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2438 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2439 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2440
wim 36:9f5f86dfd44a 2441 default:
wim 36:9f5f86dfd44a 2442 break; // end default
wim 36:9f5f86dfd44a 2443 } // end switch _ctrl
wim 36:9f5f86dfd44a 2444
wim 36:9f5f86dfd44a 2445 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2446 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2447 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2448
wim 36:9f5f86dfd44a 2449 } // end setIcon()
wim 36:9f5f86dfd44a 2450
wim 36:9f5f86dfd44a 2451 /** Clear Icons
wim 36:9f5f86dfd44a 2452 *
wim 36:9f5f86dfd44a 2453 * @param none
wim 36:9f5f86dfd44a 2454 * @return none
wim 36:9f5f86dfd44a 2455 */
wim 36:9f5f86dfd44a 2456 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2457 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2458 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2459 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2460 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2461 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2462 // .............
wim 36:9f5f86dfd44a 2463 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2464 //
wim 36:9f5f86dfd44a 2465 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2466 // B1 B0 Mode
wim 36:9f5f86dfd44a 2467 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2468 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2469 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2470 //
wim 36:9f5f86dfd44a 2471 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2472 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2473 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2474 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2475 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2476 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2477 int idx;
wim 36:9f5f86dfd44a 2478
wim 36:9f5f86dfd44a 2479 switch (_ctrl) {
wim 36:9f5f86dfd44a 2480 case KS0073:
wim 36:9f5f86dfd44a 2481 case KS0078:
wim 36:9f5f86dfd44a 2482 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2483 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2484 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2485 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2486 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2487 }
wim 36:9f5f86dfd44a 2488 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2489 // Select Std Instr set
wim 36:9f5f86dfd44a 2490 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2491
wim 36:9f5f86dfd44a 2492 case ST7032_3V3:
wim 36:9f5f86dfd44a 2493 case ST7032_5V:
wim 36:9f5f86dfd44a 2494 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2495
wim 36:9f5f86dfd44a 2496 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2497 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2498 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2499 }
wim 36:9f5f86dfd44a 2500
wim 36:9f5f86dfd44a 2501 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2502 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2503 break; // end ST7032
wim 36:9f5f86dfd44a 2504
wim 36:9f5f86dfd44a 2505 case ST7036_3V3:
wim 36:9f5f86dfd44a 2506 case ST7036_5V:
wim 36:9f5f86dfd44a 2507 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2508
wim 36:9f5f86dfd44a 2509 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2510 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2511 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2512 }
wim 36:9f5f86dfd44a 2513
wim 36:9f5f86dfd44a 2514 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2515 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2516 break; // end ST7036
wim 36:9f5f86dfd44a 2517
wim 36:9f5f86dfd44a 2518 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2519 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2520 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2521 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2522 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2523 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2524 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2525 }
wim 36:9f5f86dfd44a 2526 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2527 // Select IS=0
wim 36:9f5f86dfd44a 2528 break; // end SSD1803
wim 36:9f5f86dfd44a 2529
wim 36:9f5f86dfd44a 2530 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2531 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2532 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2533 // Select CG RAM
wim 36:9f5f86dfd44a 2534
wim 36:9f5f86dfd44a 2535 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2536 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2537 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2538 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2539 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2540 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2541 }
wim 36:9f5f86dfd44a 2542
wim 36:9f5f86dfd44a 2543 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2544 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2545 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2546 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2547 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2548 }
wim 36:9f5f86dfd44a 2549 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2550
wim 36:9f5f86dfd44a 2551 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2552 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2553 // Select CG RAM
wim 36:9f5f86dfd44a 2554
wim 36:9f5f86dfd44a 2555 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2556 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2557 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2558 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2559 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2560 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2561 }
wim 36:9f5f86dfd44a 2562
wim 36:9f5f86dfd44a 2563 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2564 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2565 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2566 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2567 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2568 }
wim 36:9f5f86dfd44a 2569 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 2570
wim 36:9f5f86dfd44a 2571 default:
wim 36:9f5f86dfd44a 2572 break; // end default
wim 36:9f5f86dfd44a 2573 } // end switch _ctrl
wim 36:9f5f86dfd44a 2574
wim 36:9f5f86dfd44a 2575 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2576 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2577 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2578 } //end clrIcon()
wim 36:9f5f86dfd44a 2579
wim 36:9f5f86dfd44a 2580
wim 36:9f5f86dfd44a 2581 /** Set Invert
wim 36:9f5f86dfd44a 2582 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 2583 *
wim 36:9f5f86dfd44a 2584 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 2585 * @return none
wim 36:9f5f86dfd44a 2586 */
wim 36:9f5f86dfd44a 2587 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2588 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 2589
wim 36:9f5f86dfd44a 2590 if (invertOn) {
wim 36:9f5f86dfd44a 2591 // Controllers that support Invert
wim 36:9f5f86dfd44a 2592 switch (_ctrl) {
wim 36:9f5f86dfd44a 2593 case KS0073:
wim 36:9f5f86dfd44a 2594 case KS0078:
wim 36:9f5f86dfd44a 2595 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2596 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2597 break;
wim 36:9f5f86dfd44a 2598 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2599 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2600 case US2066_3V3:
wim 36:9f5f86dfd44a 2601 // case USS2066_5V:
wim 36:9f5f86dfd44a 2602 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2603 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2604 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2605 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2606 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2607 break;
wim 36:9f5f86dfd44a 2608 default:
wim 36:9f5f86dfd44a 2609 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2610 break;
wim 36:9f5f86dfd44a 2611 } // end switch
wim 36:9f5f86dfd44a 2612 }
wim 36:9f5f86dfd44a 2613 else {
wim 36:9f5f86dfd44a 2614 // Controllers that support Invert
wim 36:9f5f86dfd44a 2615 switch (_ctrl) {
wim 36:9f5f86dfd44a 2616 case KS0073:
wim 36:9f5f86dfd44a 2617 case KS0078:
wim 36:9f5f86dfd44a 2618 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2619 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2620 break;
wim 36:9f5f86dfd44a 2621 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2622 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2623 case US2066_3V3:
wim 36:9f5f86dfd44a 2624 // case USS2066_5V:
wim 36:9f5f86dfd44a 2625 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2626 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2627 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2628 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2629 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2630 break;
wim 36:9f5f86dfd44a 2631
wim 36:9f5f86dfd44a 2632 default:
wim 36:9f5f86dfd44a 2633 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2634 break;
wim 36:9f5f86dfd44a 2635 } // end switch
wim 36:9f5f86dfd44a 2636 }
wim 36:9f5f86dfd44a 2637 } // end setInvert()
wim 36:9f5f86dfd44a 2638
wim 23:d47f226efb24 2639 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 2640
wim 22:35742ec80c24 2641
wim 23:d47f226efb24 2642 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 2643
wim 21:9eb628d9e164 2644 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 2645 *
wim 21:9eb628d9e164 2646 * @param rs Instruction/data control line
wim 21:9eb628d9e164 2647 * @param e Enable line (clock)
wim 21:9eb628d9e164 2648 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 2649 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 2650 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 2651 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 2652 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 2653 */
wim 21:9eb628d9e164 2654 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 2655 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 2656 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2657 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 2658 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 2659
wim 22:35742ec80c24 2660 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2661 if (bl != NC) {
wim 22:35742ec80c24 2662 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 2663 _bl->write(0); //Deactivate
wim 22:35742ec80c24 2664 }
wim 22:35742ec80c24 2665 else {
wim 22:35742ec80c24 2666 // No Hardware Backlight pin
wim 22:35742ec80c24 2667 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 2668 }
wim 22:35742ec80c24 2669
wim 22:35742ec80c24 2670 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2671 if (e2 != NC) {
wim 22:35742ec80c24 2672 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 2673 _e2->write(0); //Deactivate
wim 22:35742ec80c24 2674 }
wim 22:35742ec80c24 2675 else {
wim 22:35742ec80c24 2676 // No Hardware Enable pin
wim 22:35742ec80c24 2677 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 2678 }
wim 37:ce348c002929 2679
wim 37:ce348c002929 2680 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 2681 }
wim 21:9eb628d9e164 2682
wim 29:a3663151aa65 2683 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 2684 *
wim 29:a3663151aa65 2685 * @param none
wim 29:a3663151aa65 2686 * @return none
wim 29:a3663151aa65 2687 */
wim 29:a3663151aa65 2688 TextLCD::~TextLCD() {
wim 29:a3663151aa65 2689 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 2690 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 2691 }
wim 29:a3663151aa65 2692
wim 22:35742ec80c24 2693 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 2694 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2695 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2696 * @param value true or false
wim 22:35742ec80c24 2697 * @return none
wim 22:35742ec80c24 2698 */
wim 21:9eb628d9e164 2699 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 2700
wim 22:35742ec80c24 2701 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 2702 if (value) {
wim 22:35742ec80c24 2703 _e = 1; // Set E bit
wim 22:35742ec80c24 2704 }
wim 22:35742ec80c24 2705 else {
wim 22:35742ec80c24 2706 _e = 0; // Reset E bit
wim 22:35742ec80c24 2707 }
wim 22:35742ec80c24 2708 }
wim 22:35742ec80c24 2709 else {
wim 22:35742ec80c24 2710 if (value) {
wim 22:35742ec80c24 2711 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 2712 }
wim 22:35742ec80c24 2713 else {
wim 22:35742ec80c24 2714 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 2715 }
wim 22:35742ec80c24 2716 }
wim 21:9eb628d9e164 2717 }
wim 21:9eb628d9e164 2718
wim 21:9eb628d9e164 2719 // Set RS pin
wim 21:9eb628d9e164 2720 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2721 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 2722
wim 22:35742ec80c24 2723 if (value) {
wim 21:9eb628d9e164 2724 _rs = 1; // Set RS bit
wim 22:35742ec80c24 2725 }
wim 22:35742ec80c24 2726 else {
wim 21:9eb628d9e164 2727 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 2728 }
wim 21:9eb628d9e164 2729 }
wim 21:9eb628d9e164 2730
wim 22:35742ec80c24 2731 /** Set BL pin
wim 22:35742ec80c24 2732 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2733 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2734 * @param value true or false
wim 22:35742ec80c24 2735 * @return none
wim 22:35742ec80c24 2736 */
wim 21:9eb628d9e164 2737 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 2738
wim 22:35742ec80c24 2739 if (value) {
wim 22:35742ec80c24 2740 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 2741 }
wim 22:35742ec80c24 2742 else {
wim 22:35742ec80c24 2743 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 2744 }
wim 21:9eb628d9e164 2745 }
wim 21:9eb628d9e164 2746
wim 21:9eb628d9e164 2747 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2748 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2749 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 2750 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 2751 }
wim 34:e5a0dcb43ecc 2752
wim 23:d47f226efb24 2753 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 2754
wim 21:9eb628d9e164 2755
wim 23:d47f226efb24 2756 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 2757 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 2758 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 2759 *
wim 22:35742ec80c24 2760 * @param i2c I2C Bus
wim 26:bd897a001012 2761 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 2762 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 2763 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 2764 */
wim 21:9eb628d9e164 2765 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2766 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 2767 _i2c(i2c){
wim 21:9eb628d9e164 2768
wim 22:35742ec80c24 2769 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2770
wim 28:30fa94f7341c 2771 // Setup the I2C bus
wim 28:30fa94f7341c 2772 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 2773 _i2c->frequency(100000);
wim 21:9eb628d9e164 2774
wim 26:bd897a001012 2775 #if (MCP23008==1)
wim 26:bd897a001012 2776 // MCP23008 portexpander Init
wim 37:ce348c002929 2777 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 2778 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 2779 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 2780 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 2781 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 2782 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 2783 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 2784 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 2785 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 2786 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 2787 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 2788 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 2789 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 2790 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 2791 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 2792
wim 21:9eb628d9e164 2793 // Init the portexpander bus
wim 21:9eb628d9e164 2794 _lcd_bus = D_LCD_BUS_DEF;
wim 21:9eb628d9e164 2795
wim 21:9eb628d9e164 2796 // write the new data to the portexpander
wim 37:ce348c002929 2797 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2798 #else
wim 26:bd897a001012 2799 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2800
wim 26:bd897a001012 2801 // Init the portexpander bus
wim 26:bd897a001012 2802 _lcd_bus = D_LCD_BUS_DEF;
wim 26:bd897a001012 2803
wim 26:bd897a001012 2804 // write the new data to the portexpander
wim 21:9eb628d9e164 2805 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2806 #endif
wim 21:9eb628d9e164 2807
wim 37:ce348c002929 2808 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 2809 }
wim 21:9eb628d9e164 2810
wim 37:ce348c002929 2811 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 2812 // Used for mbed I2C bus expander
wim 37:ce348c002929 2813 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 2814
wim 22:35742ec80c24 2815 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 2816 if (value) {
wim 22:35742ec80c24 2817 _lcd_bus |= D_LCD_E; // Set E bit
wim 26:bd897a001012 2818 }
wim 26:bd897a001012 2819 else {
wim 22:35742ec80c24 2820 _lcd_bus &= ~D_LCD_E; // Reset E bit
wim 26:bd897a001012 2821 }
wim 22:35742ec80c24 2822 }
wim 22:35742ec80c24 2823 else {
wim 26:bd897a001012 2824 if (value) {
wim 22:35742ec80c24 2825 _lcd_bus |= D_LCD_E2; // Set E2 bit
wim 26:bd897a001012 2826 }
wim 26:bd897a001012 2827 else {
wim 22:35742ec80c24 2828 _lcd_bus &= ~D_LCD_E2; // Reset E2bit
wim 26:bd897a001012 2829 }
wim 26:bd897a001012 2830 }
wim 37:ce348c002929 2831 }
wim 37:ce348c002929 2832
wim 37:ce348c002929 2833 // Set E pin (or E2 pin)
wim 37:ce348c002929 2834 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 2835 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 2836
wim 37:ce348c002929 2837 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 2838 _setEnableBit(value);
wim 26:bd897a001012 2839
wim 26:bd897a001012 2840 #if (MCP23008==1)
wim 26:bd897a001012 2841 // MCP23008 portexpander
wim 26:bd897a001012 2842
wim 26:bd897a001012 2843 // write the new data to the portexpander
wim 37:ce348c002929 2844 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2845 #else
wim 26:bd897a001012 2846 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2847
wim 22:35742ec80c24 2848 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2849 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2850 #endif
wim 21:9eb628d9e164 2851 }
wim 21:9eb628d9e164 2852
wim 37:ce348c002929 2853
wim 21:9eb628d9e164 2854 // Set RS pin
wim 21:9eb628d9e164 2855 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2856 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 2857
wim 26:bd897a001012 2858 if (value) {
wim 22:35742ec80c24 2859 _lcd_bus |= D_LCD_RS; // Set RS bit
wim 26:bd897a001012 2860 }
wim 26:bd897a001012 2861 else {
wim 22:35742ec80c24 2862 _lcd_bus &= ~D_LCD_RS; // Reset RS bit
wim 26:bd897a001012 2863 }
wim 26:bd897a001012 2864
wim 26:bd897a001012 2865 #if (MCP23008==1)
wim 26:bd897a001012 2866 // MCP23008 portexpander
wim 26:bd897a001012 2867
wim 26:bd897a001012 2868 // write the new data to the portexpander
wim 37:ce348c002929 2869 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2870 #else
wim 26:bd897a001012 2871 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2872
wim 22:35742ec80c24 2873 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2874 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2875 #endif
wim 21:9eb628d9e164 2876 }
wim 21:9eb628d9e164 2877
wim 21:9eb628d9e164 2878 // Set BL pin
wim 21:9eb628d9e164 2879 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2880 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 2881
wim 26:bd897a001012 2882 if (value) {
wim 21:9eb628d9e164 2883 _lcd_bus |= D_LCD_BL; // Set BL bit
wim 26:bd897a001012 2884 }
wim 26:bd897a001012 2885 else {
wim 21:9eb628d9e164 2886 _lcd_bus &= ~D_LCD_BL; // Reset BL bit
wim 26:bd897a001012 2887 }
wim 26:bd897a001012 2888
wim 26:bd897a001012 2889 #if (MCP23008==1)
wim 26:bd897a001012 2890 // MCP23008 portexpander
wim 26:bd897a001012 2891
wim 26:bd897a001012 2892 // write the new data to the portexpander
wim 37:ce348c002929 2893 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 2894 #else
wim 37:ce348c002929 2895 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 2896
wim 37:ce348c002929 2897 // write the new data to the I2C portexpander
wim 37:ce348c002929 2898 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 2899 #endif
wim 37:ce348c002929 2900 }
wim 37:ce348c002929 2901
wim 37:ce348c002929 2902
wim 37:ce348c002929 2903 // Place the 4bit data in the databus shadowvalue
wim 37:ce348c002929 2904 // Used for mbed I2C bus expander
wim 37:ce348c002929 2905 void TextLCD_I2C::_setDataBits(int value) {
wim 37:ce348c002929 2906
wim 37:ce348c002929 2907 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 2908 if (value & 0x01){
wim 37:ce348c002929 2909 _lcd_bus |= D_LCD_D4; // Set Databit
wim 37:ce348c002929 2910 }
wim 37:ce348c002929 2911 else {
wim 37:ce348c002929 2912 _lcd_bus &= ~D_LCD_D4; // Reset Databit
wim 37:ce348c002929 2913 }
wim 37:ce348c002929 2914
wim 37:ce348c002929 2915 if (value & 0x02){
wim 37:ce348c002929 2916 _lcd_bus |= D_LCD_D5; // Set Databit
wim 37:ce348c002929 2917 }
wim 37:ce348c002929 2918 else {
wim 37:ce348c002929 2919 _lcd_bus &= ~D_LCD_D5; // Reset Databit
wim 37:ce348c002929 2920 }
wim 37:ce348c002929 2921
wim 37:ce348c002929 2922 if (value & 0x04) {
wim 37:ce348c002929 2923 _lcd_bus |= D_LCD_D6; // Set Databit
wim 37:ce348c002929 2924 }
wim 37:ce348c002929 2925 else {
wim 37:ce348c002929 2926 _lcd_bus &= ~D_LCD_D6; // Reset Databit
wim 37:ce348c002929 2927 }
wim 37:ce348c002929 2928
wim 37:ce348c002929 2929 if (value & 0x08) {
wim 37:ce348c002929 2930 _lcd_bus |= D_LCD_D7; // Set Databit
wim 37:ce348c002929 2931 }
wim 37:ce348c002929 2932 else {
wim 37:ce348c002929 2933 _lcd_bus &= ~D_LCD_D7; // Reset Databit
wim 37:ce348c002929 2934 }
wim 37:ce348c002929 2935 }
wim 37:ce348c002929 2936
wim 37:ce348c002929 2937 // Place the 4bit data on the databus
wim 37:ce348c002929 2938 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 2939 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 2940
wim 37:ce348c002929 2941 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 2942 _setDataBits(value);
wim 37:ce348c002929 2943
wim 37:ce348c002929 2944 // Place the 4bit data on the databus
wim 37:ce348c002929 2945 #if (MCP23008==1)
wim 37:ce348c002929 2946 // MCP23008 portexpander
wim 37:ce348c002929 2947
wim 37:ce348c002929 2948 // write the new data to the portexpander
wim 37:ce348c002929 2949 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2950 #else
wim 26:bd897a001012 2951 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2952
wim 21:9eb628d9e164 2953 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 2954 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2955 #endif
wim 21:9eb628d9e164 2956 }
wim 21:9eb628d9e164 2957
wim 37:ce348c002929 2958 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 2959 // Used for mbed I2C bus expander
wim 37:ce348c002929 2960 void TextLCD_I2C::_writeRegister (int reg, int value) {
wim 37:ce348c002929 2961 char data[] = {reg, value};
wim 37:ce348c002929 2962
wim 37:ce348c002929 2963 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 2964 }
wim 37:ce348c002929 2965
wim 37:ce348c002929 2966 //New optimized
wim 37:ce348c002929 2967 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 2968 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 2969
wim 37:ce348c002929 2970 // Write a byte using I2C
wim 37:ce348c002929 2971 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 2972 char data[6];
wim 37:ce348c002929 2973
wim 37:ce348c002929 2974 #if (MCP23008==1)
wim 37:ce348c002929 2975 // MCP23008 portexpander
wim 37:ce348c002929 2976
wim 37:ce348c002929 2977 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 2978 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 2979
wim 37:ce348c002929 2980 _setEnableBit(true); // set E
wim 37:ce348c002929 2981 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 2982 data[1] = _lcd_bus;
wim 37:ce348c002929 2983
wim 37:ce348c002929 2984 _setEnableBit(false); // clear E
wim 37:ce348c002929 2985 data[2] = _lcd_bus;
wim 37:ce348c002929 2986
wim 37:ce348c002929 2987 _setEnableBit(true); // set E
wim 37:ce348c002929 2988 _setDataBits(value); // set data low
wim 37:ce348c002929 2989 data[3] = _lcd_bus;
wim 37:ce348c002929 2990
wim 37:ce348c002929 2991 _setEnableBit(false); // clear E
wim 37:ce348c002929 2992 data[4] = _lcd_bus;
wim 37:ce348c002929 2993
wim 37:ce348c002929 2994 // write the packed data to the I2C portexpander
wim 37:ce348c002929 2995 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 2996 #else
wim 37:ce348c002929 2997 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 2998
wim 37:ce348c002929 2999 _setEnableBit(true); // set E
wim 37:ce348c002929 3000 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3001 data[0] = _lcd_bus;
wim 37:ce348c002929 3002
wim 37:ce348c002929 3003 _setEnableBit(false); // clear E
wim 37:ce348c002929 3004 data[1] = _lcd_bus;
wim 37:ce348c002929 3005
wim 37:ce348c002929 3006 _setEnableBit(true); // set E
wim 37:ce348c002929 3007 _setDataBits(value); // set data low
wim 37:ce348c002929 3008 data[2] = _lcd_bus;
wim 37:ce348c002929 3009
wim 37:ce348c002929 3010 _setEnableBit(false); // clear E
wim 37:ce348c002929 3011 data[3] = _lcd_bus;
wim 37:ce348c002929 3012
wim 37:ce348c002929 3013 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3014 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3015 #endif
wim 37:ce348c002929 3016 }
wim 37:ce348c002929 3017
wim 37:ce348c002929 3018 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3019 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3020
wim 37:ce348c002929 3021
wim 37:ce348c002929 3022 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3023 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3024
wim 37:ce348c002929 3025 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3026 *
wim 37:ce348c002929 3027 * @param spi SPI Bus
wim 37:ce348c002929 3028 * @param cs chip select pin (active low)
wim 37:ce348c002929 3029 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3030 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3031 */
wim 37:ce348c002929 3032 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3033 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3034 _spi(spi),
wim 37:ce348c002929 3035 _cs(cs) {
wim 37:ce348c002929 3036
wim 37:ce348c002929 3037 // Init cs
wim 37:ce348c002929 3038 _cs = 1;
wim 37:ce348c002929 3039
wim 37:ce348c002929 3040 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3041 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3042 _spi->format(8,0);
wim 37:ce348c002929 3043 _spi->frequency(500000);
wim 37:ce348c002929 3044 //_spi.frequency(1000000);
wim 37:ce348c002929 3045
wim 37:ce348c002929 3046 // Init the portexpander bus
wim 37:ce348c002929 3047 _lcd_bus = D_LCD_BUS_DEF;
wim 37:ce348c002929 3048
wim 37:ce348c002929 3049 // write the new data to the portexpander
wim 37:ce348c002929 3050 _cs = 0;
wim 37:ce348c002929 3051 _spi->write(_lcd_bus);
wim 37:ce348c002929 3052 _cs = 1;
wim 37:ce348c002929 3053
wim 37:ce348c002929 3054 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3055 }
wim 37:ce348c002929 3056
wim 37:ce348c002929 3057 // Set E pin (or E2 pin)
wim 37:ce348c002929 3058 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3059 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3060
wim 37:ce348c002929 3061 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3062 if (value) {
wim 37:ce348c002929 3063 _lcd_bus |= D_LCD_E; // Set E bit
wim 37:ce348c002929 3064 }
wim 37:ce348c002929 3065 else {
wim 37:ce348c002929 3066 _lcd_bus &= ~D_LCD_E; // Reset E bit
wim 37:ce348c002929 3067 }
wim 37:ce348c002929 3068 }
wim 37:ce348c002929 3069 else {
wim 37:ce348c002929 3070 if (value) {
wim 37:ce348c002929 3071 _lcd_bus |= D_LCD_E2; // Set E2 bit
wim 37:ce348c002929 3072 }
wim 37:ce348c002929 3073 else {
wim 37:ce348c002929 3074 _lcd_bus &= ~D_LCD_E2; // Reset E2 bit
wim 37:ce348c002929 3075 }
wim 37:ce348c002929 3076 }
wim 37:ce348c002929 3077
wim 37:ce348c002929 3078 // write the new data to the SPI portexpander
wim 37:ce348c002929 3079 _cs = 0;
wim 37:ce348c002929 3080 _spi->write(_lcd_bus);
wim 37:ce348c002929 3081 _cs = 1;
wim 37:ce348c002929 3082 }
wim 37:ce348c002929 3083
wim 37:ce348c002929 3084 // Set RS pin
wim 37:ce348c002929 3085 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3086 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3087
wim 37:ce348c002929 3088 if (value) {
wim 37:ce348c002929 3089 _lcd_bus |= D_LCD_RS; // Set RS bit
wim 37:ce348c002929 3090 }
wim 37:ce348c002929 3091 else {
wim 37:ce348c002929 3092 _lcd_bus &= ~D_LCD_RS; // Reset RS bit
wim 37:ce348c002929 3093 }
wim 37:ce348c002929 3094
wim 37:ce348c002929 3095 // write the new data to the SPI portexpander
wim 37:ce348c002929 3096 _cs = 0;
wim 37:ce348c002929 3097 _spi->write(_lcd_bus);
wim 37:ce348c002929 3098 _cs = 1;
wim 37:ce348c002929 3099 }
wim 37:ce348c002929 3100
wim 37:ce348c002929 3101 // Set BL pin
wim 37:ce348c002929 3102 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3103 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3104
wim 37:ce348c002929 3105 if (value) {
wim 37:ce348c002929 3106 _lcd_bus |= D_LCD_BL; // Set BL bit
wim 37:ce348c002929 3107 }
wim 37:ce348c002929 3108 else {
wim 37:ce348c002929 3109 _lcd_bus &= ~D_LCD_BL; // Reset BL bit
wim 37:ce348c002929 3110 }
wim 37:ce348c002929 3111
wim 37:ce348c002929 3112 // write the new data to the SPI portexpander
wim 37:ce348c002929 3113 _cs = 0;
wim 37:ce348c002929 3114 _spi->write(_lcd_bus);
wim 37:ce348c002929 3115 _cs = 1;
wim 37:ce348c002929 3116 }
wim 21:9eb628d9e164 3117
wim 21:9eb628d9e164 3118 // Place the 4bit data on the databus
wim 37:ce348c002929 3119 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3120 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3121
wim 22:35742ec80c24 3122 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3123 if (value & 0x01) {
wim 22:35742ec80c24 3124 _lcd_bus |= D_LCD_D4; // Set Databit
wim 26:bd897a001012 3125 }
wim 37:ce348c002929 3126 else {
wim 37:ce348c002929 3127 _lcd_bus &= ~D_LCD_D4; // Reset Databit
wim 37:ce348c002929 3128 }
wim 37:ce348c002929 3129
wim 37:ce348c002929 3130 if (value & 0x02) {
wim 22:35742ec80c24 3131 _lcd_bus |= D_LCD_D5; // Set Databit
wim 26:bd897a001012 3132 }
wim 26:bd897a001012 3133 else {
wim 37:ce348c002929 3134 _lcd_bus &= ~D_LCD_D5; // Reset Databit
wim 37:ce348c002929 3135 }
wim 37:ce348c002929 3136
wim 37:ce348c002929 3137 if (value & 0x04) {
wim 22:35742ec80c24 3138 _lcd_bus |= D_LCD_D6; // Set Databit
wim 26:bd897a001012 3139 }
wim 37:ce348c002929 3140 else {
wim 37:ce348c002929 3141 _lcd_bus &= ~D_LCD_D6; // Reset Databit
wim 37:ce348c002929 3142 }
wim 37:ce348c002929 3143
wim 37:ce348c002929 3144 if (value & 0x08) {
wim 22:35742ec80c24 3145 _lcd_bus |= D_LCD_D7; // Set Databit
wim 26:bd897a001012 3146 }
wim 26:bd897a001012 3147 else {
wim 26:bd897a001012 3148 _lcd_bus &= ~D_LCD_D7; // Reset Databit
wim 26:bd897a001012 3149 }
wim 21:9eb628d9e164 3150
wim 37:ce348c002929 3151 // write the new data to the SPI portexpander
wim 37:ce348c002929 3152 _cs = 0;
wim 37:ce348c002929 3153 _spi->write(_lcd_bus);
wim 37:ce348c002929 3154 _cs = 1;
wim 22:35742ec80c24 3155 }
wim 21:9eb628d9e164 3156
wim 37:ce348c002929 3157 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3158 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3159
wim 21:9eb628d9e164 3160
wim 28:30fa94f7341c 3161 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3162 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3163
wim 28:30fa94f7341c 3164 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3165 *
wim 28:30fa94f7341c 3166 * @param i2c I2C Bus
wim 28:30fa94f7341c 3167 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3168 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3169 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3170 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3171 */
wim 28:30fa94f7341c 3172 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3173 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3174
wim 33:900a94bc7585 3175 _i2c(i2c){
wim 30:033048611c01 3176
wim 28:30fa94f7341c 3177 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3178
wim 28:30fa94f7341c 3179 // Setup the I2C bus
wim 29:a3663151aa65 3180 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3181 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3182
wim 30:033048611c01 3183
wim 28:30fa94f7341c 3184 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3185 if (bl != NC) {
wim 28:30fa94f7341c 3186 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3187 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3188 }
wim 28:30fa94f7341c 3189 else {
wim 28:30fa94f7341c 3190 // No Hardware Backlight pin
wim 28:30fa94f7341c 3191 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3192 }
wim 28:30fa94f7341c 3193
wim 30:033048611c01 3194 //Sanity check
wim 30:033048611c01 3195 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3196 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3197 }
wim 30:033048611c01 3198 else {
wim 30:033048611c01 3199 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3200 }
wim 28:30fa94f7341c 3201 }
wim 28:30fa94f7341c 3202
wim 28:30fa94f7341c 3203 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3204 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3205 }
wim 28:30fa94f7341c 3206
wim 28:30fa94f7341c 3207 // Not used in this mode
wim 28:30fa94f7341c 3208 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3209 }
wim 28:30fa94f7341c 3210
wim 28:30fa94f7341c 3211 // Set RS pin
wim 28:30fa94f7341c 3212 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3213 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3214 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3215 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3216 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3217 //
wim 30:033048611c01 3218 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3219 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3220 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3221 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3222 //
wim 30:033048611c01 3223
wim 28:30fa94f7341c 3224 if (value) {
wim 28:30fa94f7341c 3225 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3226 }
wim 28:30fa94f7341c 3227 else {
wim 28:30fa94f7341c 3228 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3229 }
wim 28:30fa94f7341c 3230 }
wim 28:30fa94f7341c 3231
wim 28:30fa94f7341c 3232 // Set BL pin
wim 28:30fa94f7341c 3233 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3234 if (_bl) {
wim 28:30fa94f7341c 3235 _bl->write(value);
wim 28:30fa94f7341c 3236 }
wim 28:30fa94f7341c 3237 }
wim 29:a3663151aa65 3238
wim 29:a3663151aa65 3239 // Not used in this mode
wim 29:a3663151aa65 3240 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3241 }
wim 29:a3663151aa65 3242
wim 28:30fa94f7341c 3243 // Write a byte using I2C
wim 28:30fa94f7341c 3244 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3245 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3246 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3247 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3248 //
wim 30:033048611c01 3249 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3250 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3251 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3252 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3253 //
wim 28:30fa94f7341c 3254 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3255
wim 32:59c4b8f648d4 3256 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3257 //Controllers that support ACK
wim 30:033048611c01 3258 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3259 #else
wim 32:59c4b8f648d4 3260 //Controllers that dont support ACK
wim 37:ce348c002929 3261 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3262 _i2c->start();
wim 32:59c4b8f648d4 3263 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3264 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3265 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3266 _i2c->stop();
wim 32:59c4b8f648d4 3267 #endif
wim 28:30fa94f7341c 3268 }
wim 34:e5a0dcb43ecc 3269 #endif /* Native I2C */
wim 28:30fa94f7341c 3270 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3271
wim 28:30fa94f7341c 3272
wim 25:6162b31128c9 3273 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3274 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3275 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3276 *
Sissors 24:fb3399713710 3277 * @param spi SPI Bus
Sissors 24:fb3399713710 3278 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3279 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3280 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3281 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3282 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3283 */
wim 25:6162b31128c9 3284 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3285 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3286 _spi(spi),
wim 25:6162b31128c9 3287 _cs(cs),
wim 25:6162b31128c9 3288 _rs(rs) {
Sissors 24:fb3399713710 3289
wim 32:59c4b8f648d4 3290 // Init CS
wim 32:59c4b8f648d4 3291 _cs = 1;
wim 32:59c4b8f648d4 3292
wim 36:9f5f86dfd44a 3293 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3294 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3295 // _spi->format(8,3);
wim 37:ce348c002929 3296 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3297 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3298
Sissors 24:fb3399713710 3299 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3300 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3301 _spi->format(8,0);
wim 36:9f5f86dfd44a 3302 // _spi->frequency(500000);
Sissors 24:fb3399713710 3303 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3304
Sissors 24:fb3399713710 3305 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3306 if (bl != NC) {
Sissors 24:fb3399713710 3307 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3308 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3309 }
Sissors 24:fb3399713710 3310 else {
Sissors 24:fb3399713710 3311 // No Hardware Backlight pin
Sissors 24:fb3399713710 3312 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3313 }
wim 30:033048611c01 3314
wim 30:033048611c01 3315 //Sanity check
wim 30:033048611c01 3316 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3317 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3318 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3319 }
wim 30:033048611c01 3320 else {
wim 30:033048611c01 3321 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3322 }
Sissors 24:fb3399713710 3323 }
Sissors 24:fb3399713710 3324
wim 25:6162b31128c9 3325 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3326 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3327 }
Sissors 24:fb3399713710 3328
Sissors 24:fb3399713710 3329 // Not used in this mode
wim 25:6162b31128c9 3330 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3331 }
Sissors 24:fb3399713710 3332
Sissors 24:fb3399713710 3333 // Set RS pin
wim 36:9f5f86dfd44a 3334 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3335 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3336 _rs = value;
Sissors 24:fb3399713710 3337 }
Sissors 24:fb3399713710 3338
Sissors 24:fb3399713710 3339 // Set BL pin
wim 25:6162b31128c9 3340 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3341 if (_bl) {
Sissors 24:fb3399713710 3342 _bl->write(value);
wim 26:bd897a001012 3343 }
Sissors 24:fb3399713710 3344 }
Sissors 24:fb3399713710 3345
wim 29:a3663151aa65 3346 // Not used in this mode
wim 29:a3663151aa65 3347 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3348 }
wim 29:a3663151aa65 3349
Sissors 24:fb3399713710 3350 // Write a byte using SPI
wim 25:6162b31128c9 3351 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3352 _cs = 0;
Sissors 24:fb3399713710 3353 wait_us(1);
Sissors 24:fb3399713710 3354 _spi->write(value);
Sissors 24:fb3399713710 3355 wait_us(1);
Sissors 24:fb3399713710 3356 _cs = 1;
Sissors 24:fb3399713710 3357 }
wim 34:e5a0dcb43ecc 3358 #endif /* Native SPI bus */
wim 25:6162b31128c9 3359 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3360
wim 21:9eb628d9e164 3361
wim 36:9f5f86dfd44a 3362 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3363 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3364
wim 36:9f5f86dfd44a 3365 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3366 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3367 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3368 *
wim 36:9f5f86dfd44a 3369 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3370 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3371 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3372 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3373 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3374 */
wim 36:9f5f86dfd44a 3375 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3376 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3377 _spi(spi),
wim 36:9f5f86dfd44a 3378 _cs(cs) {
wim 36:9f5f86dfd44a 3379
wim 36:9f5f86dfd44a 3380 // Init CS
wim 36:9f5f86dfd44a 3381 _cs = 1;
wim 36:9f5f86dfd44a 3382
wim 36:9f5f86dfd44a 3383 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3384 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3385 // _spi->format(8,3);
wim 37:ce348c002929 3386 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3387 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3388
wim 36:9f5f86dfd44a 3389 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3390 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3391 _spi->format(8,0);
wim 36:9f5f86dfd44a 3392 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3393 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3394
wim 36:9f5f86dfd44a 3395
wim 36:9f5f86dfd44a 3396 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3397 if (bl != NC) {
wim 36:9f5f86dfd44a 3398 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3399 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3400 }
wim 36:9f5f86dfd44a 3401 else {
wim 36:9f5f86dfd44a 3402 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3403 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3404 }
wim 36:9f5f86dfd44a 3405
wim 36:9f5f86dfd44a 3406 //Sanity check
wim 36:9f5f86dfd44a 3407 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3408 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3409 }
wim 36:9f5f86dfd44a 3410 else {
wim 36:9f5f86dfd44a 3411 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3412 }
wim 36:9f5f86dfd44a 3413 }
wim 36:9f5f86dfd44a 3414
wim 36:9f5f86dfd44a 3415 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3416 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3417 }
wim 36:9f5f86dfd44a 3418
wim 36:9f5f86dfd44a 3419 // Not used in this mode
wim 36:9f5f86dfd44a 3420 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3421 }
wim 36:9f5f86dfd44a 3422
wim 36:9f5f86dfd44a 3423 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3424 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3425 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3426
wim 36:9f5f86dfd44a 3427 if (value) {
wim 36:9f5f86dfd44a 3428 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3429 }
wim 36:9f5f86dfd44a 3430 else {
wim 36:9f5f86dfd44a 3431 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3432 }
wim 36:9f5f86dfd44a 3433 }
wim 36:9f5f86dfd44a 3434
wim 36:9f5f86dfd44a 3435 // Set BL pin
wim 36:9f5f86dfd44a 3436 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3437 if (_bl) {
wim 36:9f5f86dfd44a 3438 _bl->write(value);
wim 36:9f5f86dfd44a 3439 }
wim 36:9f5f86dfd44a 3440 }
wim 36:9f5f86dfd44a 3441
wim 36:9f5f86dfd44a 3442 // Not used in this mode
wim 36:9f5f86dfd44a 3443 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3444 }
wim 36:9f5f86dfd44a 3445
wim 36:9f5f86dfd44a 3446 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3447 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3448
wim 36:9f5f86dfd44a 3449 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3450 _cs = 0;
wim 36:9f5f86dfd44a 3451 wait_us(1);
wim 36:9f5f86dfd44a 3452 _spi->write(value);
wim 36:9f5f86dfd44a 3453 wait_us(1);
wim 36:9f5f86dfd44a 3454 _cs = 1;
wim 36:9f5f86dfd44a 3455 }
wim 36:9f5f86dfd44a 3456 else { // Byte is data
wim 36:9f5f86dfd44a 3457 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3458 _cs = 0;
wim 36:9f5f86dfd44a 3459 wait_us(1);
wim 36:9f5f86dfd44a 3460 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3461 wait_us(1);
wim 36:9f5f86dfd44a 3462 _cs = 1;
wim 36:9f5f86dfd44a 3463
wim 36:9f5f86dfd44a 3464 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3465
wim 36:9f5f86dfd44a 3466 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3467 _cs = 0;
wim 36:9f5f86dfd44a 3468 wait_us(1);
wim 36:9f5f86dfd44a 3469 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3470 wait_us(1);
wim 36:9f5f86dfd44a 3471 _cs = 1;
wim 36:9f5f86dfd44a 3472
wim 36:9f5f86dfd44a 3473 wait_us(40);
wim 36:9f5f86dfd44a 3474
wim 36:9f5f86dfd44a 3475 // Write 1 databyte
wim 36:9f5f86dfd44a 3476 _cs = 0;
wim 36:9f5f86dfd44a 3477 wait_us(1);
wim 36:9f5f86dfd44a 3478 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3479 wait_us(1);
wim 36:9f5f86dfd44a 3480 _cs = 1;
wim 36:9f5f86dfd44a 3481
wim 36:9f5f86dfd44a 3482 wait_us(40);
wim 36:9f5f86dfd44a 3483
wim 36:9f5f86dfd44a 3484 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3485 _cs = 0;
wim 36:9f5f86dfd44a 3486 wait_us(1);
wim 36:9f5f86dfd44a 3487 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3488 wait_us(1);
wim 36:9f5f86dfd44a 3489 _cs = 1;
wim 36:9f5f86dfd44a 3490 }
wim 36:9f5f86dfd44a 3491 }
wim 36:9f5f86dfd44a 3492 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3493 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3494
wim 36:9f5f86dfd44a 3495
wim 30:033048611c01 3496 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3497 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3498 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3499
wim 30:033048611c01 3500 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3501 *
wim 30:033048611c01 3502 * @param spi SPI Bus
wim 30:033048611c01 3503 * @param cs chip select pin (active low)
wim 30:033048611c01 3504 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3505 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3506 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3507 */
wim 30:033048611c01 3508 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3509 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3510 _spi(spi),
wim 33:900a94bc7585 3511 _cs(cs) {
wim 32:59c4b8f648d4 3512
wim 32:59c4b8f648d4 3513 // Init CS
wim 32:59c4b8f648d4 3514 _cs = 1;
wim 32:59c4b8f648d4 3515
wim 34:e5a0dcb43ecc 3516 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 3517 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3518 _spi->format(9,3);
wim 30:033048611c01 3519 _spi->frequency(1000000);
wim 30:033048611c01 3520
wim 30:033048611c01 3521 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3522 if (bl != NC) {
wim 30:033048611c01 3523 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3524 _bl->write(0); //Deactivate
wim 30:033048611c01 3525 }
wim 30:033048611c01 3526 else {
wim 30:033048611c01 3527 // No Hardware Backlight pin
wim 30:033048611c01 3528 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3529 }
wim 30:033048611c01 3530
wim 30:033048611c01 3531 //Sanity check
wim 36:9f5f86dfd44a 3532 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 3533 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3534 }
wim 30:033048611c01 3535 else {
wim 30:033048611c01 3536 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 3537 }
wim 30:033048611c01 3538 }
wim 30:033048611c01 3539
wim 30:033048611c01 3540 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 3541 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3542 }
wim 30:033048611c01 3543
wim 30:033048611c01 3544 // Not used in this mode
wim 30:033048611c01 3545 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 3546 }
wim 30:033048611c01 3547
wim 30:033048611c01 3548 // Set RS pin
wim 30:033048611c01 3549 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3550 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 3551 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3552 // b8 b7...........b0
wim 30:033048611c01 3553 // RS command or data
wim 30:033048611c01 3554 //
wim 30:033048611c01 3555 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3556 //
wim 30:033048611c01 3557
wim 30:033048611c01 3558 if (value) {
wim 30:033048611c01 3559 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 3560 }
wim 30:033048611c01 3561 else {
wim 30:033048611c01 3562 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3563 }
wim 30:033048611c01 3564 }
wim 30:033048611c01 3565
wim 30:033048611c01 3566 // Set BL pin
wim 30:033048611c01 3567 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 3568 if (_bl) {
wim 30:033048611c01 3569 _bl->write(value);
wim 30:033048611c01 3570 }
wim 30:033048611c01 3571 }
wim 30:033048611c01 3572
wim 30:033048611c01 3573 // Not used in this mode
wim 30:033048611c01 3574 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 3575 }
wim 30:033048611c01 3576
wim 30:033048611c01 3577 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 3578 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 3579 _cs = 0;
wim 30:033048611c01 3580 wait_us(1);
wim 30:033048611c01 3581 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3582 wait_us(1);
wim 30:033048611c01 3583 _cs = 1;
wim 30:033048611c01 3584 }
wim 34:e5a0dcb43ecc 3585 #endif /* Native SPI bus */
wim 30:033048611c01 3586 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 3587
wim 34:e5a0dcb43ecc 3588
wim 30:033048611c01 3589 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 3590 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 3591
wim 30:033048611c01 3592 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 3593 *
wim 30:033048611c01 3594 * @param spi SPI Bus
wim 30:033048611c01 3595 * @param cs chip select pin (active low)
wim 30:033048611c01 3596 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3597 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3598 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3599 */
wim 30:033048611c01 3600 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3601 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3602 _spi(spi),
wim 30:033048611c01 3603 _cs(cs) {
wim 30:033048611c01 3604
wim 32:59c4b8f648d4 3605 // Init CS
wim 32:59c4b8f648d4 3606 _cs = 1;
wim 32:59c4b8f648d4 3607
wim 30:033048611c01 3608 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 3609 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 3610 _spi->format(10,0);
wim 30:033048611c01 3611 _spi->frequency(1000000);
wim 30:033048611c01 3612
wim 30:033048611c01 3613 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3614 if (bl != NC) {
wim 30:033048611c01 3615 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3616 _bl->write(0); //Deactivate
wim 30:033048611c01 3617 }
wim 30:033048611c01 3618 else {
wim 30:033048611c01 3619 // No Hardware Backlight pin
wim 30:033048611c01 3620 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3621 }
wim 30:033048611c01 3622
wim 30:033048611c01 3623 //Sanity check
wim 30:033048611c01 3624 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 3625 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3626 }
wim 30:033048611c01 3627 else {
wim 30:033048611c01 3628 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 3629 }
wim 30:033048611c01 3630 }
wim 30:033048611c01 3631
wim 30:033048611c01 3632 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 3633 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3634 }
wim 30:033048611c01 3635
wim 30:033048611c01 3636 // Not used in this mode
wim 30:033048611c01 3637 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 3638 }
wim 30:033048611c01 3639
wim 30:033048611c01 3640 // Set RS pin
wim 30:033048611c01 3641 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3642 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 3643 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3644 // b9 b8 b7...........b0
wim 30:033048611c01 3645 // RS RW command or data
wim 30:033048611c01 3646 //
wim 30:033048611c01 3647 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3648 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 3649 //
wim 30:033048611c01 3650
wim 30:033048611c01 3651 if (value) {
wim 30:033048611c01 3652 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 3653 }
wim 30:033048611c01 3654 else {
wim 30:033048611c01 3655 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3656 }
wim 30:033048611c01 3657 }
wim 30:033048611c01 3658
wim 30:033048611c01 3659 // Set BL pin
wim 30:033048611c01 3660 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 3661 if (_bl) {
wim 30:033048611c01 3662 _bl->write(value);
wim 30:033048611c01 3663 }
wim 30:033048611c01 3664 }
wim 30:033048611c01 3665
wim 30:033048611c01 3666 // Not used in this mode
wim 30:033048611c01 3667 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 3668 }
wim 30:033048611c01 3669
wim 30:033048611c01 3670 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 3671 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 3672 _cs = 0;
wim 30:033048611c01 3673 wait_us(1);
wim 30:033048611c01 3674 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3675 wait_us(1);
wim 30:033048611c01 3676 _cs = 1;
wim 30:033048611c01 3677 }
wim 34:e5a0dcb43ecc 3678 #endif /* Native SPI bus */
wim 30:033048611c01 3679 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 3680
wim 32:59c4b8f648d4 3681
wim 32:59c4b8f648d4 3682 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 3683 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3684
wim 32:59c4b8f648d4 3685 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 3686 *
wim 32:59c4b8f648d4 3687 * @param spi SPI Bus
wim 32:59c4b8f648d4 3688 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3689 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3690 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3691 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 3692 */
wim 32:59c4b8f648d4 3693 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3694 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3695 _spi(spi),
wim 32:59c4b8f648d4 3696 _cs(cs) {
wim 32:59c4b8f648d4 3697
wim 32:59c4b8f648d4 3698 // Init CS
wim 32:59c4b8f648d4 3699 _cs = 1;
wim 32:59c4b8f648d4 3700
wim 32:59c4b8f648d4 3701 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 3702 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3703 _spi->format(8,0);
wim 32:59c4b8f648d4 3704 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3705
wim 32:59c4b8f648d4 3706 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3707 if (bl != NC) {
wim 32:59c4b8f648d4 3708 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3709 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3710 }
wim 32:59c4b8f648d4 3711 else {
wim 32:59c4b8f648d4 3712 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3713 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3714 }
wim 32:59c4b8f648d4 3715
wim 32:59c4b8f648d4 3716 //Sanity check
wim 32:59c4b8f648d4 3717 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 3718 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3719 }
wim 32:59c4b8f648d4 3720 else {
wim 32:59c4b8f648d4 3721 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 3722 }
wim 32:59c4b8f648d4 3723 }
wim 32:59c4b8f648d4 3724
wim 32:59c4b8f648d4 3725 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 3726 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3727 }
wim 32:59c4b8f648d4 3728
wim 32:59c4b8f648d4 3729 // Not used in this mode
wim 32:59c4b8f648d4 3730 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 3731 }
wim 32:59c4b8f648d4 3732
wim 32:59c4b8f648d4 3733 // Set RS pin
wim 32:59c4b8f648d4 3734 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3735 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 3736 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 3737 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3738 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3739 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 3740 //
wim 32:59c4b8f648d4 3741 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3742 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3743 //
wim 32:59c4b8f648d4 3744
wim 32:59c4b8f648d4 3745 if (value) {
wim 32:59c4b8f648d4 3746 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3747 }
wim 32:59c4b8f648d4 3748 else {
wim 32:59c4b8f648d4 3749 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 3750 }
wim 32:59c4b8f648d4 3751 }
wim 32:59c4b8f648d4 3752
wim 32:59c4b8f648d4 3753 // Set BL pin
wim 32:59c4b8f648d4 3754 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 3755 if (_bl) {
wim 32:59c4b8f648d4 3756 _bl->write(value);
wim 32:59c4b8f648d4 3757 }
wim 32:59c4b8f648d4 3758 }
wim 32:59c4b8f648d4 3759
wim 32:59c4b8f648d4 3760 // Not used in this mode
wim 32:59c4b8f648d4 3761 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 3762 }
wim 34:e5a0dcb43ecc 3763
wim 32:59c4b8f648d4 3764 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 3765 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 3766 _cs = 0;
wim 32:59c4b8f648d4 3767 wait_us(1);
wim 32:59c4b8f648d4 3768
wim 32:59c4b8f648d4 3769 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3770
wim 32:59c4b8f648d4 3771 _spi->write(value);
wim 32:59c4b8f648d4 3772
wim 32:59c4b8f648d4 3773 wait_us(1);
wim 32:59c4b8f648d4 3774 _cs = 1;
wim 32:59c4b8f648d4 3775 }
wim 34:e5a0dcb43ecc 3776 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3777 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 3778
wim 34:e5a0dcb43ecc 3779
wim 32:59c4b8f648d4 3780 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 3781 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3782
wim 32:59c4b8f648d4 3783 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 3784 *
wim 32:59c4b8f648d4 3785 * @param spi SPI Bus
wim 32:59c4b8f648d4 3786 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3787 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3788 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3789 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 3790 */
wim 32:59c4b8f648d4 3791 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3792 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3793 _spi(spi),
wim 32:59c4b8f648d4 3794 _cs(cs) {
wim 32:59c4b8f648d4 3795
wim 32:59c4b8f648d4 3796 // Init CS
wim 32:59c4b8f648d4 3797 _cs = 1;
wim 32:59c4b8f648d4 3798
wim 34:e5a0dcb43ecc 3799 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 3800 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 3801 _spi->format(8,3);
wim 32:59c4b8f648d4 3802 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3803
wim 32:59c4b8f648d4 3804 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3805 if (bl != NC) {
wim 32:59c4b8f648d4 3806 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3807 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3808 }
wim 32:59c4b8f648d4 3809 else {
wim 32:59c4b8f648d4 3810 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3811 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3812 }
wim 32:59c4b8f648d4 3813
wim 32:59c4b8f648d4 3814 //Sanity check
wim 32:59c4b8f648d4 3815 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 3816 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3817 }
wim 32:59c4b8f648d4 3818 else {
wim 32:59c4b8f648d4 3819 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 3820 }
wim 32:59c4b8f648d4 3821 }
wim 32:59c4b8f648d4 3822
wim 32:59c4b8f648d4 3823 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 3824 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3825 }
wim 32:59c4b8f648d4 3826
wim 32:59c4b8f648d4 3827 // Not used in this mode
wim 32:59c4b8f648d4 3828 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 3829 }
wim 32:59c4b8f648d4 3830
wim 32:59c4b8f648d4 3831 // Set RS pin
wim 32:59c4b8f648d4 3832 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3833 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 3834 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 3835 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3836 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3837 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 3838 //
wim 32:59c4b8f648d4 3839 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3840 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3841 //
wim 32:59c4b8f648d4 3842 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 3843
wim 32:59c4b8f648d4 3844 if (value) {
wim 32:59c4b8f648d4 3845 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3846 }
wim 32:59c4b8f648d4 3847 else {
wim 32:59c4b8f648d4 3848 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 3849 }
wim 32:59c4b8f648d4 3850 }
wim 32:59c4b8f648d4 3851
wim 32:59c4b8f648d4 3852 // Set BL pin
wim 32:59c4b8f648d4 3853 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 3854 if (_bl) {
wim 32:59c4b8f648d4 3855 _bl->write(value);
wim 32:59c4b8f648d4 3856 }
wim 32:59c4b8f648d4 3857 }
wim 32:59c4b8f648d4 3858
wim 32:59c4b8f648d4 3859 // Not used in this mode
wim 32:59c4b8f648d4 3860 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 3861 }
wim 32:59c4b8f648d4 3862
wim 32:59c4b8f648d4 3863 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 3864 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 3865
wim 32:59c4b8f648d4 3866 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 3867 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 3868 _cs = 0;
wim 32:59c4b8f648d4 3869 wait_us(1);
wim 32:59c4b8f648d4 3870 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3871
wim 32:59c4b8f648d4 3872 //Map and send the LSB nibble
wim 32:59c4b8f648d4 3873 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 3874
wim 32:59c4b8f648d4 3875 //Map and send the MSB nibble
wim 32:59c4b8f648d4 3876 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 3877
wim 32:59c4b8f648d4 3878 wait_us(1);
wim 32:59c4b8f648d4 3879 _cs = 1;
wim 32:59c4b8f648d4 3880 }
wim 34:e5a0dcb43ecc 3881 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3882 //------- End TextLCD_SPI_N_3_24 ----------