Uchida Masayuki / Mbed 2 deprecated FootileSoftware

test

Dependencies:   mbed

DRV2605.h@0:03cdee95fb5a, 2018-05-30 (annotated)

Committer:
Uchida0923
Date:
Wed May 30 02:34:33 2018 +0000
Revision:
0:03cdee95fb5a
???????;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Uchida0923 0:03cdee95fb5a 1 /*
Uchida0923 0:03cdee95fb5a 2 Taku Hachisu 06/01/2017
Uchida0923 0:03cdee95fb5a 3 Modifined by Masayuki Uchida 10/18/2017
Uchida0923 0:03cdee95fb5a 4
Uchida0923 0:03cdee95fb5a 5 Library for the TI DRV2605L for LRA
Uchida0923 0:03cdee95fb5a 6 Modifined from Bryce WilliamsBryce Williams's code
Uchida0923 0:03cdee95fb5a 7
Uchida0923 0:03cdee95fb5a 8 References:
Uchida0923 0:03cdee95fb5a 9 http://www.ti.com/product/DRV2605L/description&lpos=Middle_Container&lid=Alternative_Devices
Uchida0923 0:03cdee95fb5a 10 http://www.ti.com/lit/ds/symlink/drv2605l.pdf (Datasheet)
Uchida0923 0:03cdee95fb5a 11 http://www.ti.com/lit/an/sloa189/sloa189.pdf (Setup Guide; SLOA189)
Uchida0923 0:03cdee95fb5a 12 https://developer.mbed.org/users/electromotivated/code/DRV2605/
Uchida0923 0:03cdee95fb5a 13 */
Uchida0923 0:03cdee95fb5a 14
Uchida0923 0:03cdee95fb5a 15 #ifndef DRV2605_H
Uchida0923 0:03cdee95fb5a 16 #define DRV2605_H
Uchida0923 0:03cdee95fb5a 17
Uchida0923 0:03cdee95fb5a 18 #include "mbed.h"
Uchida0923 0:03cdee95fb5a 19
Uchida0923 0:03cdee95fb5a 20 /******************************************************************************
Uchida0923 0:03cdee95fb5a 21 ***** DRV2605 Addresses
Uchida0923 0:03cdee95fb5a 22 ******************************************************************************/
Uchida0923 0:03cdee95fb5a 23 #define SLAVE_ADDR_7_BIT 0x5A // 7-bit slave address
Uchida0923 0:03cdee95fb5a 24
Uchida0923 0:03cdee95fb5a 25 /******************************************************************************
Uchida0923 0:03cdee95fb5a 26 ****** DRV2605 REGISTERS ******************************************************
Uchida0923 0:03cdee95fb5a 27 ******************************************************************************/
Uchida0923 0:03cdee95fb5a 28 #define STATUS 0x00
Uchida0923 0:03cdee95fb5a 29 #define MODE 0x01
Uchida0923 0:03cdee95fb5a 30 #define REAL_TIME_PLAYBACK 0x02
Uchida0923 0:03cdee95fb5a 31 #define LIBRARY_SELECTION 0x03
Uchida0923 0:03cdee95fb5a 32 #define WAVEFORM_SEQUENCER_1 0x04
Uchida0923 0:03cdee95fb5a 33 #define WAVEFORM_SEQUENCER_2 0x05
Uchida0923 0:03cdee95fb5a 34 #define WAVEFORM_SEQUENCER_3 0x06
Uchida0923 0:03cdee95fb5a 35 #define WAVEFORM_SEQUENCER_4 0x07
Uchida0923 0:03cdee95fb5a 36 #define WAVEFORM_SEQUENCER_5 0x08
Uchida0923 0:03cdee95fb5a 37 #define WAVEFORM_SEQUENCER_6 0x09
Uchida0923 0:03cdee95fb5a 38 #define WAVEFORM_SEQUENCER_7 0x0A
Uchida0923 0:03cdee95fb5a 39 #define WAVEFORM_SEQUENCER_8 0x0B
Uchida0923 0:03cdee95fb5a 40 #define GO 0x0C
Uchida0923 0:03cdee95fb5a 41 #define OVERDRIVE_TIME_OFFSET 0x0D
Uchida0923 0:03cdee95fb5a 42 #define POSITIVE_SUSTAIN_TIME_OFFSET 0x0E
Uchida0923 0:03cdee95fb5a 43 #define NEGATIVE_SUSTAIN_TIME_OFFSET 0x0F
Uchida0923 0:03cdee95fb5a 44 #define BRAKE_TIME_OFFSET 0x10
Uchida0923 0:03cdee95fb5a 45 #define AUDIO_TO_VIBE_CONTROL 0x11
Uchida0923 0:03cdee95fb5a 46 #define AUDIO_TO_VIBE_MINIMUM_INPUT_LEVEL 0x12
Uchida0923 0:03cdee95fb5a 47 #define AUDIO_TO_VIBE_MAXIMUM_INPUT_LEVEL 0x13
Uchida0923 0:03cdee95fb5a 48 #define AUDIO_TO_VIBE_MINIMUM_OUPUT_DRIVE 0x14
Uchida0923 0:03cdee95fb5a 49 #define AUDIO_TO_VIBE_MAXIMUM_OUTPUT_DRIVE 0x15
Uchida0923 0:03cdee95fb5a 50 #define RATED_VOLTAGE 0x16
Uchida0923 0:03cdee95fb5a 51 #define OVERDRIVE_CLAMP_VOLTAGE 0x17
Uchida0923 0:03cdee95fb5a 52 #define AUTO_CALIBRATION_COMPENSATION_RESULT 0x18
Uchida0923 0:03cdee95fb5a 53 #define AUTO_CALIBRATION_BACK_EMF_RESULT 0x19
Uchida0923 0:03cdee95fb5a 54 #define FEEDBACK_CONTROL 0x1A
Uchida0923 0:03cdee95fb5a 55 #define CONTROL 0x1B
Uchida0923 0:03cdee95fb5a 56 #define CONTROL2 0x1C
Uchida0923 0:03cdee95fb5a 57 #define CONTROL3 0x1D
Uchida0923 0:03cdee95fb5a 58 #define CONTROL4 0x1E
Uchida0923 0:03cdee95fb5a 59 #define CONTROL5 0x1F
Uchida0923 0:03cdee95fb5a 60 #define LRA_OPEN_LOOP_PERIOD 0x20
Uchida0923 0:03cdee95fb5a 61 #define VBAT_VOLTAGE_MONITOR 0x21
Uchida0923 0:03cdee95fb5a 62 #define LRA_RESONANCE_PERIOD 0x22
Uchida0923 0:03cdee95fb5a 63
Uchida0923 0:03cdee95fb5a 64 class DRV2605{
Uchida0923 0:03cdee95fb5a 65
Uchida0923 0:03cdee95fb5a 66 public:
Uchida0923 0:03cdee95fb5a 67 //// modes defines the possible modes of the DRV2605L
Uchida0923 0:03cdee95fb5a 68 enum Mode{
Uchida0923 0:03cdee95fb5a 69 INTERNAL_TRIG, // 0x00: Waveforms fired by Setting GO bit in Register 0x0C
Uchida0923 0:03cdee95fb5a 70 EXTERNAL_EDGE, // 0x01: Rising Edge on IN/TRIG pin set GO Bit.
Uchida0923 0:03cdee95fb5a 71 EXTERNAL_LEVEL, // 0x02: GO bit follows state of edge on IN/TRIG pin.
Uchida0923 0:03cdee95fb5a 72 PWM_ANALOG, // 0x03: PWM or Analog Signal accepted at IN/TRIG pin.
Uchida0923 0:03cdee95fb5a 73 AUDIO_TO_VIBE, // 0x04: An AC-coupled audio signal is accepted at the IN/TRIG pin.
Uchida0923 0:03cdee95fb5a 74 RTP, // 0x05: Real- Time Playback
Uchida0923 0:03cdee95fb5a 75 DIAG, // 0x06: Set to perform actuator diagnostics
Uchida0923 0:03cdee95fb5a 76 AUTO_CAL, // 0x07: Set to perform auto calibration of device for actuator
Uchida0923 0:03cdee95fb5a 77 STANDBY = 0x40, // 0x40: Set Device to Software Standby (Low- Power Mode)
Uchida0923 0:03cdee95fb5a 78 RESET = 0x80, // 0x80: Reset Device (equivalent of power cycling the device)
Uchida0923 0:03cdee95fb5a 79 };
Uchida0923 0:03cdee95fb5a 80
Uchida0923 0:03cdee95fb5a 81 //// FeedBack_Controls Fields Bitmasks (Register Addr: 0x1A)
Uchida0923 0:03cdee95fb5a 82 enum Actuator_Type{ERM = 0, LRA = 0x80}; // bit-7
Uchida0923 0:03cdee95fb5a 83 enum Brake_Factor{x1 = 0x00, x2 = 0x10, x3 = 0x20,
Uchida0923 0:03cdee95fb5a 84 x4 = 0x40, x6 = 0x80, x8 = 0x50,
Uchida0923 0:03cdee95fb5a 85 x16 = 0x60, DISABLE = 0x70}; // bit-6..4
Uchida0923 0:03cdee95fb5a 86 enum Loop_Gain{LOW = 0x00,
Uchida0923 0:03cdee95fb5a 87 MED = 0x04,
Uchida0923 0:03cdee95fb5a 88 HIGH = 0x08,
Uchida0923 0:03cdee95fb5a 89 VERY_HIGH = 0x0C}; // bit-3..2
Uchida0923 0:03cdee95fb5a 90
Uchida0923 0:03cdee95fb5a 91 enum Library{EMPTY, A, B, C, D, E,
Uchida0923 0:03cdee95fb5a 92 LRA_LIB, F}; // ROM Waveform Library Selections
Uchida0923 0:03cdee95fb5a 93
Uchida0923 0:03cdee95fb5a 94 enum AUD {
Uchida0923 0:03cdee95fb5a 95 a=0x00,b=0x44,c=0x55
Uchida0923 0:03cdee95fb5a 96 };
Uchida0923 0:03cdee95fb5a 97
Uchida0923 0:03cdee95fb5a 98 /**
Uchida0923 0:03cdee95fb5a 99 Constructor for DRV2605 Objects
Uchida0923 0:03cdee95fb5a 100 */
Uchida0923 0:03cdee95fb5a 101 DRV2605(PinName sda, PinName scl, PinName en);
Uchida0923 0:03cdee95fb5a 102
Uchida0923 0:03cdee95fb5a 103 /**
Uchida0923 0:03cdee95fb5a 104 Write value to specified register of device
Uchida0923 0:03cdee95fb5a 105 @param reg The device register to write
Uchida0923 0:03cdee95fb5a 106 @param value The value to write to the register
Uchida0923 0:03cdee95fb5a 107 */
Uchida0923 0:03cdee95fb5a 108 void i2cWriteByte(char reg, char value);
Uchida0923 0:03cdee95fb5a 109
Uchida0923 0:03cdee95fb5a 110 /**
Uchida0923 0:03cdee95fb5a 111 Read value from register of device
Uchida0923 0:03cdee95fb5a 112 @param reg The device register to read
Uchida0923 0:03cdee95fb5a 113 @return The result
Uchida0923 0:03cdee95fb5a 114 */
Uchida0923 0:03cdee95fb5a 115 uint8_t i2cReadByte(char reg);
Uchida0923 0:03cdee95fb5a 116
Uchida0923 0:03cdee95fb5a 117 /**
Uchida0923 0:03cdee95fb5a 118 Place device into specified mode
Uchida0923 0:03cdee95fb5a 119 @param mode The mode to place device into
Uchida0923 0:03cdee95fb5a 120 */
Uchida0923 0:03cdee95fb5a 121 void mode(Mode mode);
Uchida0923 0:03cdee95fb5a 122
Uchida0923 0:03cdee95fb5a 123 /**
Uchida0923 0:03cdee95fb5a 124 TODO: Expand to allow initialization for LRAs and Closed Loop operation
Uchida0923 0:03cdee95fb5a 125 Initialize the device for Open- Loop ERM mode using specified ROM
Uchida0923 0:03cdee95fb5a 126 Waveform Library as specified in Section 9.3 of Device Datasheet.
Uchida0923 0:03cdee95fb5a 127 See also Device Setup Guide 1.6.1 ERM Initialization Example
Uchida0923 0:03cdee95fb5a 128 @param actuator_peak_voltage The Peak Voltage Rating of Actuator
Uchida0923 0:03cdee95fb5a 129 @param lib The ROM Waveform Library to use
Uchida0923 0:03cdee95fb5a 130 */
Uchida0923 0:03cdee95fb5a 131 int init(float actuator_peak_voltage, Library lib = B);
Uchida0923 0:03cdee95fb5a 132
Uchida0923 0:03cdee95fb5a 133 /**
Uchida0923 0:03cdee95fb5a 134 Runs diagnostics on the Actuator and Device and returns the results.
Uchida0923 0:03cdee95fb5a 135 The results indicate if an actuator is detected, over- current events,
Uchida0923 0:03cdee95fb5a 136 etc. Refer to STATUS Register (0x00) in device datasheet for more
Uchida0923 0:03cdee95fb5a 137 description register values.
Uchida0923 0:03cdee95fb5a 138
Uchida0923 0:03cdee95fb5a 139 Note: This should be run if the user is having trouble getting the actuator
Uchida0923 0:03cdee95fb5a 140 to work.
Uchida0923 0:03cdee95fb5a 141
Uchida0923 0:03cdee95fb5a 142 @return The results of the diagnostics (i.e. Status Reg (0x00))
Uchida0923 0:03cdee95fb5a 143 */
Uchida0923 0:03cdee95fb5a 144 uint8_t diagnostics();
Uchida0923 0:03cdee95fb5a 145
Uchida0923 0:03cdee95fb5a 146 /**
Uchida0923 0:03cdee95fb5a 147 Play single waveform from ROM Library as outlined in Section 9.3.2.1
Uchida0923 0:03cdee95fb5a 148 of Device Datasheet.
Uchida0923 0:03cdee95fb5a 149 The library used is the one that is currently written
Uchida0923 0:03cdee95fb5a 150 to the Library_Selection Register (0x03). This library
Uchida0923 0:03cdee95fb5a 151 is set in the init(Library lib) method, but can be
Uchida0923 0:03cdee95fb5a 152 changed manually.
Uchida0923 0:03cdee95fb5a 153 @param waveform_effect The Waveform Effect Library Index value to play
Uchida0923 0:03cdee95fb5a 154 (valid values are 1 to 123)
Uchida0923 0:03cdee95fb5a 155 */
Uchida0923 0:03cdee95fb5a 156 void play_waveform(int waveform_effect);
Uchida0923 0:03cdee95fb5a 157
Uchida0923 0:03cdee95fb5a 158 /**
Uchida0923 0:03cdee95fb5a 159 Load Wave Sequence into DRV2605 Sequence Registers
Uchida0923 0:03cdee95fb5a 160 @param effect1... effect8 The effect to play. Valid inputs are
Uchida0923 0:03cdee95fb5a 161 0 to 123; 0: Stop Condition,
Uchida0923 0:03cdee95fb5a 162 1- 123: Waveform Index
Uchida0923 0:03cdee95fb5a 163 */
Uchida0923 0:03cdee95fb5a 164 void load_waveform_sequence(int effect1 = 0, int effect2 = 0,
Uchida0923 0:03cdee95fb5a 165 int effect3 = 0, int effect4 = 0,
Uchida0923 0:03cdee95fb5a 166 int effect5 = 0, int effect6 = 0,
Uchida0923 0:03cdee95fb5a 167 int effect7 = 0, int effect8 = 0);
Uchida0923 0:03cdee95fb5a 168
Uchida0923 0:03cdee95fb5a 169 /**
Uchida0923 0:03cdee95fb5a 170 Plays the currently loaded waveform or waveform sequence.
Uchida0923 0:03cdee95fb5a 171 Call this after calling play_waveform() or after calling
Uchida0923 0:03cdee95fb5a 172 load_waveform_sequence()
Uchida0923 0:03cdee95fb5a 173 Preconditions: User must have already loaded waveform(s)
Uchida0923 0:03cdee95fb5a 174 using play_waveform() or load_waveform_sequence()
Uchida0923 0:03cdee95fb5a 175 */
Uchida0923 0:03cdee95fb5a 176 void play();
Uchida0923 0:03cdee95fb5a 177
Uchida0923 0:03cdee95fb5a 178 /**
Uchida0923 0:03cdee95fb5a 179 hogehoge
Uchida0923 0:03cdee95fb5a 180 */
Uchida0923 0:03cdee95fb5a 181 void rtp(char amp);
Uchida0923 0:03cdee95fb5a 182
Uchida0923 0:03cdee95fb5a 183 /**
Uchida0923 0:03cdee95fb5a 184 TODO: Add Closed Loop Calibration
Uchida0923 0:03cdee95fb5a 185
Uchida0923 0:03cdee95fb5a 186 Run basic DRV2605L Auto- Calibration as detailed in Section 2 of
Uchida0923 0:03cdee95fb5a 187 the Device Setup Guide for OPEN- LOOP ONLY.
Uchida0923 0:03cdee95fb5a 188 This must be done before using the device in closed- loop mode
Uchida0923 0:03cdee95fb5a 189 (unless cal has been done before with values stored in non-volatile
Uchida0923 0:03cdee95fb5a 190 mem; see datasheet for more info).
Uchida0923 0:03cdee95fb5a 191
Uchida0923 0:03cdee95fb5a 192 NOTE: It is NOT recommended to store cal values into device
Uchida0923 0:03cdee95fb5a 193 non-volatile memory as this can be done only once. Thus do not
Uchida0923 0:03cdee95fb5a 194 use this feature unless the device is being used in a final
Uchida0923 0:03cdee95fb5a 195 project AND values have been confirmed to result in satisfactory
Uchida0923 0:03cdee95fb5a 196 performance).
Uchida0923 0:03cdee95fb5a 197
Uchida0923 0:03cdee95fb5a 198 This uses many of the default device register values such as
Uchida0923 0:03cdee95fb5a 199 the default DRIVE_TIME .
Uchida0923 0:03cdee95fb5a 200
Uchida0923 0:03cdee95fb5a 201 @param actuator_peak_voltage The maximum/peak voltage rating of the actuator
Uchida0923 0:03cdee95fb5a 202 */
Uchida0923 0:03cdee95fb5a 203 uint8_t auto_cal_open_loop(float actuator_peak_voltage);
Uchida0923 0:03cdee95fb5a 204
Uchida0923 0:03cdee95fb5a 205 private:
Uchida0923 0:03cdee95fb5a 206 I2C i2c;
Uchida0923 0:03cdee95fb5a 207 DigitalOut _en;
Uchida0923 0:03cdee95fb5a 208 };
Uchida0923 0:03cdee95fb5a 209
Uchida0923 0:03cdee95fb5a 210 #endif