Example for reading and writing SD card using SPI mode.

Dependencies:   mbed

Fork of Demo_NucleoF4xx_SD_Card by 不韋 呂

Committer:
Timoteo
Date:
Thu Dec 01 14:09:19 2016 +0000
Revision:
2:849ac2c01cb1
Parent:
0:08b4a59451e5
mbed error

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:08b4a59451e5 1 /* mbed Microcontroller Library
MikamiUitOpen 0:08b4a59451e5 2 * Copyright (c) 2006-2012 ARM Limited
MikamiUitOpen 0:08b4a59451e5 3 *
MikamiUitOpen 0:08b4a59451e5 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
MikamiUitOpen 0:08b4a59451e5 5 * of this software and associated documentation files (the "Software"), to deal
MikamiUitOpen 0:08b4a59451e5 6 * in the Software without restriction, including without limitation the rights
MikamiUitOpen 0:08b4a59451e5 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
MikamiUitOpen 0:08b4a59451e5 8 * copies of the Software, and to permit persons to whom the Software is
MikamiUitOpen 0:08b4a59451e5 9 * furnished to do so, subject to the following conditions:
MikamiUitOpen 0:08b4a59451e5 10 *
MikamiUitOpen 0:08b4a59451e5 11 * The above copyright notice and this permission notice shall be included in
MikamiUitOpen 0:08b4a59451e5 12 * all copies or substantial portions of the Software.
MikamiUitOpen 0:08b4a59451e5 13 *
MikamiUitOpen 0:08b4a59451e5 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
MikamiUitOpen 0:08b4a59451e5 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
MikamiUitOpen 0:08b4a59451e5 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
MikamiUitOpen 0:08b4a59451e5 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
MikamiUitOpen 0:08b4a59451e5 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
MikamiUitOpen 0:08b4a59451e5 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
MikamiUitOpen 0:08b4a59451e5 20 * SOFTWARE.
MikamiUitOpen 0:08b4a59451e5 21 */
MikamiUitOpen 0:08b4a59451e5 22
MikamiUitOpen 0:08b4a59451e5 23 /* Introduction
MikamiUitOpen 0:08b4a59451e5 24 * ------------
MikamiUitOpen 0:08b4a59451e5 25 * SD and MMC cards support a number of interfaces, but common to them all
MikamiUitOpen 0:08b4a59451e5 26 * is one based on SPI. This is the one I'm implmenting because it means
MikamiUitOpen 0:08b4a59451e5 27 * it is much more portable even though not so performant, and we already
MikamiUitOpen 0:08b4a59451e5 28 * have the mbed SPI Interface!
MikamiUitOpen 0:08b4a59451e5 29 *
MikamiUitOpen 0:08b4a59451e5 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
MikamiUitOpen 0:08b4a59451e5 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
MikamiUitOpen 0:08b4a59451e5 32 *
MikamiUitOpen 0:08b4a59451e5 33 * SPI Startup
MikamiUitOpen 0:08b4a59451e5 34 * -----------
MikamiUitOpen 0:08b4a59451e5 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
MikamiUitOpen 0:08b4a59451e5 36 * asserting CS low and sending the reset command (CMD0). The card will
MikamiUitOpen 0:08b4a59451e5 37 * respond with a (R1) response.
MikamiUitOpen 0:08b4a59451e5 38 *
MikamiUitOpen 0:08b4a59451e5 39 * CMD8 is optionally sent to determine the voltage range supported, and
MikamiUitOpen 0:08b4a59451e5 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
MikamiUitOpen 0:08b4a59451e5 41 * version 2.x. I'll just ignore this for now.
MikamiUitOpen 0:08b4a59451e5 42 *
MikamiUitOpen 0:08b4a59451e5 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
MikamiUitOpen 0:08b4a59451e5 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
MikamiUitOpen 0:08b4a59451e5 45 *
MikamiUitOpen 0:08b4a59451e5 46 * You should also indicate whether the host supports High Capicity cards,
MikamiUitOpen 0:08b4a59451e5 47 * and check whether the card is high capacity - i'll also ignore this
MikamiUitOpen 0:08b4a59451e5 48 *
MikamiUitOpen 0:08b4a59451e5 49 * SPI Protocol
MikamiUitOpen 0:08b4a59451e5 50 * ------------
MikamiUitOpen 0:08b4a59451e5 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
MikamiUitOpen 0:08b4a59451e5 52 * the host starting every bus transaction by asserting the CS signal low. The
MikamiUitOpen 0:08b4a59451e5 53 * card always responds to commands, data blocks and errors.
MikamiUitOpen 0:08b4a59451e5 54 *
MikamiUitOpen 0:08b4a59451e5 55 * The protocol supports a CRC, but by default it is off (except for the
MikamiUitOpen 0:08b4a59451e5 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
MikamiUitOpen 0:08b4a59451e5 57 * I'll leave the CRC off I think!
MikamiUitOpen 0:08b4a59451e5 58 *
MikamiUitOpen 0:08b4a59451e5 59 * Standard capacity cards have variable data block sizes, whereas High
MikamiUitOpen 0:08b4a59451e5 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
MikamiUitOpen 0:08b4a59451e5 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
MikamiUitOpen 0:08b4a59451e5 62 * This is set with CMD16.
MikamiUitOpen 0:08b4a59451e5 63 *
MikamiUitOpen 0:08b4a59451e5 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
MikamiUitOpen 0:08b4a59451e5 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
MikamiUitOpen 0:08b4a59451e5 66 * the card gets a read command, it responds with a response token, and then
MikamiUitOpen 0:08b4a59451e5 67 * a data token or an error.
MikamiUitOpen 0:08b4a59451e5 68 *
MikamiUitOpen 0:08b4a59451e5 69 * SPI Command Format
MikamiUitOpen 0:08b4a59451e5 70 * ------------------
MikamiUitOpen 0:08b4a59451e5 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
MikamiUitOpen 0:08b4a59451e5 72 *
MikamiUitOpen 0:08b4a59451e5 73 * +---------------+------------+------------+-----------+----------+--------------+
MikamiUitOpen 0:08b4a59451e5 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
MikamiUitOpen 0:08b4a59451e5 75 * +---------------+------------+------------+-----------+----------+--------------+
MikamiUitOpen 0:08b4a59451e5 76 *
MikamiUitOpen 0:08b4a59451e5 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
MikamiUitOpen 0:08b4a59451e5 78 *
MikamiUitOpen 0:08b4a59451e5 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
MikamiUitOpen 0:08b4a59451e5 80 *
MikamiUitOpen 0:08b4a59451e5 81 * SPI Response Format
MikamiUitOpen 0:08b4a59451e5 82 * -------------------
MikamiUitOpen 0:08b4a59451e5 83 * The main response format (R1) is a status byte (normally zero). Key flags:
MikamiUitOpen 0:08b4a59451e5 84 * idle - 1 if the card is in an idle state/initialising
MikamiUitOpen 0:08b4a59451e5 85 * cmd - 1 if an illegal command code was detected
MikamiUitOpen 0:08b4a59451e5 86 *
MikamiUitOpen 0:08b4a59451e5 87 * +-------------------------------------------------+
MikamiUitOpen 0:08b4a59451e5 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
MikamiUitOpen 0:08b4a59451e5 89 * +-------------------------------------------------+
MikamiUitOpen 0:08b4a59451e5 90 *
MikamiUitOpen 0:08b4a59451e5 91 * R1b is the same, except it is followed by a busy signal (zeros) until
MikamiUitOpen 0:08b4a59451e5 92 * the first non-zero byte when it is ready again.
MikamiUitOpen 0:08b4a59451e5 93 *
MikamiUitOpen 0:08b4a59451e5 94 * Data Response Token
MikamiUitOpen 0:08b4a59451e5 95 * -------------------
MikamiUitOpen 0:08b4a59451e5 96 * Every data block written to the card is acknowledged by a byte
MikamiUitOpen 0:08b4a59451e5 97 * response token
MikamiUitOpen 0:08b4a59451e5 98 *
MikamiUitOpen 0:08b4a59451e5 99 * +----------------------+
MikamiUitOpen 0:08b4a59451e5 100 * | xxx | 0 | status | 1 |
MikamiUitOpen 0:08b4a59451e5 101 * +----------------------+
MikamiUitOpen 0:08b4a59451e5 102 * 010 - OK!
MikamiUitOpen 0:08b4a59451e5 103 * 101 - CRC Error
MikamiUitOpen 0:08b4a59451e5 104 * 110 - Write Error
MikamiUitOpen 0:08b4a59451e5 105 *
MikamiUitOpen 0:08b4a59451e5 106 * Single Block Read and Write
MikamiUitOpen 0:08b4a59451e5 107 * ---------------------------
MikamiUitOpen 0:08b4a59451e5 108 *
MikamiUitOpen 0:08b4a59451e5 109 * Block transfers have a byte header, followed by the data, followed
MikamiUitOpen 0:08b4a59451e5 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
MikamiUitOpen 0:08b4a59451e5 111 *
MikamiUitOpen 0:08b4a59451e5 112 * +------+---------+---------+- - - -+---------+-----------+----------+
MikamiUitOpen 0:08b4a59451e5 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
MikamiUitOpen 0:08b4a59451e5 114 * +------+---------+---------+- - - -+---------+-----------+----------+
MikamiUitOpen 0:08b4a59451e5 115 */
MikamiUitOpen 0:08b4a59451e5 116 #include "SDFileSystem.h"
MikamiUitOpen 0:08b4a59451e5 117 #include "mbed_debug.h"
MikamiUitOpen 0:08b4a59451e5 118
MikamiUitOpen 0:08b4a59451e5 119 #define SD_COMMAND_TIMEOUT 5000
MikamiUitOpen 0:08b4a59451e5 120
MikamiUitOpen 0:08b4a59451e5 121 #define SD_DBG 0
MikamiUitOpen 0:08b4a59451e5 122
MikamiUitOpen 0:08b4a59451e5 123 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
MikamiUitOpen 0:08b4a59451e5 124 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
MikamiUitOpen 0:08b4a59451e5 125 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 126 }
MikamiUitOpen 0:08b4a59451e5 127
MikamiUitOpen 0:08b4a59451e5 128 #define R1_IDLE_STATE (1 << 0)
MikamiUitOpen 0:08b4a59451e5 129 #define R1_ERASE_RESET (1 << 1)
MikamiUitOpen 0:08b4a59451e5 130 #define R1_ILLEGAL_COMMAND (1 << 2)
MikamiUitOpen 0:08b4a59451e5 131 #define R1_COM_CRC_ERROR (1 << 3)
MikamiUitOpen 0:08b4a59451e5 132 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
MikamiUitOpen 0:08b4a59451e5 133 #define R1_ADDRESS_ERROR (1 << 5)
MikamiUitOpen 0:08b4a59451e5 134 #define R1_PARAMETER_ERROR (1 << 6)
MikamiUitOpen 0:08b4a59451e5 135
MikamiUitOpen 0:08b4a59451e5 136 // Types
MikamiUitOpen 0:08b4a59451e5 137 #define SDCARD_FAIL 0 //!< v1.x Standard Capacity
MikamiUitOpen 0:08b4a59451e5 138 #define SDCARD_V1 1 //!< v2.x Standard Capacity
MikamiUitOpen 0:08b4a59451e5 139 #define SDCARD_V2 2 //!< v2.x High Capacity
MikamiUitOpen 0:08b4a59451e5 140 #define SDCARD_V2HC 3 //!< Not recognised as an SD Card
MikamiUitOpen 0:08b4a59451e5 141
MikamiUitOpen 0:08b4a59451e5 142 int SDFileSystem::initialise_card() {
MikamiUitOpen 0:08b4a59451e5 143 // Set to 100kHz for initialisation, and clock card with cs = 1
MikamiUitOpen 0:08b4a59451e5 144 _spi.frequency(100000);
MikamiUitOpen 0:08b4a59451e5 145 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 146 for (int i = 0; i < 16; i++) {
MikamiUitOpen 0:08b4a59451e5 147 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 148 }
MikamiUitOpen 0:08b4a59451e5 149
MikamiUitOpen 0:08b4a59451e5 150 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
MikamiUitOpen 0:08b4a59451e5 151 if (_cmd(0, 0) != R1_IDLE_STATE) {
MikamiUitOpen 0:08b4a59451e5 152 debug("No disk, or could not put SD card in to SPI idle state\n");
MikamiUitOpen 0:08b4a59451e5 153 return SDCARD_FAIL;
MikamiUitOpen 0:08b4a59451e5 154 }
MikamiUitOpen 0:08b4a59451e5 155
MikamiUitOpen 0:08b4a59451e5 156 // send CMD8 to determine whther it is ver 2.x
MikamiUitOpen 0:08b4a59451e5 157 int r = _cmd8();
MikamiUitOpen 0:08b4a59451e5 158 if (r == R1_IDLE_STATE) {
MikamiUitOpen 0:08b4a59451e5 159 return initialise_card_v2();
MikamiUitOpen 0:08b4a59451e5 160 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
MikamiUitOpen 0:08b4a59451e5 161 return initialise_card_v1();
MikamiUitOpen 0:08b4a59451e5 162 } else {
MikamiUitOpen 0:08b4a59451e5 163 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
MikamiUitOpen 0:08b4a59451e5 164 return SDCARD_FAIL;
MikamiUitOpen 0:08b4a59451e5 165 }
MikamiUitOpen 0:08b4a59451e5 166 }
MikamiUitOpen 0:08b4a59451e5 167
MikamiUitOpen 0:08b4a59451e5 168 int SDFileSystem::initialise_card_v1() {
MikamiUitOpen 0:08b4a59451e5 169 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
MikamiUitOpen 0:08b4a59451e5 170 _cmd(55, 0);
MikamiUitOpen 0:08b4a59451e5 171 if (_cmd(41, 0) == 0) {
MikamiUitOpen 0:08b4a59451e5 172 cdv = 512;
MikamiUitOpen 0:08b4a59451e5 173 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
MikamiUitOpen 0:08b4a59451e5 174 return SDCARD_V1;
MikamiUitOpen 0:08b4a59451e5 175 }
MikamiUitOpen 0:08b4a59451e5 176 }
MikamiUitOpen 0:08b4a59451e5 177
MikamiUitOpen 0:08b4a59451e5 178 debug("Timeout waiting for v1.x card\n");
MikamiUitOpen 0:08b4a59451e5 179 return SDCARD_FAIL;
MikamiUitOpen 0:08b4a59451e5 180 }
MikamiUitOpen 0:08b4a59451e5 181
MikamiUitOpen 0:08b4a59451e5 182 int SDFileSystem::initialise_card_v2() {
MikamiUitOpen 0:08b4a59451e5 183 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
MikamiUitOpen 0:08b4a59451e5 184 wait_ms(50);
MikamiUitOpen 0:08b4a59451e5 185 _cmd58();
MikamiUitOpen 0:08b4a59451e5 186 _cmd(55, 0);
MikamiUitOpen 0:08b4a59451e5 187 if (_cmd(41, 0x40000000) == 0) {
MikamiUitOpen 0:08b4a59451e5 188 _cmd58();
MikamiUitOpen 0:08b4a59451e5 189 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
MikamiUitOpen 0:08b4a59451e5 190 cdv = 1;
MikamiUitOpen 0:08b4a59451e5 191 return SDCARD_V2;
MikamiUitOpen 0:08b4a59451e5 192 }
MikamiUitOpen 0:08b4a59451e5 193 }
MikamiUitOpen 0:08b4a59451e5 194
MikamiUitOpen 0:08b4a59451e5 195 debug("Timeout waiting for v2.x card\n");
MikamiUitOpen 0:08b4a59451e5 196 return SDCARD_FAIL;
MikamiUitOpen 0:08b4a59451e5 197 }
MikamiUitOpen 0:08b4a59451e5 198
MikamiUitOpen 0:08b4a59451e5 199 int SDFileSystem::disk_initialize() {
MikamiUitOpen 0:08b4a59451e5 200 int i = initialise_card();
MikamiUitOpen 0:08b4a59451e5 201 debug_if(SD_DBG, "init card = %d\n", i);
MikamiUitOpen 0:08b4a59451e5 202 _sectors = _sd_sectors();
MikamiUitOpen 0:08b4a59451e5 203
MikamiUitOpen 0:08b4a59451e5 204 // Set block length to 512 (CMD16)
MikamiUitOpen 0:08b4a59451e5 205 if (_cmd(16, 512) != 0) {
MikamiUitOpen 0:08b4a59451e5 206 debug("Set 512-byte block timed out\n");
MikamiUitOpen 0:08b4a59451e5 207 return 1;
MikamiUitOpen 0:08b4a59451e5 208 }
MikamiUitOpen 0:08b4a59451e5 209
MikamiUitOpen 0:08b4a59451e5 210 _spi.frequency(1000000); // Set to 1MHz for data transfer
MikamiUitOpen 0:08b4a59451e5 211 return 0;
MikamiUitOpen 0:08b4a59451e5 212 }
MikamiUitOpen 0:08b4a59451e5 213
MikamiUitOpen 0:08b4a59451e5 214 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
MikamiUitOpen 0:08b4a59451e5 215 // set write address for single block (CMD24)
MikamiUitOpen 0:08b4a59451e5 216 if (_cmd(24, block_number * cdv) != 0) {
MikamiUitOpen 0:08b4a59451e5 217 return 1;
MikamiUitOpen 0:08b4a59451e5 218 }
MikamiUitOpen 0:08b4a59451e5 219
MikamiUitOpen 0:08b4a59451e5 220 // send the data block
MikamiUitOpen 0:08b4a59451e5 221 _write(buffer, 512);
MikamiUitOpen 0:08b4a59451e5 222 return 0;
MikamiUitOpen 0:08b4a59451e5 223 }
MikamiUitOpen 0:08b4a59451e5 224
MikamiUitOpen 0:08b4a59451e5 225 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
MikamiUitOpen 0:08b4a59451e5 226 // set read address for single block (CMD17)
MikamiUitOpen 0:08b4a59451e5 227 if (_cmd(17, block_number * cdv) != 0) {
MikamiUitOpen 0:08b4a59451e5 228 return 1;
MikamiUitOpen 0:08b4a59451e5 229 }
MikamiUitOpen 0:08b4a59451e5 230
MikamiUitOpen 0:08b4a59451e5 231 // receive the data
MikamiUitOpen 0:08b4a59451e5 232 _read(buffer, 512);
MikamiUitOpen 0:08b4a59451e5 233 return 0;
MikamiUitOpen 0:08b4a59451e5 234 }
MikamiUitOpen 0:08b4a59451e5 235
MikamiUitOpen 0:08b4a59451e5 236 int SDFileSystem::disk_status() { return 0; }
MikamiUitOpen 0:08b4a59451e5 237 int SDFileSystem::disk_sync() { return 0; }
MikamiUitOpen 0:08b4a59451e5 238 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
MikamiUitOpen 0:08b4a59451e5 239
MikamiUitOpen 0:08b4a59451e5 240
MikamiUitOpen 0:08b4a59451e5 241 // PRIVATE FUNCTIONS
MikamiUitOpen 0:08b4a59451e5 242 int SDFileSystem::_cmd(int cmd, int arg) {
MikamiUitOpen 0:08b4a59451e5 243 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 244
MikamiUitOpen 0:08b4a59451e5 245 // send a command
MikamiUitOpen 0:08b4a59451e5 246 _spi.write(0x40 | cmd);
MikamiUitOpen 0:08b4a59451e5 247 _spi.write(arg >> 24);
MikamiUitOpen 0:08b4a59451e5 248 _spi.write(arg >> 16);
MikamiUitOpen 0:08b4a59451e5 249 _spi.write(arg >> 8);
MikamiUitOpen 0:08b4a59451e5 250 _spi.write(arg >> 0);
MikamiUitOpen 0:08b4a59451e5 251 _spi.write(0x95);
MikamiUitOpen 0:08b4a59451e5 252
MikamiUitOpen 0:08b4a59451e5 253 // wait for the repsonse (response[7] == 0)
MikamiUitOpen 0:08b4a59451e5 254 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
MikamiUitOpen 0:08b4a59451e5 255 int response = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 256 if (!(response & 0x80)) {
MikamiUitOpen 0:08b4a59451e5 257 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 258 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 259 return response;
MikamiUitOpen 0:08b4a59451e5 260 }
MikamiUitOpen 0:08b4a59451e5 261 }
MikamiUitOpen 0:08b4a59451e5 262 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 263 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 264 return -1; // timeout
MikamiUitOpen 0:08b4a59451e5 265 }
MikamiUitOpen 0:08b4a59451e5 266 int SDFileSystem::_cmdx(int cmd, int arg) {
MikamiUitOpen 0:08b4a59451e5 267 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 268
MikamiUitOpen 0:08b4a59451e5 269 // send a command
MikamiUitOpen 0:08b4a59451e5 270 _spi.write(0x40 | cmd);
MikamiUitOpen 0:08b4a59451e5 271 _spi.write(arg >> 24);
MikamiUitOpen 0:08b4a59451e5 272 _spi.write(arg >> 16);
MikamiUitOpen 0:08b4a59451e5 273 _spi.write(arg >> 8);
MikamiUitOpen 0:08b4a59451e5 274 _spi.write(arg >> 0);
MikamiUitOpen 0:08b4a59451e5 275 _spi.write(0x95);
MikamiUitOpen 0:08b4a59451e5 276
MikamiUitOpen 0:08b4a59451e5 277 // wait for the repsonse (response[7] == 0)
MikamiUitOpen 0:08b4a59451e5 278 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
MikamiUitOpen 0:08b4a59451e5 279 int response = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 280 if (!(response & 0x80)) {
MikamiUitOpen 0:08b4a59451e5 281 return response;
MikamiUitOpen 0:08b4a59451e5 282 }
MikamiUitOpen 0:08b4a59451e5 283 }
MikamiUitOpen 0:08b4a59451e5 284 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 285 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 286 return -1; // timeout
MikamiUitOpen 0:08b4a59451e5 287 }
MikamiUitOpen 0:08b4a59451e5 288
MikamiUitOpen 0:08b4a59451e5 289
MikamiUitOpen 0:08b4a59451e5 290 int SDFileSystem::_cmd58() {
MikamiUitOpen 0:08b4a59451e5 291 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 292 int arg = 0;
MikamiUitOpen 0:08b4a59451e5 293
MikamiUitOpen 0:08b4a59451e5 294 // send a command
MikamiUitOpen 0:08b4a59451e5 295 _spi.write(0x40 | 58);
MikamiUitOpen 0:08b4a59451e5 296 _spi.write(arg >> 24);
MikamiUitOpen 0:08b4a59451e5 297 _spi.write(arg >> 16);
MikamiUitOpen 0:08b4a59451e5 298 _spi.write(arg >> 8);
MikamiUitOpen 0:08b4a59451e5 299 _spi.write(arg >> 0);
MikamiUitOpen 0:08b4a59451e5 300 _spi.write(0x95);
MikamiUitOpen 0:08b4a59451e5 301
MikamiUitOpen 0:08b4a59451e5 302 // wait for the repsonse (response[7] == 0)
MikamiUitOpen 0:08b4a59451e5 303 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
MikamiUitOpen 0:08b4a59451e5 304 int response = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 305 if (!(response & 0x80)) {
MikamiUitOpen 0:08b4a59451e5 306 int ocr = _spi.write(0xFF) << 24;
MikamiUitOpen 0:08b4a59451e5 307 ocr |= _spi.write(0xFF) << 16;
MikamiUitOpen 0:08b4a59451e5 308 ocr |= _spi.write(0xFF) << 8;
MikamiUitOpen 0:08b4a59451e5 309 ocr |= _spi.write(0xFF) << 0;
MikamiUitOpen 0:08b4a59451e5 310 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 311 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 312 return response;
MikamiUitOpen 0:08b4a59451e5 313 }
MikamiUitOpen 0:08b4a59451e5 314 }
MikamiUitOpen 0:08b4a59451e5 315 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 316 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 317 return -1; // timeout
MikamiUitOpen 0:08b4a59451e5 318 }
MikamiUitOpen 0:08b4a59451e5 319
MikamiUitOpen 0:08b4a59451e5 320 int SDFileSystem::_cmd8() {
MikamiUitOpen 0:08b4a59451e5 321 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 322
MikamiUitOpen 0:08b4a59451e5 323 // send a command
MikamiUitOpen 0:08b4a59451e5 324 _spi.write(0x40 | 8); // CMD8
MikamiUitOpen 0:08b4a59451e5 325 _spi.write(0x00); // reserved
MikamiUitOpen 0:08b4a59451e5 326 _spi.write(0x00); // reserved
MikamiUitOpen 0:08b4a59451e5 327 _spi.write(0x01); // 3.3v
MikamiUitOpen 0:08b4a59451e5 328 _spi.write(0xAA); // check pattern
MikamiUitOpen 0:08b4a59451e5 329 _spi.write(0x87); // crc
MikamiUitOpen 0:08b4a59451e5 330
MikamiUitOpen 0:08b4a59451e5 331 // wait for the repsonse (response[7] == 0)
MikamiUitOpen 0:08b4a59451e5 332 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
MikamiUitOpen 0:08b4a59451e5 333 char response[5];
MikamiUitOpen 0:08b4a59451e5 334 response[0] = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 335 if (!(response[0] & 0x80)) {
MikamiUitOpen 0:08b4a59451e5 336 for (int j = 1; j < 5; j++) {
MikamiUitOpen 0:08b4a59451e5 337 response[i] = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 338 }
MikamiUitOpen 0:08b4a59451e5 339 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 340 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 341 return response[0];
MikamiUitOpen 0:08b4a59451e5 342 }
MikamiUitOpen 0:08b4a59451e5 343 }
MikamiUitOpen 0:08b4a59451e5 344 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 345 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 346 return -1; // timeout
MikamiUitOpen 0:08b4a59451e5 347 }
MikamiUitOpen 0:08b4a59451e5 348
MikamiUitOpen 0:08b4a59451e5 349 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
MikamiUitOpen 0:08b4a59451e5 350 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 351
MikamiUitOpen 0:08b4a59451e5 352 // read until start byte (0xFF)
MikamiUitOpen 0:08b4a59451e5 353 while (_spi.write(0xFF) != 0xFE);
MikamiUitOpen 0:08b4a59451e5 354
MikamiUitOpen 0:08b4a59451e5 355 // read data
MikamiUitOpen 0:08b4a59451e5 356 for (int i = 0; i < length; i++) {
MikamiUitOpen 0:08b4a59451e5 357 buffer[i] = _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 358 }
MikamiUitOpen 0:08b4a59451e5 359 _spi.write(0xFF); // checksum
MikamiUitOpen 0:08b4a59451e5 360 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 361
MikamiUitOpen 0:08b4a59451e5 362 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 363 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 364 return 0;
MikamiUitOpen 0:08b4a59451e5 365 }
MikamiUitOpen 0:08b4a59451e5 366
MikamiUitOpen 0:08b4a59451e5 367 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
MikamiUitOpen 0:08b4a59451e5 368 _cs = 0;
MikamiUitOpen 0:08b4a59451e5 369
MikamiUitOpen 0:08b4a59451e5 370 // indicate start of block
MikamiUitOpen 0:08b4a59451e5 371 _spi.write(0xFE);
MikamiUitOpen 0:08b4a59451e5 372
MikamiUitOpen 0:08b4a59451e5 373 // write the data
MikamiUitOpen 0:08b4a59451e5 374 for (int i = 0; i < length; i++) {
MikamiUitOpen 0:08b4a59451e5 375 _spi.write(buffer[i]);
MikamiUitOpen 0:08b4a59451e5 376 }
MikamiUitOpen 0:08b4a59451e5 377
MikamiUitOpen 0:08b4a59451e5 378 // write the checksum
MikamiUitOpen 0:08b4a59451e5 379 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 380 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 381
MikamiUitOpen 0:08b4a59451e5 382 // check the response token
MikamiUitOpen 0:08b4a59451e5 383 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
MikamiUitOpen 0:08b4a59451e5 384 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 385 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 386 return 1;
MikamiUitOpen 0:08b4a59451e5 387 }
MikamiUitOpen 0:08b4a59451e5 388
MikamiUitOpen 0:08b4a59451e5 389 // wait for write to finish
MikamiUitOpen 0:08b4a59451e5 390 while (_spi.write(0xFF) == 0);
MikamiUitOpen 0:08b4a59451e5 391
MikamiUitOpen 0:08b4a59451e5 392 _cs = 1;
MikamiUitOpen 0:08b4a59451e5 393 _spi.write(0xFF);
MikamiUitOpen 0:08b4a59451e5 394 return 0;
MikamiUitOpen 0:08b4a59451e5 395 }
MikamiUitOpen 0:08b4a59451e5 396
MikamiUitOpen 0:08b4a59451e5 397 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
MikamiUitOpen 0:08b4a59451e5 398 uint32_t bits = 0;
MikamiUitOpen 0:08b4a59451e5 399 uint32_t size = 1 + msb - lsb;
MikamiUitOpen 0:08b4a59451e5 400 for (int i = 0; i < size; i++) {
MikamiUitOpen 0:08b4a59451e5 401 uint32_t position = lsb + i;
MikamiUitOpen 0:08b4a59451e5 402 uint32_t byte = 15 - (position >> 3);
MikamiUitOpen 0:08b4a59451e5 403 uint32_t bit = position & 0x7;
MikamiUitOpen 0:08b4a59451e5 404 uint32_t value = (data[byte] >> bit) & 1;
MikamiUitOpen 0:08b4a59451e5 405 bits |= value << i;
MikamiUitOpen 0:08b4a59451e5 406 }
MikamiUitOpen 0:08b4a59451e5 407 return bits;
MikamiUitOpen 0:08b4a59451e5 408 }
MikamiUitOpen 0:08b4a59451e5 409
MikamiUitOpen 0:08b4a59451e5 410 uint64_t SDFileSystem::_sd_sectors() {
MikamiUitOpen 0:08b4a59451e5 411 uint32_t c_size, c_size_mult, read_bl_len;
MikamiUitOpen 0:08b4a59451e5 412 uint32_t block_len, mult, blocknr, capacity;
MikamiUitOpen 0:08b4a59451e5 413 uint32_t hc_c_size;
MikamiUitOpen 0:08b4a59451e5 414 uint64_t blocks;
MikamiUitOpen 0:08b4a59451e5 415
MikamiUitOpen 0:08b4a59451e5 416 // CMD9, Response R2 (R1 byte + 16-byte block read)
MikamiUitOpen 0:08b4a59451e5 417 if (_cmdx(9, 0) != 0) {
MikamiUitOpen 0:08b4a59451e5 418 debug("Didn't get a response from the disk\n");
MikamiUitOpen 0:08b4a59451e5 419 return 0;
MikamiUitOpen 0:08b4a59451e5 420 }
MikamiUitOpen 0:08b4a59451e5 421
MikamiUitOpen 0:08b4a59451e5 422 uint8_t csd[16];
MikamiUitOpen 0:08b4a59451e5 423 if (_read(csd, 16) != 0) {
MikamiUitOpen 0:08b4a59451e5 424 debug("Couldn't read csd response from disk\n");
MikamiUitOpen 0:08b4a59451e5 425 return 0;
MikamiUitOpen 0:08b4a59451e5 426 }
MikamiUitOpen 0:08b4a59451e5 427
MikamiUitOpen 0:08b4a59451e5 428 // csd_structure : csd[127:126]
MikamiUitOpen 0:08b4a59451e5 429 // c_size : csd[73:62]
MikamiUitOpen 0:08b4a59451e5 430 // c_size_mult : csd[49:47]
MikamiUitOpen 0:08b4a59451e5 431 // read_bl_len : csd[83:80] - the *maximum* read block length
MikamiUitOpen 0:08b4a59451e5 432
MikamiUitOpen 0:08b4a59451e5 433 int csd_structure = ext_bits(csd, 127, 126);
MikamiUitOpen 0:08b4a59451e5 434
MikamiUitOpen 0:08b4a59451e5 435 switch (csd_structure) {
MikamiUitOpen 0:08b4a59451e5 436 case 0:
MikamiUitOpen 0:08b4a59451e5 437 cdv = 512;
MikamiUitOpen 0:08b4a59451e5 438 c_size = ext_bits(csd, 73, 62);
MikamiUitOpen 0:08b4a59451e5 439 c_size_mult = ext_bits(csd, 49, 47);
MikamiUitOpen 0:08b4a59451e5 440 read_bl_len = ext_bits(csd, 83, 80);
MikamiUitOpen 0:08b4a59451e5 441
MikamiUitOpen 0:08b4a59451e5 442 block_len = 1 << read_bl_len;
MikamiUitOpen 0:08b4a59451e5 443 mult = 1 << (c_size_mult + 2);
MikamiUitOpen 0:08b4a59451e5 444 blocknr = (c_size + 1) * mult;
MikamiUitOpen 0:08b4a59451e5 445 capacity = blocknr * block_len;
MikamiUitOpen 0:08b4a59451e5 446 blocks = capacity / 512;
MikamiUitOpen 0:08b4a59451e5 447 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
MikamiUitOpen 0:08b4a59451e5 448 break;
MikamiUitOpen 0:08b4a59451e5 449
MikamiUitOpen 0:08b4a59451e5 450 case 1:
MikamiUitOpen 0:08b4a59451e5 451 cdv = 1;
MikamiUitOpen 0:08b4a59451e5 452 hc_c_size = ext_bits(csd, 63, 48);
MikamiUitOpen 0:08b4a59451e5 453 blocks = (hc_c_size+1)*1024;
MikamiUitOpen 0:08b4a59451e5 454 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
MikamiUitOpen 0:08b4a59451e5 455 break;
MikamiUitOpen 0:08b4a59451e5 456
MikamiUitOpen 0:08b4a59451e5 457 default:
MikamiUitOpen 0:08b4a59451e5 458 debug("CSD struct unsupported\r\n");
MikamiUitOpen 0:08b4a59451e5 459 return 0;
MikamiUitOpen 0:08b4a59451e5 460 };
MikamiUitOpen 0:08b4a59451e5 461 return blocks;
MikamiUitOpen 0:08b4a59451e5 462 }