skeleton
Dependencies: MAG3110 MMA8451Q SLCD TSI mbed
Revision 0:ba78bf4f69dc, committed 2014-03-12
- Comitter:
- TimeString
- Date:
- Wed Mar 12 20:48:17 2014 +0000
- Commit message:
- to jaeyoung
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/MAG3110.lib Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/SomeRandomBloke/code/MAG3110/#cf40601402b7
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/MMA8451Q.lib Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/JoKer/code/MMA8451Q/#2d14600116fc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/SLCD.lib Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/Sissors/code/SLCD/#6e3c11967108
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TPM_init.cpp Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,145 @@ +#include "TPM_init.h" + +void TPM0_init(unsigned int modulo_val, unsigned int prescale_val){ + volatile unsigned int *ptrMyReg; + unsigned int prev; + + //ptrMyReg = (volatile unsigned int *) MCG_C1_ADDR; + //pc.printf("MCG_C1 = 0x%x ", *ptrMyReg); + + ptrMyReg = (volatile unsigned int *) SIM_SOPT2_ADDR; + prev = *ptrMyReg; + + SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; + SIM->SOPT2 &= ~(SIM_SOPT2_TPMSRC_MASK); + SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); + + /* + //pc.printf("Previous value of SIM_SOPT2 = 0x%x ", *ptrMyReg); + //prev = prev & 0xFDFEFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 + prev = prev & 0xFDFFFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 + //pc.printf("prev after AND MASK = %x", prev); + prev = prev | 0x01000000; + //pc.printf("prev after AND MASK = %x", prev); + *ptrMyReg = prev; + //*ptrMyReg = prev | 0x01000000; //25-24: TPMSRC, 01:MCGFLLCLK or MCFGPLLCLK/2 + //*ptrMyReg = 0x05010000; + + //pc.printf("SIM_SOPT2 = 0x%x\n", *ptrMyReg); + */ + + SIM->SCGC6 |= SIM_SCGC6_TPM0_MASK; + + /* + ptrMyReg = (volatile unsigned int *) SIM_SCGC6_ADDR; //bit [26-24] + prev = *ptrMyReg; + prev = prev | 0x07000000; + *ptrMyReg = prev; + //pc.printf("New value of SIM_SCGC6 = 0x%x ", *ptrMyReg); + */ + + //Set all bits to zero + TPM0->SC = 0x0; + + /* + ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 + *ptrMyReg = 0x0; + //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); + */ + + //No channels for now + /* + ptrMyReg = (volatile unsigned int *) TPM0_C0SC_ADDR; + prev = *ptrMyReg; + prev = prev | 0x00000040; + *ptrMyReg = prev; + //pc.printf("TPM0_C0SC = 0x%x\n", *ptrMyReg); + */ + + //Reset COUNT value to zero + TPM0->CNT = 0x0; + /* + ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 + *ptrMyReg = 0x0; + //pc.printf("TPM0_CNT = 0x%x\n", *ptrMyReg); + */ + + //Set modulo value + TPM0->MOD = modulo_val; + /* + ptrMyReg = (volatile unsigned int *) TPM0_MOD_ADDR; + *ptrMyReg = modulo_val; + //*ptrMyReg = 0xFFFF; + //pc.printf("TPM0_MOD = 0x%x\n", *ptrMyReg); + */ + + //Set prescale value + TPM0->SC |= prescale_val; + + //Enable overflow interrupt + TPM0->SC |= TPM_SC_TOIE_MASK; + + /* + ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; + *ptrMyReg = 0x00000040; //bit [6]:1, Enable Overflow Interrupts + //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); + */ + + + + + //Enable reset after overflow [27:24} Trigger, 1000: TPM0 overflow, [18]:counter reload on trigger +/* ptrMyReg = (volatile unsigned int *) TPM0_CONF_ADDR; + //prev = *ptrMyReg; + //prev = prev | 0x08000000; + //pc.printf("TPM0_CONF = 0x%x\n", *ptrMyReg); + *ptrMyReg = 0x08040000; +*/ + +} + +unsigned int TPM0_SC_read() { + unsigned int SC_value = TPM0->SC; + return SC_value; + /* + volatile unsigned int *ptrMyReg; + unsigned int value; + ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 + value = *ptrMyReg; + return value; + */ +} +unsigned int TPM0_CNT_read() { + unsigned int CNT_value = TPM0->CNT; + return CNT_value; + /* + volatile unsigned int *ptrMyReg; + unsigned int value; + ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 + value = *ptrMyReg; + return value; + */ +} + +void TPM0_clear_overflow() { + TPM0->SC |= TPM_SC_TOF_MASK; + /* + volatile unsigned int *ptrMyReg; + + ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 + *ptrMyReg = 0x000000C8; //bit[4:3]: 0x01, on every TPM counter clk + //*ptrMyReg = 0x00000088; //Debugging handler. Try disabling overflow interrupts + //*ptrMyReg = 0x00000050; //bit[4:3]: 0x10, on every rising edge of external .... + */ +} + +void TPM0_start() { + + TPM0->SC |= TPM_SC_CMOD(1); //Count on every TPM counter clk + /* + volatile unsigned int *ptrMyReg; + + ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 + *ptrMyReg = 0x00000048; //bit[4:3]: 0x01, on every TPM counter clk + */ +} \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TPM_init.h Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,24 @@ +#ifndef TPM_INIT_H +#define TPM_INIT_H + +#include "mbed.h" + +#define SIM_SOPT2_ADDR 0x40048004 +#define SIM_SCGC6_ADDR 0x4004803C +#define MCG_C1_ADDR 0x40064000 +#define TPM0_SC_ADDR 0x40038000 +#define TPM0_C0SC_ADDR 0x4003800C +#define TPM0_CNT_ADDR 0x40038004 +#define TPM0_MOD_ADDR 0x40038008 +#define TPM0_CONF_ADDR 0x40038084 + +void print_stuff(char* whatever); + +void TPM0_init(unsigned int modulo_val, unsigned int prescale_val); + +void TPM0_clear_overflow(); +unsigned int TPM0_CNT_read(); +unsigned int TPM0_SC_read(); + +void TPM0_start(); +#endif \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TSI.lib Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/vsluiter/code/TSI/#4dc2f5a3a731
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/main.cpp Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,231 @@ +#include "mbed.h" +#include "MMA8451Q.h" +#include "MAG3110.h" +#include "SLCD.h" +#include "TSISensor.h" +#include <math.h> +#include "InterruptManager.h" +#include "TPM_init.h" + + +//#define IS_TRANSMITTER + +#ifndef IS_TRANSMITTER + #define IS_RECEIVER +#endif + + +#define BAUD_RATE 921600 + +#define MMA8451_I2C_ADDRESS (0x1d << 1) +#define MAG3110_I2C_ADDRESS (0x0e << 1) +#define NVIC_ISER 0xE000E100 +#define NVIC_ISPR 0xE000E200 + +#define SIM_SOPT2_ADDRESS 0x40048004 +#define SIM_SCGC6_ADDRESS 0x4004803C + + + +Serial pc(USBTX, USBRX); +RawSerial mbed_rec(PTE0, PTE1); + +Timer timer; +SLCD slcd; + +DigitalOut go(D1); + +int offset_start_usec; +int offset_end_usec; +unsigned int flag; + +gpio_t gpio_1; +gpio_t gpio_2; + +RawSerial uart_mbed(PTE0, PTE1); +RawSerial uart_beagle(PTE22, PTE23); + + +// signal +const int sigSYN = 44; + +// now mode +int now_mode; +const int modeGEN = 1; +const int modeMON = 2; + +int now_interval; +int now_output; + + + +void TPM0_handler() { + //pc.printf("handler called\n"); + unsigned int overflow = TPM0_SC_read() & 0x000000C0; + if(overflow == 0xC0) { + //pc.printf("SC_REG = 0x%x\n", TPM0_SC_read()); + TPM0_clear_overflow(); + //__ISB(); + //__DSB(); + //pc.printf("SC_REG = 0x%x\n", TPM0_SC_read()); + + //set gpio pin + //int prev_val = gpio_read(&gpio_1); + //gpio_write(&gpio_1, ~prev_val); + //pc.printf("handler called\n"); + flag++; + //pc.printf("flag = %d\n", flag); + + //TPM0_clear_overflow(); + NVIC_ClearPendingIRQ(TPM0_IRQn); + //__ISB(); + //__DSB(); + + } + //NVIC_ClearPendingIRQ(TPM0_IRQn); + +} + + +#ifdef IS_TRANSMITTER +void transmitter_rec_byte_from_mbed() { +} +#endif + +#ifdef IS_RECEIVER +void receiver_rec_byte_from_mbed(){ + int c = uart_mbed.getc(); + //pc.printf("%d\n", c); + if(c == sigSYN) { + go = 1; + // TODO: enable timer, register timer_fire_signal(), prescale = 0, modulo = 48000 + } +} +#endif + +#ifdef IS_TRANSMITTER +void transmitter_timer_handler_reset_countdown() { + // TODO: disable timer + // TODO: reset timer + // TODO: enable timer, register timer_fire_signal(), prescale = 0, modulo = 48000 + go = 1; +} +#endif + +void timer_fire_signal() { +#ifdef IS_RECEIVER + // TODO: do time drift calibration, if have time. 2912ms drift 740 clk +#endif + go = !go; +} + +void rec_byte_from_beagle() { + //01: Generation mode start + //00: Generation mode stop + //1X: Monitoring mode + + int c1 = uart_mbed.getc(); + int c2 = uart_mbed.getc(); + int n = (c1 << 8) | c2; + if (n & 0x8000) { // Monitoring mode + if (now_mode != modeMON) { + // TODO: disable timer + // TODO: sync again? + // TODO: initial monitor mode + } + } + else { // Generation mode + if (now_mode != modeGEN) { + // TODO: disable previous timer + // TODO: sync again? + // TODO: init monitor mode + } + + if (n & 0x4000) { // start signal + now_interval = n & 0x3f; + now_output = 1; + } + else { // stop signal + now_output = 0; + } + } +} + +int main() { + pc.baud(921600); + + + //TPM1->SC = 0; +#ifdef IS_TRANSMITTER + slcd.printf("sen0"); + pc.printf("I'm sender\n"); +#else // IS_RECEIVER + slcd.printf("1rec"); + pc.printf("I'm receiver\n"); +#endif + + flag = 0; + unsigned int modulo_val = 48000; //period = 1000usec + unsigned int prescale_val = 0; + pc.baud(BAUD_RATE); + + volatile unsigned int *ptrMyReg; + + + /* + // ------lagacy code ---------------------------------- + NVIC_SetVector(TPM0_IRQn, (uint32_t) TPM0_handler); + NVIC_SetPriority(TPM0_IRQn, 0); + //NVIC_EnableIRQ(TPM0_IRQn); + + //ptrMyReg = (volatile unsigned int *) NVIC_ISER; + //*ptrMyReg = 0x14020000; +// pc.printf("NVIC_ISER = 0x%x ", *ptrMyReg); + +// ptrMyReg = (volatile unsigned int *) NVIC_ISPR; +// pc.printf("NVIC_ISPR = 0x%x ", *ptrMyReg); + + TPM0_init(modulo_val, prescale_val); + //ptrMyReg = (volatile unsigned int *) TPM0_MOD_ADDR; + //pc.printf("TPM0_MOD_ADDR = 0x%x ", *ptrMyReg); + + NVIC_EnableIRQ(TPM0_IRQn); +// ptrMyReg = (volatile unsigned int *) TPM0_CONF_ADDR; +// pc.printf("TPM0_CONF = 0x%x\n", *ptrMyReg); + + gpio_init(&gpio_1, PTA1, PIN_OUTPUT); + gpio_write(&gpio_1, 0); + + gpio_init(&gpio_2, PTA1, PIN_OUTPUT); + gpio_write(&gpio_2, 0); + + gpio_write(&gpio_1, 1); + //gpio_write(&gpio_2, 1); + // ------lagacy code ---------------------------------- +*/ + + uart_mbed.baud(921600); + + + // register uart handler from BBB + uart_beagle.attach(rec_byte_from_beagle, Serial::RxIrq); + +#ifdef IS_TRANSMITTER + wait(1.0); // wait enough time for receiver to attach handler +#else //IS_RECEIVER + uart_mbed.attach(receiver_rec_byte_from_mbed, Serial::RxIrq); +#endif + +#ifdef IS_TRANSMITTER + // TODO: enable timer, attach handler "transmitter_timer_handler_reset_countdown", prescale = 0, modulo = ? +#endif + + + + // a place should never reach + while (true) { + wait(999); + } + + +} \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.bld Wed Mar 12 20:48:17 2014 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed/builds/8e73be2a2ac1 \ No newline at end of file