MLX_BaseSPI.h

00001 // ****************************************************************************
00002 /*!
00003 Module:     Melexis Base SPI
00004 
00005 Platform:   Win32 - Win64 - embedded
00006 
00007 \file       MLX_BaseSPI.h
00008 
00009 \brief      Base control module the ASIC SPI, Melexis protocol.
00010 
00011 \author     Jean-F. Bernier
00012 
00013 \since      2015-04-23
00014 */
00015 // ***************************************************************************
00016 
00017 #ifndef _MLX_BASESPI_H_
00018 #define _MLX_BASESPI_H_
00019 
00020 #ifdef __cplusplus
00021 extern "C" {
00022 #endif
00023 
00024 //*****************************************************************************
00025 //*************** Header includes *********************************************
00026 //*****************************************************************************
00027 #include "typeDef.h"
00028 
00029 //*****************************************************************************
00030 //*************** Constants and Macros ****************************************
00031 //*****************************************************************************
00032 #define MLX_CRC_SZ      2    /// Bytes in SPI CRC field
00033 #define MLX_SHORT_SZ    8    /// Bytes in short SPI packet
00034 #define MLX_LONG1_SZ     300  /// Bytes in long SPI packet; BSI spec raw_data packet size
00035 #define MLX_HDR_SZ      2    /// Bytes in SPI header field
00036 #define MLX_LONG2_SZ     260  /// Bytes in ECHO packet
00037 
00038 // Bytes in payload field
00039 #define MLX_SHORT_DATA_SZ   (MLX_SHORT_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
00040 #define MLX_LONG1_DATA_SZ    (MLX_LONG1_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
00041 #define MLX_LONG2_DATA_SZ    (MLX_LONG2_SZ - MLX_HDR_SZ - MLX_CRC_SZ)
00042 
00043 #if defined(WIN32) || defined(_WIN64)
00044     #ifdef SPI_EXPORTS
00045         #define SPI_DLL __declspec(dllexport)
00046     #else
00047         #define SPI_DLL __declspec(dllimport)
00048     #endif
00049 #else
00050     #define SPI_DLL
00051 #endif
00052 
00053 
00054 
00055 // Basic computation of the number of elements of a STATIC array
00056 #define ARRAY_SZ(a)     (sizeof(a)/sizeof(a[0]))
00057 
00058 #ifndef BIT
00059 // Constructs a mask of a single bit value. "OR" to make a mask: mask = BIT(3) | BIT(6) | BIT(12)
00060 #define BIT(x)                  ( 1<<(x) )
00061 #endif
00062 
00063 // Set to 1, clear to 0, obtain value or flip a single bit in variable
00064 #ifndef BIT_SET
00065 #define BIT_SET(var, bit)     ( (var) |=  BIT(bit) )
00066 #endif
00067 
00068 #ifndef BIT_CLR
00069 #define BIT_CLR(var, bit)     ( (var) &= ~BIT(bit) )
00070 #endif
00071 
00072 #ifndef BIT_GET
00073 #define BIT_GET(var, bit)     ( (var) &   BIT(bit) )
00074 #endif
00075 
00076 #ifndef BIT_FLIP
00077 #define BIT_FLIP(var, bit)    ( (var) ^=  BIT(bit) )
00078 #endif
00079 
00080 // Set to 1, clear to 0, obtain value or flip a variable at specified bit MASK positions
00081 #ifndef MASK_SET
00082 #define MASK_SET(var, mask)   ( (var) |=  (mask) )
00083 #endif
00084 
00085 #ifndef MASK_CLR
00086 #define MASK_CLR(var, mask)   ( (var) &= ~(mask) )
00087 #endif
00088 
00089 #ifndef MASK_GET
00090 #define MASK_GET(var, mask)   ( (var) &   (mask) )
00091 #endif
00092 
00093 #ifndef MASK_FLIP
00094 #define MASK_FLIP(var, mask)  ( (var) ^=  (mask) )
00095 #endif
00096 //*****************************************************************************
00097 //*************** Data Type Definitions ***************************************
00098 //*****************************************************************************
00099 
00100 /// \enum   FirmType
00101 /// \brief  Lists all firmware access types.
00102 typedef enum
00103 {
00104     FW_OTP = 0,
00105     FW_PROCESSED,
00106     FW_RAW,
00107     FW_PATCH,
00108     FW_PRELOAD,
00109     FW_TEST,
00110 } FirmType;
00111 
00112 
00113 /// \union  PACK_SHORT
00114 /// \brief  Defines a short packet.
00115 typedef union
00116 {
00117     // Main data buffer
00118     uint8 buf[MLX_SHORT_SZ];
00119 
00120     // Structured data: header, payload and CRC
00121     struct
00122     {
00123         uint16 hdr;
00124         uint8  data[MLX_SHORT_DATA_SZ];
00125         uint16 crc;
00126     };
00127 } PACK_SHORT;
00128 
00129 
00130 ///
00131 /// MLXSPI uses 2 sized "long packets": 
00132 /// Trace data is trasmitted in 148 word long packets (LONG1)
00133 /// Echo data and patch data are transmitted in 128 word packets (LONG2)
00134 //
00135 /// \union  PACK_LONG1
00136 /// \brief  Defines a long packet.
00137 typedef union
00138 {
00139     // Main data buffer
00140     uint8 buf[MLX_LONG1_SZ];
00141 
00142     // Structured data: header, payload and CRC
00143     struct
00144     {
00145         uint16 hdr;
00146         uint8  data[MLX_LONG1_DATA_SZ];
00147         uint16 crc;
00148     };
00149 } PACK_LONG1;
00150 
00151 /// \union  PACK_LONG2
00152 /// \brief  Defines a long packet.
00153 typedef union
00154 {
00155     // Main data buffer
00156     uint8 buf[MLX_LONG2_SZ];
00157 
00158     // Structured data: header, payload and CRC
00159     struct
00160     {
00161         uint16 hdr;
00162         uint8  data[MLX_LONG2_DATA_SZ];
00163         uint16 crc;
00164     };
00165 } PACK_LONG2;
00166 
00167 
00168 /// \enum   PackType
00169 /// \brief  Lists all packet types.
00170 typedef enum
00171 {
00172     PACK_RREG = 0,      ///< Read register request
00173     PACK_WREG,          ///< Write register request
00174     PACK_RFIRM,         ///< Read firmware request
00175     PACK_WFIRM,         ///< Write firmware request
00176     PACK_STATUS_S,      ///< Status short
00177     PACK_STATUS_L,      ///< Status long
00178     PACK_RDATA_RESP_S,  ///< Read data response short
00179     PACK_RDATA_RESP_L,  ///< Read data response long
00180     PACK_WDATA_L,       ///< Write data long
00181 } PackType;
00182 
00183 
00184 /// \enum   StatusType
00185 /// \brief  Lists all error statuses.
00186 typedef enum
00187 {
00188     STAT_OK = 0,
00189     STAT_BUSY,
00190     STAT_CRC,
00191     STAT_INVALID_REQ,
00192     STAT_SEQ_NB,
00193     STAT_TIMEOUT,
00194 } StatusType;
00195 
00196 /// \struct MLX_PackNfo
00197 /// \brief  Structure holding various data for packet encoding / decoding.
00198 typedef struct
00199 {
00200     PackType    pktype; ///< Packet type
00201     uint8       size;   ///< Size field
00202     uint8       seq;    ///< Sequence number
00203     FirmType    fwtype; ///< Firmware access type
00204     uint16      addr;   ///< Address field (register or firmware block)
00205     uint32      data;   ///< Useful data (register or firmware value)
00206     const uint8 *dataP; ///< Data pointer for long packets (firmware write)
00207     uint8       iserr;  ///< Is error state for status packet
00208     uint16      error;  ///< Error qualifier for status packet
00209 } MLX_PackNfo;
00210 
00211 //*****************************************************************************
00212 //*************** Public Function Declarations ********************************
00213 //*****************************************************************************
00214 
00215 // *********************
00216 // *** Master functions
00217 // *********************
00218 int  MLX_DecodeResS ( const PACK_SHORT *pack, uint32 *val);
00219 int  MLX_DecodeResL1 ( const PACK_LONG1  *pack);
00220 int  MLX_DecodeResL2 ( const PACK_LONG2  *pack);
00221 
00222 
00223 int  MLX_ReqReadReg ( PACK_SHORT *pack, uint16 reg);
00224 int  MLX_ReqWriteReg( PACK_SHORT *pack, uint16 reg, uint16 val);
00225 int  MLX_ReqReadTrc ( PACK_SHORT *pack);
00226 int  MLX_ReqReadEch ( PACK_SHORT *pack);
00227 int  MLX_ReqWriteFW ( PACK_SHORT *pack, uint size, uint16 data);
00228 
00229 int  MLX_WriteDataL2 ( PACK_LONG2 *pack, uint size, uint seq, const uint8 *data);
00230 
00231 // *********************
00232 // *** Slave functions
00233 // *********************
00234 int  MLX_DecodeReqS ( const PACK_SHORT *pack, MLX_PackNfo *nfo);
00235 int  MLX_ResReadReg ( PACK_SHORT *pack, uint16 val);
00236 int  MLX_ResReadDataL1( PACK_LONG1 *pack, uint size, uint seq, const uint8 *data);
00237 int  MLX_ResReadDataL2( PACK_LONG2 *pack, uint size, uint seq, const uint8 *data);
00238 
00239 // *********************
00240 // *** Generic functions
00241 // *********************
00242 int MLX_EncodeStatusS( PACK_SHORT *pack, uint8 iserr, uint16 err);
00243 int MLX_DecodeStatusS( const PACK_SHORT *pack, uint8 *iserr, uint16 *err);
00244 int MLX_EncodeStatusL1( PACK_LONG1 *pack, uint8 iserr, uint16 err);
00245 int MLX_DecodeStatusL1( const PACK_LONG1 *pack, uint8 *iserr, uint16 *err);
00246 int MLX_EncodeStatusL2( PACK_LONG2 *pack, uint8 iserr, uint16 err);
00247 int MLX_DecodeStatusL2( const PACK_LONG2 *pack, uint8 *iserr, uint16 *err);
00248 
00249 SPI_DLL int    SetBitVector( uint8 *buf, uint32 off, uchar wid, uint32 val, uchar inv);
00250 SPI_DLL int    GetBitVector( const uint8 *buf, uint32 off, uchar wid, uint32 *val, uchar inv);
00251 SPI_DLL uint32 ReverseBits ( uint32 bits, char nb);
00252 
00253 #ifdef __cplusplus
00254 }
00255 #endif
00256 
00257 #endif // _MLX_BASESPI_H_
00258