Steve Kim / mbed-src

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targets/hal/TARGET_NXP/TARGET_LPC82X/spi_api.c@441:d2c15dda23c1, 2015-01-06 (annotated)

Committer:
mbed_official
Date:
Tue Jan 06 16:15:36 2015 +0000
Revision:
441:d2c15dda23c1
Parent:
356:1c135c664c6b
Child:
552:a1b9575155a3
Synchronized with git revision 245a60b29caabb42eabdd19658eeac7c3f68313b



Full URL: https://github.com/mbedmicro/mbed/commit/245a60b29caabb42eabdd19658eeac7c3f68313b/



NUCLEO_F072RB/F091RC - adding target to rtos lib and exporter for coide and gcc_arm

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 337:6ed01c00b962 1 /* mbed Microcontroller Library
mbed_official 337:6ed01c00b962 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 337:6ed01c00b962 3 *
mbed_official 337:6ed01c00b962 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 337:6ed01c00b962 5 * you may not use this file except in compliance with the License.
mbed_official 337:6ed01c00b962 6 * You may obtain a copy of the License at
mbed_official 337:6ed01c00b962 7 *
mbed_official 337:6ed01c00b962 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 337:6ed01c00b962 9 *
mbed_official 337:6ed01c00b962 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 337:6ed01c00b962 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 337:6ed01c00b962 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 337:6ed01c00b962 13 * See the License for the specific language governing permissions and
mbed_official 337:6ed01c00b962 14 * limitations under the License.
mbed_official 337:6ed01c00b962 15 */
mbed_official 337:6ed01c00b962 16 #include "mbed_assert.h"
mbed_official 337:6ed01c00b962 17
mbed_official 337:6ed01c00b962 18 #include "spi_api.h"
mbed_official 337:6ed01c00b962 19 #include "cmsis.h"
mbed_official 337:6ed01c00b962 20 #include "pinmap.h"
mbed_official 337:6ed01c00b962 21 #include "mbed_error.h"
mbed_official 337:6ed01c00b962 22
mbed_official 337:6ed01c00b962 23 #if DEVICE_SPI
mbed_official 337:6ed01c00b962 24
mbed_official 337:6ed01c00b962 25 static const SWM_Map SWM_SPI_SSEL[] = {
mbed_official 337:6ed01c00b962 26 {4, 16},
mbed_official 356:1c135c664c6b 27 {6, 8},
mbed_official 337:6ed01c00b962 28 };
mbed_official 337:6ed01c00b962 29
mbed_official 337:6ed01c00b962 30 static const SWM_Map SWM_SPI_SCLK[] = {
mbed_official 337:6ed01c00b962 31 {3, 24},
mbed_official 356:1c135c664c6b 32 {5, 16},
mbed_official 337:6ed01c00b962 33 };
mbed_official 337:6ed01c00b962 34
mbed_official 337:6ed01c00b962 35 static const SWM_Map SWM_SPI_MOSI[] = {
mbed_official 337:6ed01c00b962 36 {4, 0},
mbed_official 356:1c135c664c6b 37 {5, 24},
mbed_official 337:6ed01c00b962 38 };
mbed_official 337:6ed01c00b962 39
mbed_official 337:6ed01c00b962 40 static const SWM_Map SWM_SPI_MISO[] = {
mbed_official 337:6ed01c00b962 41 {4, 8},
mbed_official 356:1c135c664c6b 42 {6, 0},
mbed_official 337:6ed01c00b962 43 };
mbed_official 337:6ed01c00b962 44
mbed_official 337:6ed01c00b962 45 // bit flags for used SPIs
mbed_official 337:6ed01c00b962 46 static unsigned char spi_used = 0;
mbed_official 337:6ed01c00b962 47
mbed_official 337:6ed01c00b962 48 static int get_available_spi(void)
mbed_official 337:6ed01c00b962 49 {
mbed_official 337:6ed01c00b962 50 int i;
mbed_official 337:6ed01c00b962 51 for (i=0; i<2; i++) {
mbed_official 337:6ed01c00b962 52 if ((spi_used & (1 << i)) == 0)
mbed_official 337:6ed01c00b962 53 return i;
mbed_official 337:6ed01c00b962 54 }
mbed_official 337:6ed01c00b962 55 return -1;
mbed_official 337:6ed01c00b962 56 }
mbed_official 337:6ed01c00b962 57
mbed_official 356:1c135c664c6b 58 static inline void spi_disable(spi_t *obj);
mbed_official 356:1c135c664c6b 59 static inline void spi_enable(spi_t *obj);
mbed_official 337:6ed01c00b962 60
mbed_official 337:6ed01c00b962 61 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
mbed_official 337:6ed01c00b962 62 {
mbed_official 337:6ed01c00b962 63 int spi_n = get_available_spi();
mbed_official 337:6ed01c00b962 64 if (spi_n == -1) {
mbed_official 337:6ed01c00b962 65 error("No available SPI");
mbed_official 337:6ed01c00b962 66 }
mbed_official 337:6ed01c00b962 67 obj->spi_n = spi_n;
mbed_official 337:6ed01c00b962 68 spi_used |= (1 << spi_n);
mbed_official 337:6ed01c00b962 69
mbed_official 337:6ed01c00b962 70 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
mbed_official 337:6ed01c00b962 71
mbed_official 337:6ed01c00b962 72 const SWM_Map *swm;
mbed_official 337:6ed01c00b962 73 uint32_t regVal;
mbed_official 337:6ed01c00b962 74
mbed_official 337:6ed01c00b962 75 if (sclk != (PinName)NC) {
mbed_official 337:6ed01c00b962 76 swm = &SWM_SPI_SCLK[obj->spi_n];
mbed_official 337:6ed01c00b962 77 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 78 LPC_SWM->PINASSIGN[swm->n] = regVal | ((sclk >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 79 }
mbed_official 337:6ed01c00b962 80
mbed_official 337:6ed01c00b962 81 if (mosi != (PinName)NC) {
mbed_official 337:6ed01c00b962 82 swm = &SWM_SPI_MOSI[obj->spi_n];
mbed_official 337:6ed01c00b962 83 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 84 LPC_SWM->PINASSIGN[swm->n] = regVal | ((mosi >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 85 }
mbed_official 337:6ed01c00b962 86
mbed_official 337:6ed01c00b962 87 if (miso != (PinName)NC) {
mbed_official 337:6ed01c00b962 88 swm = &SWM_SPI_MISO[obj->spi_n];
mbed_official 337:6ed01c00b962 89 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 90 LPC_SWM->PINASSIGN[swm->n] = regVal | ((miso >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 91 }
mbed_official 337:6ed01c00b962 92
mbed_official 337:6ed01c00b962 93 if (ssel != (PinName)NC) {
mbed_official 337:6ed01c00b962 94 swm = &SWM_SPI_SSEL[obj->spi_n];
mbed_official 337:6ed01c00b962 95 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 96 LPC_SWM->PINASSIGN[swm->n] = regVal | ((ssel >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 97 }
mbed_official 337:6ed01c00b962 98
mbed_official 337:6ed01c00b962 99 // clear interrupts
mbed_official 337:6ed01c00b962 100 obj->spi->INTENCLR = 0x3f;
mbed_official 337:6ed01c00b962 101
mbed_official 337:6ed01c00b962 102 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (11 + obj->spi_n));
mbed_official 337:6ed01c00b962 103 LPC_SYSCON->PRESETCTRL &= ~(1 << obj->spi_n);
mbed_official 337:6ed01c00b962 104 LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
mbed_official 337:6ed01c00b962 105
mbed_official 337:6ed01c00b962 106 // set default format and frequency
mbed_official 356:1c135c664c6b 107 if (ssel == (PinName)NC) {
mbed_official 337:6ed01c00b962 108 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
mbed_official 337:6ed01c00b962 109 } else {
mbed_official 337:6ed01c00b962 110 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
mbed_official 337:6ed01c00b962 111 }
mbed_official 337:6ed01c00b962 112 spi_frequency(obj, 1000000);
mbed_official 346:accf433c2acf 113 obj->spi->DLY = 2; // 2 SPI clock times pre-delay
mbed_official 337:6ed01c00b962 114
mbed_official 337:6ed01c00b962 115 // enable the ssp channel
mbed_official 356:1c135c664c6b 116 spi_enable(obj);
mbed_official 337:6ed01c00b962 117 }
mbed_official 337:6ed01c00b962 118
mbed_official 337:6ed01c00b962 119 void spi_free(spi_t *obj)
mbed_official 337:6ed01c00b962 120 {
mbed_official 337:6ed01c00b962 121 }
mbed_official 337:6ed01c00b962 122
mbed_official 337:6ed01c00b962 123 void spi_format(spi_t *obj, int bits, int mode, int slave)
mbed_official 337:6ed01c00b962 124 {
mbed_official 337:6ed01c00b962 125 MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
mbed_official 356:1c135c664c6b 126 spi_disable(obj);
mbed_official 337:6ed01c00b962 127
mbed_official 337:6ed01c00b962 128 obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
mbed_official 337:6ed01c00b962 129 obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
mbed_official 337:6ed01c00b962 130
mbed_official 356:1c135c664c6b 131 obj->spi->TXCTL &= ~( 0xF << 24);
mbed_official 356:1c135c664c6b 132 obj->spi->TXCTL |= ((bits - 1) << 24);
mbed_official 337:6ed01c00b962 133
mbed_official 356:1c135c664c6b 134 spi_enable(obj);
mbed_official 337:6ed01c00b962 135 }
mbed_official 337:6ed01c00b962 136
mbed_official 337:6ed01c00b962 137 void spi_frequency(spi_t *obj, int hz)
mbed_official 337:6ed01c00b962 138 {
mbed_official 356:1c135c664c6b 139 spi_disable(obj);
mbed_official 337:6ed01c00b962 140
mbed_official 337:6ed01c00b962 141 // rise DIV value if it cannot be divided
mbed_official 337:6ed01c00b962 142 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
mbed_official 337:6ed01c00b962 143
mbed_official 356:1c135c664c6b 144 spi_enable(obj);
mbed_official 337:6ed01c00b962 145 }
mbed_official 337:6ed01c00b962 146
mbed_official 356:1c135c664c6b 147 static inline void spi_disable(spi_t *obj)
mbed_official 337:6ed01c00b962 148 {
mbed_official 356:1c135c664c6b 149 obj->spi->CFG &= ~(1 << 0);
mbed_official 337:6ed01c00b962 150 }
mbed_official 337:6ed01c00b962 151
mbed_official 356:1c135c664c6b 152 static inline void spi_enable(spi_t *obj)
mbed_official 337:6ed01c00b962 153 {
mbed_official 356:1c135c664c6b 154 obj->spi->CFG |= (1 << 0);
mbed_official 337:6ed01c00b962 155 }
mbed_official 337:6ed01c00b962 156
mbed_official 356:1c135c664c6b 157 static inline int spi_readable(spi_t *obj)
mbed_official 337:6ed01c00b962 158 {
mbed_official 337:6ed01c00b962 159 return obj->spi->STAT & (1 << 0);
mbed_official 337:6ed01c00b962 160 }
mbed_official 337:6ed01c00b962 161
mbed_official 356:1c135c664c6b 162 static inline int spi_writeable(spi_t *obj)
mbed_official 337:6ed01c00b962 163 {
mbed_official 337:6ed01c00b962 164 return obj->spi->STAT & (1 << 1);
mbed_official 337:6ed01c00b962 165 }
mbed_official 337:6ed01c00b962 166
mbed_official 356:1c135c664c6b 167 static inline void spi_write(spi_t *obj, int value)
mbed_official 337:6ed01c00b962 168 {
mbed_official 356:1c135c664c6b 169 while (!spi_writeable(obj));
mbed_official 337:6ed01c00b962 170 // end of transfer
mbed_official 356:1c135c664c6b 171 obj->spi->TXCTL |= (1 << 20);
mbed_official 356:1c135c664c6b 172 obj->spi->TXDAT = (value & 0xffff);
mbed_official 337:6ed01c00b962 173 }
mbed_official 337:6ed01c00b962 174
mbed_official 356:1c135c664c6b 175 static inline int spi_read(spi_t *obj)
mbed_official 337:6ed01c00b962 176 {
mbed_official 356:1c135c664c6b 177 while (!spi_readable(obj));
mbed_official 356:1c135c664c6b 178 return (obj->spi->RXDAT & 0xFFFF);
mbed_official 337:6ed01c00b962 179 }
mbed_official 337:6ed01c00b962 180
mbed_official 356:1c135c664c6b 181 int spi_master_write(spi_t *obj, int value)
mbed_official 356:1c135c664c6b 182 {
mbed_official 356:1c135c664c6b 183 spi_write(obj, value);
mbed_official 356:1c135c664c6b 184 return spi_read(obj);
mbed_official 356:1c135c664c6b 185 }
mbed_official 356:1c135c664c6b 186
mbed_official 441:d2c15dda23c1 187 int spi_busy(spi_t *obj)
mbed_official 337:6ed01c00b962 188 {
mbed_official 337:6ed01c00b962 189 // checking RXOV(Receiver Overrun interrupt flag)
mbed_official 337:6ed01c00b962 190 return obj->spi->STAT & (1 << 2);
mbed_official 337:6ed01c00b962 191 }
mbed_official 337:6ed01c00b962 192
mbed_official 337:6ed01c00b962 193 int spi_slave_receive(spi_t *obj)
mbed_official 337:6ed01c00b962 194 {
mbed_official 356:1c135c664c6b 195 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
mbed_official 337:6ed01c00b962 196 }
mbed_official 337:6ed01c00b962 197
mbed_official 337:6ed01c00b962 198 int spi_slave_read(spi_t *obj)
mbed_official 337:6ed01c00b962 199 {
mbed_official 356:1c135c664c6b 200 return (obj->spi->RXDAT & 0xFFFF);
mbed_official 337:6ed01c00b962 201 }
mbed_official 337:6ed01c00b962 202
mbed_official 337:6ed01c00b962 203 void spi_slave_write(spi_t *obj, int value)
mbed_official 337:6ed01c00b962 204 {
mbed_official 356:1c135c664c6b 205 while (spi_writeable(obj) == 0);
mbed_official 337:6ed01c00b962 206 obj->spi->TXDAT = value;
mbed_official 337:6ed01c00b962 207 }
mbed_official 337:6ed01c00b962 208
mbed_official 337:6ed01c00b962 209 #endif