mbed library sources(for async_print)
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Revision 567:a97fd0eca828, committed 2015-06-15
- Comitter:
- mbed_official
- Date:
- Mon Jun 15 13:30:08 2015 +0100
- Parent:
- 566:85de60b2bbaf
- Child:
- 568:08b2e7b6bab9
- Commit message:
- Synchronized with git revision bfd1361d653d2da4a757612a5ce03f8b065d64e7
Full URL: https://github.com/mbedmicro/mbed/commit/bfd1361d653d2da4a757612a5ce03f8b065d64e7/
Wiznet - Change target name and support InterruptIn function.
Changed in this revision
--- a/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/W7500x.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/W7500x.h Mon Jun 15 13:30:08 2015 +0100 @@ -661,6 +661,15 @@ #define PWM_CH6 ((PWM_CHn_TypeDef *) (W7500x_PWM_BASE + 0x600UL)) #define PWM_CH7 ((PWM_CHn_TypeDef *) (W7500x_PWM_BASE + 0x700UL)) +#define PWM_CH0_BASE (W7500x_PWM_BASE) +#define PWM_CH1_BASE (W7500x_PWM_BASE + 0x100UL) +#define PWM_CH2_BASE (W7500x_PWM_BASE + 0x200UL) +#define PWM_CH3_BASE (W7500x_PWM_BASE + 0x300UL) +#define PWM_CH4_BASE (W7500x_PWM_BASE + 0x400UL) +#define PWM_CH5_BASE (W7500x_PWM_BASE + 0x500UL) +#define PWM_CH6_BASE (W7500x_PWM_BASE + 0x600UL) +#define PWM_CH7_BASE (W7500x_PWM_BASE + 0x700UL) + #define RNG ((RNG_TypeDef *) W7500x_RNG_BASE) #define SSP0 ((SSP_TypeDef*) (SSP0_BASE))
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/PeripheralPins.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/PeripheralPins.h Mon Jun 15 13:30:08 2015 +0100 @@ -53,4 +53,8 @@ extern const PinMap PinMap_SPI_MOSI[]; extern const PinMap PinMap_SPI_MISO[]; extern const PinMap PinMap_SPI_SSEL[]; + +//*** PWM *** + +extern const PinMap PinMap_PWM[]; #endif
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralNames.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralNames.h Mon Jun 15 13:30:08 2015 +0100 @@ -60,14 +60,15 @@ I2C_1 = (int)I2C1_BASE } I2CName; -typedef enum { - PWM_1 = 0 -// PWM_1 = (int)TIM1_BASE, -// PWM_3 = (int)TIM3_BASE, -// PWM_14 = (int)TIM14_BASE, -// PWM_15 = (int)TIM15_BASE, -// PWM_16 = (int)TIM16_BASE, -// PWM_17 = (int)TIM17_BASE +typedef enum { + PWM_0 = (int)PWM_CH0_BASE, + PWM_1 = (int)PWM_CH1_BASE, + PWM_2 = (int)PWM_CH2_BASE, + PWM_3 = (int)PWM_CH3_BASE, + PWM_4 = (int)PWM_CH4_BASE, + PWM_5 = (int)PWM_CH5_BASE, + PWM_6 = (int)PWM_CH6_BASE, + PWM_7 = (int)PWM_CH7_BASE } PWMName; #ifdef __cplusplus
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c Mon Jun 15 13:30:08 2015 +0100 @@ -72,34 +72,56 @@ //*** SPI *** const PinMap PinMap_SPI_SCLK[] = { - {PA_6 , SPI_0, 0}, - {PB_1 , SPI_1, 0}, - {PC_12, SPI_0, 3}, - {PA_12, SPI_1, 3}, + {PA_6 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PB_1 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_12, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_12, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {NC , NC , 0} }; const PinMap PinMap_SPI_MOSI[] = { - {PA_8 , SPI_0, 0}, - {PB_3 , SPI_1, 0}, - {PC_10, SPI_0, 3}, - {PA_14, SPI_1, 3}, + {PA_8 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PB_3 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_10, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_14, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {NC , NC , 0} }; const PinMap PinMap_SPI_MISO[] = { - {PA_7 , SPI_0, 0}, - {PB_2 , SPI_1, 0}, - {PC_11, SPI_0, 3}, - {PA_13, SPI_1, 3}, + {PA_7 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PB_2 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_11, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_13, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {NC , NC , 0} }; const PinMap PinMap_SPI_SSEL[] = { - {PA_5 , SPI_0, 0}, - {PB_0 , SPI_1, 0}, - {PC_13, SPI_0, 3}, - {PA_11, SPI_1, 3}, + {PA_5 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PB_0 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_13, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_11, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {NC , NC , 0} }; +const PinMap PinMap_PWM[] = { + {PA_0 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PA_1 , PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PA_5 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_6 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_7 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_8 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_9 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_10, PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PC_0 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_1 , PWM_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_2 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_3 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_4 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_5 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_8 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_9 , PWM_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {PC_10, PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_11, PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {NC , NC , WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)} +}; +
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PinNames.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PinNames.h Mon Jun 15 13:30:08 2015 +0100 @@ -39,10 +39,10 @@ // See W7500x_hal_gpio.h for values of MODE, PUPD and AFNUM -#define WIZ_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((AFNUM) << 8) | ((PUPD) << 4) | ((MODE) << 0))) -#define WIZ_PIN_MODE(X) (((X) >> 0) & 0x0F) +#define WIZ_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((MODE) << 8) | ((PUPD) << 4) | ((AFNUM) << 0))) #define WIZ_PIN_PUPD(X) (((X) >> 4) & 0x0F) -#define WIZ_PIN_AFNUM(X) (((X) >> 8) & 0x0F) +#define WIZ_PIN_AFNUM(X) (((X) >> 0) & 0x0F) +#define WIZ_PIN_MODE(X) (((X) >> 8) & 0x0F) #define WIZ_MODE_INPUT (0) #define WIZ_MODE_OUTPUT (1) #define WIZ_MODE_AF (2) @@ -53,9 +53,9 @@ #define WIZ_GPIO_OPEN_DRAIN (3) /*!< Open Drain activation */ -#define WIZ_AFNUM(X)(((uint32_t)(X) >> 8) & 0xF) // AF number (0=AF0, 1=AF1, 2=AF2, 3=AF3) #define WIZ_PORT(X) (((uint32_t)(X) >> 4) & 0xF) // port number (0=A, 1=B, 2=C, 3=D) -#define WIZ_PIN(X) ((uint32_t)(X) & 0xF) // pin number +#define WIZ_PIN_NUM(X) ((uint32_t)(X) & 0xF) // pin number +#define WIZ_PIN_INDEX(X) (1 << ((uint32_t)(X) & 0xF)) // pin index : flag bit typedef enum { @@ -65,8 +65,7 @@ typedef enum { - // W7500x Pin Names (AF[9:8] + PORT[5:4] + PIN[3:0]) - + // W7500x PORT[5:4] + PIN[3:0]) PA_0 = 0x000, PA_1 = 0x001, PA_2 = 0x002, @@ -83,7 +82,7 @@ PA_13 = 0x00D, PA_14 = 0x00E, PA_15 = 0x00F, - + PB_0 = 0x010, //SSEL1/SD_SEL PB_1 = 0x011, //SCLK1/SD_CLK PB_2 = 0x012, //MISO1/SD_MISO @@ -100,25 +99,25 @@ PB_13 = 0x01D, PB_14 = 0x01E, PB_15 = 0x01F, - - PC_0 = 0x120, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0 - PC_1 = 0x121, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1 + + PC_0 = 0x020, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0 + PC_1 = 0x021, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1 PC_2 = 0x022, PC_3 = 0x023, - PC_4 = 0x124, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4 + PC_4 = 0x024, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4 PC_5 = 0x025, PC_6 = 0x026, PC_7 = 0x027, - PC_8 = 0x128, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7 - PC_9 = 0x129, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6 - - PC_10 = 0x32A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5 - PC_11 = 0x32B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4 - PC_12 = 0x32C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3 - PC_13 = 0x32D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2 - PC_14 = 0x32E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1 - PC_15 = 0x32F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0 - + PC_8 = 0x028, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7 + PC_9 = 0x029, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6 + + PC_10 = 0x02A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5 + PC_11 = 0x02B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4 + PC_12 = 0x02C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3 + PC_13 = 0x02D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2 + PC_14 = 0x02E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1 + PC_15 = 0x02F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0 + PD_0 = 0x030, PD_1 = 0x031, PD_2 = 0x032, @@ -185,7 +184,6 @@ PullNone = 0, PullDown = 1, PullUp = 2, - OpenDrain = 3, PullDefault = PullNone } PinMode;
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device.h Mon Jun 15 13:30:08 2015 +0100 @@ -50,7 +50,7 @@ #define DEVICE_RTC 0 -#define DEVICE_PWMOUT 0 +#define DEVICE_PWMOUT 1 #define DEVICE_SLEEP 0
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/objects.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/objects.h Mon Jun 15 13:30:08 2015 +0100 @@ -43,9 +43,13 @@ struct gpio_irq_s { IRQn_Type irq_n; - uint32_t irq_index; uint32_t event; PinName pin; + uint32_t pin_index; + uint32_t pin_num; + uint32_t port_num; + uint32_t rise_null; + uint32_t fall_null; }; struct port_s { @@ -83,10 +87,11 @@ }; struct pwmout_s { - PWMName pwm; + PWM_CHn_TypeDef * PWM_CHx; PinName pin; uint32_t period; uint32_t pulse; + uint32_t PrescalerValue; }; #include "gpio_object.h"
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_api.c Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_api.c Mon Jun 15 13:30:08 2015 +0100 @@ -34,34 +34,32 @@ extern uint32_t Get_GPIO_BaseAddress(uint32_t port_idx); -uint32_t gpio_set(PinName pin) -{ - MBED_ASSERT(pin != (PinName)NC); +//uint32_t gpio_set(PinName pin) +//{ +// MBED_ASSERT(pin != (PinName)NC); - pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0)); +// //pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 1)); - return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask -} +// return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask +//} void gpio_init(gpio_t *obj, PinName pin) { - obj->pin = pin; if (pin == (PinName)NC) { return; } - - uint32_t port_index = WIZ_PORT(pin); - - GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_index); - - // Fill GPIO object structure for future use - obj->mask = gpio_set(pin); + + obj->port_num = WIZ_PORT(pin); + obj->pin_index = WIZ_PIN_INDEX(pin); + obj->pin = pin; + GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(obj->port_num); obj->reg_data_in = &gpio->DATA; } void gpio_mode(gpio_t *obj, PinMode mode) { pin_mode(obj->pin, mode); + obj->mode = mode; } void gpio_dir(gpio_t *obj, PinDirection direction) @@ -69,9 +67,5 @@ MBED_ASSERT(obj->pin != (PinName)NC); obj->direction = direction; - if (direction == PIN_OUTPUT) { - pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_OUTPUT, WIZ_GPIO_NOPULL, 0)); - } else { // PIN_INPUT - pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0)); - } + pin_function(obj->pin, WIZ_PIN_DATA(obj->direction, obj->mode, 1)); }
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_irq_api.c Mon Jun 15 13:30:08 2015 +0100 @@ -0,0 +1,175 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of ARM Limited nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#include <stddef.h> +#include "cmsis.h" +#include "gpio_irq_api.h" +#include "pinmap.h" +#include "mbed_error.h" + +#define EDGE_NONE (0) +#define EDGE_RISE (1) +#define EDGE_FALL (2) +#define EDGE_BOTH (3) + +static gpio_irq_handler irq_handler; + +static uint32_t channel_ids[4][16]; + +#ifdef __cplusplus +extern "C"{ +#endif + + +void PORT0_Handler(void) +{ + port_generic_handler(GPIOA, 0); +} + +void PORT1_Handler(void) +{ + port_generic_handler(GPIOB, 1); +} + +void PORT2_Handler(void) +{ + port_generic_handler(GPIOC, 2); +} + +void PORT3_Handler(void) +{ + port_generic_handler(GPIOD, 3); +} + +void port_generic_handler(GPIO_TypeDef* GPIOx, uint32_t port_num) +{ + int i = 0; + int loop = 16; + + if(GPIOx == GPIOD) loop = 5; + + for(i=0; i<loop; i++) + { + if(GPIOx->Interrupt.INTSTATUS & (1 << i)) + { + GPIOx->Interrupt.INTCLEAR |= (1 << i); + if(GPIOx->INTPOLSET >> i) //rising + irq_handler(channel_ids[port_num][i], IRQ_RISE); + else //falling + irq_handler(channel_ids[port_num][i], IRQ_FALL); + } + } +} + +#ifdef __cplusplus +} +#endif + + +int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) +{ + obj->port_num = WIZ_PORT(pin); + obj->pin_num = WIZ_PIN_NUM(pin); + obj->pin_index = WIZ_PIN_INDEX(pin); + + if (pin == NC) return -1; + + if(obj->port_num == 0) + obj->irq_n = PORT0_IRQn; + else if(obj->port_num == 1) + obj->irq_n = PORT1_IRQn; + else if(obj->port_num == 2) + obj->irq_n = PORT2_IRQn; + else + obj->irq_n = PORT3_IRQn; + + //obj->event = EDGE_FALL; + obj->pin = pin; + + // Enable EXTI interrupt + NVIC_EnableIRQ(obj->irq_n); + + channel_ids[obj->port_num][obj->pin_num] = id; + + irq_handler = handler; + + return 0; +} + +void gpio_irq_free(gpio_irq_t *obj) +{ + channel_ids[obj->port_num][obj->pin_num] = 0; + + obj->event = EDGE_NONE; +} + +void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) +{ + GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(obj->port_num); + + if (enable) { + if (event == IRQ_RISE) { + gpio->INTPOLSET |= obj->pin_index; + obj->event = EDGE_RISE; + obj->rise_null = 0; + } + else if (event == IRQ_FALL) { + gpio->INTPOLSET &= ~obj->pin_index; + obj->event = EDGE_FALL; + obj->fall_null = 0; + } + gpio->INTTYPESET |= obj->pin_index; + gpio->INTENSET |= obj->pin_index; + + + } else { + if (event == IRQ_RISE) { + obj->rise_null = 1; + if(obj->fall_null) + gpio->INTENCLR |= obj->pin_index; + } + else if (event == IRQ_FALL) { + obj->fall_null = 1; + if(obj->rise_null) + gpio->INTENCLR |= obj->pin_index; + } + } +} + +void gpio_irq_enable(gpio_irq_t *obj) +{ + NVIC_EnableIRQ(obj->irq_n); +} + +void gpio_irq_disable(gpio_irq_t *obj) +{ + NVIC_DisableIRQ(obj->irq_n); + obj->event = EDGE_NONE; +}
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_object.h Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_object.h Mon Jun 15 13:30:08 2015 +0100 @@ -39,8 +39,10 @@ typedef struct { PinName pin; - uint32_t mask; + uint32_t pin_index; + uint32_t port_num; uint32_t direction; + uint32_t mode; __IO uint32_t *reg_data_in; } gpio_t; @@ -51,20 +53,19 @@ static inline void gpio_write(gpio_t *obj, int value) { MBED_ASSERT(obj->pin != (PinName)NC); - uint32_t port_index = WIZ_PORT(obj->pin); - uint32_t pin_index = WIZ_PIN(obj->pin); + uint32_t port_num = WIZ_PORT(obj->pin); + uint32_t pin_index = WIZ_PIN_INDEX(obj->pin); - uint32_t gpio_add = Get_GPIO_BaseAddress(port_index); - GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; - + GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num); + if (value) { - HAL_GPIO_SetBits(gpio,(0x01 << pin_index)); + HAL_GPIO_SetBits(gpio, pin_index); } else { - HAL_GPIO_ResetBits(gpio,(0x01 << pin_index)); + HAL_GPIO_ResetBits(gpio, pin_index); } } @@ -73,18 +74,17 @@ MBED_ASSERT(obj->pin != (PinName)NC); - uint32_t port_index = WIZ_PORT(obj->pin); + uint32_t port_num = WIZ_PORT(obj->pin); - uint32_t gpio_add = Get_GPIO_BaseAddress(port_index); - GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; + GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num); if(obj->direction == PIN_OUTPUT) { - ret = ( HAL_GPIO_ReadOutputData(gpio) & obj->mask ) ? 1 : 0; + ret = ( HAL_GPIO_ReadOutputData(gpio) & obj->pin_index ) ? 1 : 0; } else { - ret = ((*obj->reg_data_in & obj->mask) ? 1 : 0); + ret = ((*obj->reg_data_in & obj->pin_index) ? 1 : 0); } return ret;
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/i2c_api.c Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/i2c_api.c Mon Jun 15 13:30:08 2015 +0100 @@ -63,8 +63,8 @@ // Configure I2C pins pinmap_pinout(sda, PinMap_I2C_SDA); pinmap_pinout(scl, PinMap_I2C_SCL); - pin_mode(sda, OpenDrain); - pin_mode(scl, OpenDrain); + pin_mode(sda, PullUp); + pin_mode(scl, PullUp); } // Enable I2C2 clock and pinout if not done @@ -73,8 +73,8 @@ // Configure I2C pins pinmap_pinout(sda, PinMap_I2C_SDA); pinmap_pinout(scl, PinMap_I2C_SCL); - pin_mode(sda, OpenDrain); - pin_mode(scl, OpenDrain); + pin_mode(sda, PullUp); + pin_mode(scl, PullUp); } // Reset to clear pending flags if any
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/pinmap.c Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/pinmap.c Mon Jun 15 13:30:08 2015 +0100 @@ -31,16 +31,8 @@ #include "mbed_assert.h" #include "pinmap.h" #include "PortNames.h" - +#include "mbed_error.h" -// GPIO mode look-up table -// It have to same with PinMode index in "PinNames.h" -static const uint32_t gpio_pupd[4] = { - GPIO_NO_PUPD, // PullNone - GPIO_PuPd_DOWN, // PullDown - GPIO_PuPd_UP, // PullUp - GPIO_OD // OpenDrain -}; uint32_t Get_GPIO_BaseAddress(uint32_t port_idx) { @@ -65,7 +57,6 @@ return gpio_add; } - /** * Configure pin (input, output, alternate function or analog) + output speed + AF */ @@ -75,34 +66,27 @@ // Get the pin informations uint32_t mode = WIZ_PIN_MODE(data); uint32_t pupd = WIZ_PIN_PUPD(data); - uint32_t afnum; - - if( mode == WIZ_MODE_AF ) - afnum = WIZ_PIN_AFNUM(data); - else - afnum = WIZ_AFNUM(pin); - - uint32_t port_index = WIZ_PORT(pin); - uint32_t pin_index = WIZ_PIN(pin); - - - uint32_t gpio_add = Get_GPIO_BaseAddress(port_index); - GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; + uint32_t afnum = WIZ_PIN_AFNUM(data); + + uint32_t port_num = WIZ_PORT(pin); + uint32_t pin_index = WIZ_PIN_INDEX(pin); + + GPIO_TypeDef *gpio; // Configure Alternate Function // Warning: Must be done before the GPIO is initialized switch (afnum) { case 0: - HAL_PAD_AFConfig(port_index,(uint32_t)(1 << pin_index),Px_AFSR_AF0); + HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF0); break; case 1: - HAL_PAD_AFConfig(port_index,(uint32_t)(1 << pin_index),Px_AFSR_AF1); + HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF1); break; case 2: - HAL_PAD_AFConfig(port_index,(uint32_t)(1 << pin_index),Px_AFSR_AF2); + HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF2); break; case 3: - HAL_PAD_AFConfig(port_index,(uint32_t)(1 << pin_index),Px_AFSR_AF3); + HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF3); break; default: break; @@ -112,10 +96,12 @@ return; // Configure GPIO + gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num); + GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.GPIO_Pin = (uint32_t)(1 << pin_index); - GPIO_InitStructure.GPIO_Mode = mode; - GPIO_InitStructure.GPIO_Pad = gpio_pupd[pupd]; + GPIO_InitStructure.GPIO_Pin = pin_index; + GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode; + GPIO_InitStructure.GPIO_Pad = (GPIOPad_TypeDef)pupd; HAL_GPIO_Init(gpio, &GPIO_InitStructure); } @@ -125,30 +111,25 @@ void pin_mode(PinName pin, PinMode pupd) { MBED_ASSERT(pin != (PinName)NC); - - P_Port_Def *px_pcr; + + uint32_t port_num = WIZ_PORT(pin); + uint32_t pin_num = WIZ_PIN_NUM(pin); - uint32_t port_index = WIZ_PORT(pin); - - switch(port_index) { + switch(port_num) { case PortA: - px_pcr = PA_PCR; + PA_PCR->Port[pin_num] |= pupd; break; case PortB: - px_pcr = PB_PCR; + PB_PCR->Port[pin_num] |= pupd; break; case PortC: - px_pcr = PC_PCR; + PC_PCR->Port[pin_num] |= pupd; break; case PortD: - px_pcr = (P_Port_Def*)PD_PCR; + PD_PCR->Port[pin_num] |= pupd; break; default: - error("Pinmap error: wrong port number."); + error("Pinmap error: wrong port number."); return; } - - px_pcr->Port[port_index] &= ~(Px_PCR_PUPD_DOWN|Px_PCR_PUPD_UP|Px_PCR_DS_HIGH| \ - Px_PCR_OD | Px_PCR_IE | Px_PCR_CS_SUMMIT); - px_pcr->Port[port_index] |= gpio_pupd[pupd]; }
--- a/targets/hal/TARGET_WIZNET/TARGET_W7500x/port_api.c Mon Jun 15 13:15:08 2015 +0100 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/port_api.c Mon Jun 15 13:30:08 2015 +0100 @@ -53,11 +53,11 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { - uint32_t port_index = (uint32_t)port; + uint32_t port_num = (uint32_t)port; // Enable GPIO clock - uint32_t gpio_add = Get_GPIO_BaseAddress(port_index); - GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; + GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num); + // Fill PORT object structure for future use obj->port = port;
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/pwmout_api.c Mon Jun 15 13:30:08 2015 +0100 @@ -0,0 +1,144 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of ARM Limited nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#include "pwmout_api.h" + +#if DEVICE_PWMOUT + +#include "cmsis.h" +#include "pinmap.h" +#include "mbed_error.h" +#include "PeripheralPins.h" + +static PWM_TimerModeInitTypeDef TimerModeStructure; + +void pwmout_init(pwmout_t* obj, PinName pin) +{ + // Get the peripheral name from the pin and assign it to the object + obj->PWM_CHx = (PWM_CHn_TypeDef *)pinmap_peripheral(pin, PinMap_PWM); + + if (obj->PWM_CHx == (PWM_CHn_TypeDef *)NC) { + error("PWM error: pinout mapping failed."); + } + + // Configure GPIO + pinmap_pinout(pin, PinMap_PWM); + + GetSystemClock(); + + obj->pin = pin; + + pwmout_period_us(obj, 20000); // 20 ms per default +} + +void pwmout_free(pwmout_t* obj) +{ + // Configure GPIO + pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)); +} + +void pwmout_write(pwmout_t* obj, float value) +{ + if (value < (float)0.0) { + value = 0.0; + } else if (value > (float)1.0) { + value = 1.0; + } + + obj->pulse = (uint32_t)((float)obj->period * value); + + PWM_CHn_Stop(obj->PWM_CHx); + + TimerModeStructure.PWM_CHn_PR = obj->PrescalerValue - 1; + TimerModeStructure.PWM_CHn_MR = obj->pulse; + TimerModeStructure.PWM_CHn_LR = obj->period; + TimerModeStructure.PWM_CHn_UDMR = PWM_CHn_UDMR_UpCount; + TimerModeStructure.PWM_CHn_PDMR = PWM_CHn_PDMR_Periodic; + + PWM_TimerModeInit(obj->PWM_CHx, &TimerModeStructure); + + PWM_CHn_Start(obj->PWM_CHx); +} + +float pwmout_read(pwmout_t* obj) +{ + float value = 0; + if (obj->period > 0) { + value = (float)(obj->pulse) / (float)(obj->period); + } + return ((value > (float)1.0) ? (float)(1.0) : (value)); +} + +void pwmout_period(pwmout_t* obj, float seconds) +{ + pwmout_period_us(obj, seconds * 1000000.0f); +} + +void pwmout_period_ms(pwmout_t* obj, int ms) +{ + pwmout_period_us(obj, ms * 1000); +} + +void pwmout_period_us(pwmout_t* obj, int us) +{ + PWM_CHn_Stop(obj->PWM_CHx); + // Update the SystemCoreClock variable + SystemCoreClockUpdate(); + + obj->period = (us * 2) - 1; + obj->pulse = us / 2; + + obj->PrescalerValue = (SystemCoreClock / 1000000) / 2; + TimerModeStructure.PWM_CHn_PR = obj->PrescalerValue - 1; + TimerModeStructure.PWM_CHn_MR = obj->pulse; + TimerModeStructure.PWM_CHn_LR = obj->period; + TimerModeStructure.PWM_CHn_UDMR = PWM_CHn_UDMR_UpCount; + TimerModeStructure.PWM_CHn_PDMR = PWM_CHn_PDMR_Periodic; + + PWM_TimerModeInit(obj->PWM_CHx, &TimerModeStructure); + PWM_CtrlPWMOutputEnable(obj->PWM_CHx); +} + +void pwmout_pulsewidth(pwmout_t* obj, float seconds) +{ + pwmout_pulsewidth_us(obj, seconds * 1000000.0f); +} + +void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) +{ + pwmout_pulsewidth_us(obj, ms * 1000); +} + +void pwmout_pulsewidth_us(pwmout_t* obj, int us) +{ + float value = (float)(2 * us) / (float)obj->period; + pwmout_write(obj, value); +} + +#endif