Revision 515:7467ef1f4ad8, committed 2015-04-17

Comitter:

mbed_official

Date:

Fri Apr 17 08:45:07 2015 +0100

Parent:

514:7668256dbe61

Child:

516:b3fb5c6901a6

Commit message:

Synchronized with git revision faba4123ec6e5b7784e20f49bf5310dcab92c053

Full URL: https://github.com/mbedmicro/mbed/commit/faba4123ec6e5b7784e20f49bf5310dcab92c053/

[MAXWSNENV, MAX32600MBED] Adding export support.

Changed in this revision

--- a/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c	Fri Apr 17 08:45:07 2015 +0100
@@ -109,7 +109,7 @@
 }
 
 // This function to be implemented by the hal
-extern void low_level_init();
+extern void low_level_init(void);
 
 void SystemInit(void)
 {

--- a/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c	Fri Apr 17 08:45:07 2015 +0100
@@ -109,7 +109,7 @@
 }
 
 // This function to be implemented by the hal
-extern void low_level_init();
+extern void low_level_init(void);
 
 void SystemInit(void)
 {

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c	Fri Apr 17 08:45:07 2015 +0100
@@ -85,4 +85,4 @@
     /* Switch to the PLL */
     MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) |
                            ((MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2 << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS));
-}
\ No newline at end of file
+}

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c	Fri Apr 17 08:45:07 2015 +0100
@@ -117,7 +117,7 @@
 
     /* enable the requested interrupt */
     MXC_GPIO->inten[port] |= (1 << pin);
-    NVIC_EnableIRQ(GPIO_P0_IRQn + port);
+    NVIC_EnableIRQ((IRQn_Type)((uint32_t)GPIO_P0_IRQn + port));
 
     return 0;
 }

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c	Fri Apr 17 08:45:07 2015 +0100
@@ -96,7 +96,7 @@
 
     if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
         // the timestamp has expired
-        event_cnt = -1;                   // reset to max value
+        event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
         us_ticker_irq_handler();
     } else {
 
@@ -112,7 +112,7 @@
                 US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
                 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
                 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
-                event_cnt = -1;                   // reset to max value
+                event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
                 us_ticker_irq_handler();
             }
         }
@@ -127,7 +127,7 @@
     us_ticker_inited = 1;
 
     current_cnt = 0;
-    event_cnt = -1;       // initialize to max value
+    event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
 
     if (SystemCoreClock <= 1000000) {
         error("us_ticker cannot operate at this SystemCoreClock");

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c	Fri Apr 17 08:45:07 2015 +0100
@@ -38,11 +38,11 @@
 #include "afe_regs.h"
 #include "PeripheralPins.h"
 
-#define PGA_TRK_CNT     0x8
+#define PGA_TRK_CNT     0x1F
 #define ADC_ACT_CNT     0x1
 #define ADC_PGA_CNT     0x1
 #define ADC_ACQ_CNT     0x1
-#define ADC_SLP_CNT     0x0
+#define ADC_SLP_CNT     0x1
  
 //******************************************************************************
 void analogin_init(analogin_t *obj, PinName pin)
@@ -100,6 +100,12 @@
         mux_pos = (obj->adc_pin & 0xF) + 8;
     }
 
+    // Reset the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
+
+    // Enable the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
+
     // Setup the ADC clock
     MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
         MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
@@ -119,9 +125,6 @@
         (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
         (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
 
-    // Enable the ADC
-    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
-
     // Clear the done bit
     obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
 

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c	Fri Apr 17 08:45:07 2015 +0100
@@ -183,8 +183,7 @@
         MXC_F_DAC_CTRL0_CLOCK_GATE_EN | MXC_F_DAC_CTRL0_CPU_START);
 
     if(obj->index < 2) {
-        // Convert 16 bits to 12 bits
-        obj->out = (value >> 4);
+        obj->out = (value);
         obj->dac_fifo->output_16 = (obj->out);
 
     } else {

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c	Fri Apr 17 08:45:07 2015 +0100
@@ -118,7 +118,7 @@
 
     /* enable the requested interrupt */
     MXC_GPIO->inten[port] |= (1 << pin);
-    NVIC_EnableIRQ(GPIO_P0_IRQn + port);
+    NVIC_EnableIRQ((IRQn_Type)((uint32_t)GPIO_P0_IRQn + port));
 
     return 0;
 }

--- a/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c	Thu Apr 16 11:45:13 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c	Fri Apr 17 08:45:07 2015 +0100
@@ -96,7 +96,7 @@
 
     if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
         // the timestamp has expired
-        event_cnt = -1;                   // reset to max value
+        event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
         us_ticker_irq_handler();
     } else {
 
@@ -112,7 +112,7 @@
                 US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
                 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
                 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
-                event_cnt = -1;                   // reset to max value
+                event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
                 us_ticker_irq_handler();
             }
         }
@@ -127,7 +127,7 @@
     us_ticker_inited = 1;
 
     current_cnt = 0;
-    event_cnt = -1;       // initialize to max value
+    event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
 
     if (SystemCoreClock <= 1000000) {
         error("us_ticker cannot operate at this SystemCoreClock");