Steve Kim
mbed library sources(for async_print)
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mbed-src
by 
mbed official
Revision 483:37da4976ca27, committed 2015-02-28
- Comitter:
- mbed_official
- Date:
- Sat Feb 28 07:15:07 2015 +0000
- Parent:
- 482:d9a48e768ce0
- Child:
- 484:b5ae48b573d3
- Commit message:
- Synchronized with git revision 088b5c41a77dd90036d81cce1cfbfa017a7cad84
Full URL: https://github.com/mbedmicro/mbed/commit/088b5c41a77dd90036d81cce1cfbfa017a7cad84/
IAR support: Fixed stack and heap sizes for MTS DRAGONFLY and MTS MDOT F...
Changed in this revision
--- a/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0f8; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x800; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x600; +define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf Sat Feb 28 07:15:07 2015 +0000 @@ -7,12 +7,13 @@ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x0007ffff; define symbol __ICFEDIT_region_NVIC_start__ = 0x1fff0000; -define symbol __ICFEDIT_region_NVIC_end__ = 0x1fff0197; -define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0198; +define symbol __ICFEDIT_region_NVIC_end__ = 0x1fff03ff; +define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0400; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x4000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; +define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_IAR/MKL05Z4.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_IAR/MKL05Z4.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ +/*Heap 1/4 of ram and stack 1/8*/ define symbol __ICFEDIT_size_cstack__ = 0x200; -define symbol __ICFEDIT_size_heap__ = 0x200; +define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_IAR/MKL25Z4.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_IAR/MKL25Z4.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0xA00; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_heap__ = 0x1000; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/TOOLCHAIN_IAR/MKL46Z4.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/TOOLCHAIN_IAR/MKL46Z4.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x1000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; +define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/MK64F.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/MK64F.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0198; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x4000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x8000; +define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM2_start__ = 0x20000000;
--- a/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/startup_MK64F12.s Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/startup_MK64F12.s Sat Feb 28 07:15:07 2015 +0000
@@ -138,160 +138,7 @@
DCD ENET_Transmit_IRQHandler ; Ethernet MAC Transmit Interrupt
DCD ENET_Receive_IRQHandler ; Ethernet MAC Receive Interrupt
DCD ENET_Error_IRQHandler ; Ethernet MAC Error and miscelaneous Interrupt
- DCD Default_Handler ; 102
- DCD Default_Handler ; 103
- DCD Default_Handler ; 104
- DCD Default_Handler ; 105
- DCD Default_Handler ; 106
- DCD Default_Handler ; 107
- DCD Default_Handler ; 108
- DCD Default_Handler ; 109
- DCD Default_Handler ; 110
- DCD Default_Handler ; 111
- DCD Default_Handler ; 112
- DCD Default_Handler ; 113
- DCD Default_Handler ; 114
- DCD Default_Handler ; 115
- DCD Default_Handler ; 116
- DCD Default_Handler ; 117
- DCD Default_Handler ; 118
- DCD Default_Handler ; 119
- DCD Default_Handler ; 120
- DCD Default_Handler ; 121
- DCD Default_Handler ; 122
- DCD Default_Handler ; 123
- DCD Default_Handler ; 124
- DCD Default_Handler ; 125
- DCD Default_Handler ; 126
- DCD Default_Handler ; 127
- DCD Default_Handler ; 128
- DCD Default_Handler ; 129
- DCD Default_Handler ; 130
- DCD Default_Handler ; 131
- DCD Default_Handler ; 132
- DCD Default_Handler ; 133
- DCD Default_Handler ; 134
- DCD Default_Handler ; 135
- DCD Default_Handler ; 136
- DCD Default_Handler ; 137
- DCD Default_Handler ; 138
- DCD Default_Handler ; 139
- DCD Default_Handler ; 140
- DCD Default_Handler ; 141
- DCD Default_Handler ; 142
- DCD Default_Handler ; 143
- DCD Default_Handler ; 144
- DCD Default_Handler ; 145
- DCD Default_Handler ; 146
- DCD Default_Handler ; 147
- DCD Default_Handler ; 148
- DCD Default_Handler ; 149
- DCD Default_Handler ; 150
- DCD Default_Handler ; 151
- DCD Default_Handler ; 152
- DCD Default_Handler ; 153
- DCD Default_Handler ; 154
- DCD Default_Handler ; 155
- DCD Default_Handler ; 156
- DCD Default_Handler ; 157
- DCD Default_Handler ; 158
- DCD Default_Handler ; 159
- DCD Default_Handler ; 160
- DCD Default_Handler ; 161
- DCD Default_Handler ; 162
- DCD Default_Handler ; 163
- DCD Default_Handler ; 164
- DCD Default_Handler ; 165
- DCD Default_Handler ; 166
- DCD Default_Handler ; 167
- DCD Default_Handler ; 168
- DCD Default_Handler ; 169
- DCD Default_Handler ; 170
- DCD Default_Handler ; 171
- DCD Default_Handler ; 172
- DCD Default_Handler ; 173
- DCD Default_Handler ; 174
- DCD Default_Handler ; 175
- DCD Default_Handler ; 176
- DCD Default_Handler ; 177
- DCD Default_Handler ; 178
- DCD Default_Handler ; 179
- DCD Default_Handler ; 180
- DCD Default_Handler ; 181
- DCD Default_Handler ; 182
- DCD Default_Handler ; 183
- DCD Default_Handler ; 184
- DCD Default_Handler ; 185
- DCD Default_Handler ; 186
- DCD Default_Handler ; 187
- DCD Default_Handler ; 188
- DCD Default_Handler ; 189
- DCD Default_Handler ; 190
- DCD Default_Handler ; 191
- DCD Default_Handler ; 192
- DCD Default_Handler ; 193
- DCD Default_Handler ; 194
- DCD Default_Handler ; 195
- DCD Default_Handler ; 196
- DCD Default_Handler ; 197
- DCD Default_Handler ; 198
- DCD Default_Handler ; 199
- DCD Default_Handler ; 200
- DCD Default_Handler ; 201
- DCD Default_Handler ; 202
- DCD Default_Handler ; 203
- DCD Default_Handler ; 204
- DCD Default_Handler ; 205
- DCD Default_Handler ; 206
- DCD Default_Handler ; 207
- DCD Default_Handler ; 208
- DCD Default_Handler ; 209
- DCD Default_Handler ; 210
- DCD Default_Handler ; 211
- DCD Default_Handler ; 212
- DCD Default_Handler ; 213
- DCD Default_Handler ; 214
- DCD Default_Handler ; 215
- DCD Default_Handler ; 216
- DCD Default_Handler ; 217
- DCD Default_Handler ; 218
- DCD Default_Handler ; 219
- DCD Default_Handler ; 220
- DCD Default_Handler ; 221
- DCD Default_Handler ; 222
- DCD Default_Handler ; 223
- DCD Default_Handler ; 224
- DCD Default_Handler ; 225
- DCD Default_Handler ; 226
- DCD Default_Handler ; 227
- DCD Default_Handler ; 228
- DCD Default_Handler ; 229
- DCD Default_Handler ; 230
- DCD Default_Handler ; 231
- DCD Default_Handler ; 232
- DCD Default_Handler ; 233
- DCD Default_Handler ; 234
- DCD Default_Handler ; 235
- DCD Default_Handler ; 236
- DCD Default_Handler ; 237
- DCD Default_Handler ; 238
- DCD Default_Handler ; 239
- DCD Default_Handler ; 240
- DCD Default_Handler ; 241
- DCD Default_Handler ; 242
- DCD Default_Handler ; 243
- DCD Default_Handler ; 244
- DCD Default_Handler ; 245
- DCD Default_Handler ; 246
- DCD Default_Handler ; 247
- DCD Default_Handler ; 248
- DCD Default_Handler ; 249
- DCD Default_Handler ; 250
- DCD Default_Handler ; 251
- DCD Default_Handler ; 252
- DCD Default_Handler ; 253
- DCD Default_Handler ; 254
- DCD Default_Handler ; 255
+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;Flash Configuration
;;16-byte flash configuration field that stores default protection settings (loaded on reset)
--- a/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf Sat Feb 28 07:15:07 2015 +0000 @@ -9,8 +9,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x20002000; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x1000; -define symbol __ICFEDIT_size_heap__ = 0x1000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0xc00; +define symbol __ICFEDIT_size_heap__ = 0x1800; /**** End of ICF editor section. ###ICF###*/ define symbol __code_start_soft_device__ = 0x0;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x10000100; define symbol __ICFEDIT_region_RAM_end__ = 0x10007FDF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x800; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; +define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC13XX/TOOLCHAIN_IAR/LPC1347.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC13XX/TOOLCHAIN_IAR/LPC1347.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,7 +11,7 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/TOOLCHAIN_IAR/LPC15xx.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/TOOLCHAIN_IAR/LPC15xx.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x02000100; define symbol __ICFEDIT_region_RAM_end__ = 0x02008FDF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x1000; -define symbol __ICFEDIT_size_heap__ = 0x2000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1200; +define symbol __ICFEDIT_size_heap__ = 0x2400; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_IAR/LPC17xx.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_IAR/LPC17xx.icf Sat Feb 28 07:15:07 2015 +0000 @@ -12,8 +12,9 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x10007FDF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x1000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; +define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_IAR/LPC4088.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_IAR/LPC4088.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x100000E8; define symbol __ICFEDIT_region_RAM_end__ = 0x1000FFDF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x1000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf Sat Feb 28 07:15:07 2015 +0000
@@ -20,8 +20,9 @@
define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x800;
-define symbol __size_heap__ = 0x800;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x4000;
+define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/TOOLCHAIN_IAR/LPC810.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/TOOLCHAIN_IAR/LPC810.icf Sat Feb 28 07:15:07 2015 +0000 @@ -12,7 +12,7 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x100003FF; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x100; -define symbol __ICFEDIT_size_heap__ = 0x100; +define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/TOOLCHAIN_IAR/LPC812.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/TOOLCHAIN_IAR/LPC812.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,8 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10000FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x200; -define symbol __ICFEDIT_size_heap__ = 0x400; +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ define symbol __CRP_start__ = 0x000002FC;
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f10x.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f10x.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x200000EC; define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x1000; -define symbol __ICFEDIT_size_heap__ = 0x1700; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0xA00; +define symbol __ICFEDIT_size_heap__ = 0x1400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G;
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f030x8.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f030x8.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,7 +15,8 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x800;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x400;
define symbol __size_heap__ = 0x800;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/TOOLCHAIN_IAR/stm32f070xb.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/TOOLCHAIN_IAR/stm32f070xb.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x800;
-define symbol __size_heap__ = 0x800;
+define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/TOOLCHAIN_IAR/stm32f072xb.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/TOOLCHAIN_IAR/stm32f072xb.icf Sat Feb 28 07:15:07 2015 +0000
@@ -16,7 +16,7 @@
/* Stack and Heap */
define symbol __size_cstack__ = 0x800;
-define symbol __size_heap__ = 0x800;
+define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/TOOLCHAIN_IAR/stm32f091xc.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/TOOLCHAIN_IAR/stm32f091xc.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,6 +15,7 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x1000;
define symbol __size_heap__ = 0x2000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x1000;
-define symbol __size_heap__ = 0x1700;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x800;
+define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303RE/TOOLCHAIN_IAR/stm32f303xe.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303RE/TOOLCHAIN_IAR/stm32f303xe.icf Sat Feb 28 07:15:07 2015 +0000
@@ -19,8 +19,9 @@
define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__];
/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x2000;
-define symbol __size_heap__ = 0x2000;
+define symbol __size_heap__ = 0x4000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/TOOLCHAIN_IAR/stm32f334x8.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/TOOLCHAIN_IAR/stm32f334x8.icf Sat Feb 28 07:15:07 2015 +0000
@@ -18,8 +18,9 @@
define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x800;
-define symbol __size_heap__ = 0x1000;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x600;
+define symbol __size_heap__ = 0xC00;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/TOOLCHAIN_IAR/stm32f429xx_flash.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/TOOLCHAIN_IAR/stm32f429xx_flash.icf Sat Feb 28 07:15:07 2015 +0000 @@ -13,8 +13,9 @@ define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x5FFF; -define symbol __ICFEDIT_size_heap__ = 0x5FFF; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x6000; +define symbol __ICFEDIT_size_heap__ = 0xC000; /**** End of ICF editor section. ###ICF###*/
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x400;
-define symbol __size_heap__ = 0x400;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x4000;
+define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/TOOLCHAIN_IAR/stm32f405xx.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/TOOLCHAIN_IAR/stm32f405xx.icf Sat Feb 28 07:15:07 2015 +0000 @@ -14,8 +14,9 @@ define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x2000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; +define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x400;
-define symbol __size_heap__ = 0x400;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x4000;
+define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/TOOLCHAIN_IAR/stm32f401xe.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/TOOLCHAIN_IAR/stm32f401xe.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x20000198; define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x2000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x3000; +define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G;
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x4000;
-define symbol __size_heap__ = 0x4000;
+define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/TOOLCHAIN_IAR/stm32f439xx_flash.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/TOOLCHAIN_IAR/stm32f439xx_flash.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x200; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x6000; +define symbol __ICFEDIT_size_heap__ = 0xC000; /**** End of ICF editor section. ###ICF###*/
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/TOOLCHAIN_IAR/STM32F407.icf Fri Feb 27 10:00:08 2015 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/TOOLCHAIN_IAR/STM32F407.icf Sat Feb 28 07:15:07 2015 +0000 @@ -11,8 +11,9 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x20000188; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x2000; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; +define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ define symbol __region_RAM1_start__ = 0x10000000;
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf Fri Feb 27 10:00:08 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf Sat Feb 28 07:15:07 2015 +0000
@@ -15,8 +15,9 @@
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
-define symbol __size_cstack__ = 0x1000;
-define symbol __size_heap__ = 0x1000;
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x2800;
+define symbol __size_heap__ = 0x5000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };