Steve Kim / mbed-src-test

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Diff: targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c

Revision:
174:8bb9f3a33240
Parent:
139:e3413eddde57
Child:
402:09075a3b15e3
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c	Mon Apr 28 18:15:06 2014 +0100
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c	Tue Apr 29 11:15:07 2014 +0100
@@ -28,37 +28,37 @@
  *******************************************************************************
  */
 #include "sleep_api.h"
+
+#if DEVICE_SLEEP
+
 #include "cmsis.h"
 
-// This function is in the system_stm32f10x.c file
-extern void SetSysClock(void);
-
-void sleep(void)
-{
+void sleep(void) {
     // Disable us_ticker update interrupt
     TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
-  
+
     SCB->SCR = 0; // Normal sleep mode for ARM core
     __WFI();
-  
+
     // Re-enable us_ticker update interrupt
-    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);  
+    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
 }
 
-void deepsleep(void)
-{
+void deepsleep(void) {
     // Disable us_ticker update interrupt
     TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
-  
+
     // Enable PWR clock
     RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
-    
+
     // Request to enter STOP mode with regulator in low power mode
     PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
 
     // After wake-up from STOP reconfigure the PLL
     SetSysClock();
-  
+
     // Re-enable us_ticker update interrupt
-    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);  
+    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
 }
+
+#endif