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Devices/FastIO_EFM32.h@22:45b32f07e790, 2016-09-20 (annotated)
- Committer:
- Sissors
- Date:
- Tue Sep 20 20:41:42 2016 +0000
- Revision:
- 22:45b32f07e790
- Parent:
- 17:87872fcf8586
Fixed bug in enabling of port hardware of the F030 (via: https://developer.mbed.org/users/viquiram/)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 15:e0c5a5216647 | 1 | #if defined(TARGET_EFM32) |
| Sissors | 15:e0c5a5216647 | 2 | |
| Sissors | 15:e0c5a5216647 | 3 | #include "mbed.h" |
| Sissors | 15:e0c5a5216647 | 4 | #include "pinmap.h" |
| Sissors | 15:e0c5a5216647 | 5 | #include "em_cmu.h" |
| Sissors | 15:e0c5a5216647 | 6 | |
| Sissors | 15:e0c5a5216647 | 7 | typedef struct { |
| Sissors | 15:e0c5a5216647 | 8 | uint32_t mask; |
| Sissors | 15:e0c5a5216647 | 9 | uint8_t input_mode; |
| Sissors | 15:e0c5a5216647 | 10 | uint8_t output_mode; |
| Sissors | 15:e0c5a5216647 | 11 | } fastio_vars; |
| Sissors | 15:e0c5a5216647 | 12 | |
| Sissors | 15:e0c5a5216647 | 13 | #define PIN_INDEX (pin & 0xF) |
| Sissors | 15:e0c5a5216647 | 14 | #define PINMASK (1 << PIN_INDEX) |
| Sissors | 15:e0c5a5216647 | 15 | #define PORT_INDEX (pin >> 4) |
| Sissors | 15:e0c5a5216647 | 16 | |
| Sissors | 15:e0c5a5216647 | 17 | //Mode_reg is either high or low, depending on first 8 bit or second 8-bit of a port |
| Sissors | 15:e0c5a5216647 | 18 | #define MODE_REG (*((&GPIO->P[PORT_INDEX].MODEL) + PIN_INDEX / 8)) |
| Sissors | 15:e0c5a5216647 | 19 | #define MODE_SHIFT ((PIN_INDEX * 4) % 32) |
| Sissors | 15:e0c5a5216647 | 20 | |
| Sissors | 17:87872fcf8586 | 21 | #define INIT_PIN this->container.mask = PINMASK; this->container.input_mode = PullDefault; this->container.output_mode = PushPull; CMU_ClockEnable(cmuClock_HFPER, true); CMU_ClockEnable(cmuClock_GPIO, true) |
| Sissors | 15:e0c5a5216647 | 22 | #define DESTROY_PIN |
| Sissors | 15:e0c5a5216647 | 23 | |
| Sissors | 17:87872fcf8586 | 24 | #define SET_DIR_INPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + ((this->container.input_mode & 0xF) << MODE_SHIFT); if (this->container.input_mode > 0x10) WRITE_PIN_SET; else WRITE_PIN_CLR |
| Sissors | 15:e0c5a5216647 | 25 | #define SET_DIR_OUTPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (container.output_mode << MODE_SHIFT) |
| Sissors | 17:87872fcf8586 | 26 | #define SET_MODE(pull) if ((pull <= 3) || (pull > 0x10)) {this->container.input_mode = pull; SET_DIR_INPUT; } else {this->container.output_mode = pull; SET_DIR_OUTPUT;} |
| Sissors | 15:e0c5a5216647 | 27 | |
| Sissors | 15:e0c5a5216647 | 28 | #define WRITE_PIN_SET GPIO->P[PORT_INDEX].DOUTSET = PINMASK |
| Sissors | 15:e0c5a5216647 | 29 | #define WRITE_PIN_CLR GPIO->P[PORT_INDEX].DOUTCLR = PINMASK |
| Sissors | 15:e0c5a5216647 | 30 | |
| Sissors | 17:87872fcf8586 | 31 | #define READ_PIN ((GPIO->P[PORT_INDEX].DIN & this->container.mask) ? 1 : 0) |
| Sissors | 15:e0c5a5216647 | 32 | |
| Sissors | 15:e0c5a5216647 | 33 | #endif |
