system_LPC23xx.c

00001 /* mbed Microcontroller Library
00002  * Copyright (C) 2008-2009 ARM Limited. All rights reserved.
00003  *
00004  * ARM7 version of CMSIS-like functionality - not advised for use outside mbed!
00005  */
00006 
00007 #include <stdint.h>
00008 #include "LPC23xx.h"
00009 
00010 #define CLOCK_SETUP           1
00011 #define SCS_Val               0x00000020
00012 #define CLKSRCSEL_Val         0x00000001
00013 
00014 #define PLL0_SETUP            1
00015 #define PLL0CFG_Val           0x00000013
00016 #define CCLKCFG_Val           0x00000007
00017 #define USBCLKCFG_Val         0x00000009
00018 #define PCLKSEL0_Val          0x00000000
00019 #define PCLKSEL1_Val          0x00000000
00020 #define PCONP_Val             0x042887DE
00021 #define CLKOUTCFG_Val         0x00000000
00022 #define MAMCR_Val             0x00000001  // there is a bug in the MAM so it should never be fully enabled (only disabled or partially enabled)
00023 #define MAMTIM_Val            0x00000004
00024 
00025 /*----------------------------------------------------------------------------
00026   DEFINES
00027  *----------------------------------------------------------------------------*/
00028     
00029 #define XTAL        (12000000UL)        /* Oscillator frequency               */
00030 #define OSC_CLK     (      XTAL)        /* Main oscillator frequency          */
00031 #define RTC_CLK     (   32000UL)        /* RTC oscillator frequency           */
00032 #define IRC_OSC     ( 4000000UL)        /* Internal RC oscillator frequency   */
00033 
00034 /* F_cco0 = (2 * M * F_in) / N  */
00035 #define __M               (((PLL0CFG_Val      ) & 0x7FFF) + 1)
00036 #define __N               (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
00037 #define __FCCO(__F_IN)    ((2 * __M * __F_IN) / __N) 
00038 #define __CCLK_DIV        (((CCLKCFG_Val      ) & 0x00FF) + 1)
00039 
00040 /* Determine core clock frequency according to settings */
00041  #if (PLL0_SETUP)
00042     #if   ((CLKSRCSEL_Val & 0x03) == 1)
00043         #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)
00044     #elif ((CLKSRCSEL_Val & 0x03) == 2)
00045         #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV)
00046     #else 
00047         #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV)
00048     #endif
00049  #endif
00050 
00051 
00052 /*----------------------------------------------------------------------------
00053   Clock Variable definitions
00054  *----------------------------------------------------------------------------*/
00055 uint32_t SystemCoreClock = __CORE_CLK;/*!< System Clock Frequency (Core Clock)*/
00056 
00057 /*----------------------------------------------------------------------------
00058   Clock functions
00059  *----------------------------------------------------------------------------*/
00060 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00061 {
00062   /* Determine clock frequency according to clock register values             */
00063   if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */
00064     switch (LPC_SC->CLKSRCSEL & 0x03) {
00065       case 0:                                /* Int. RC oscillator => PLL0    */
00066       case 3:                                /* Reserved, default to Int. RC  */
00067         SystemCoreClock = (IRC_OSC * 
00068                           (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
00069                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1))   /
00070                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00071         break;
00072       case 1:                                /* Main oscillator => PLL0       */
00073         SystemCoreClock = (OSC_CLK * 
00074                           (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
00075                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1))   /
00076                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00077         break;
00078       case 2:                                /* RTC oscillator => PLL0        */
00079         SystemCoreClock = (RTC_CLK * 
00080                           (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
00081                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1))   /
00082                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00083         break;
00084     }
00085   } else {
00086     switch (LPC_SC->CLKSRCSEL & 0x03) {
00087       case 0:                                /* Int. RC oscillator => PLL0    */
00088       case 3:                                /* Reserved, default to Int. RC  */
00089         SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00090         break;
00091       case 1:                                /* Main oscillator => PLL0       */
00092         SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00093         break;
00094       case 2:                                /* RTC oscillator => PLL0        */
00095         SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00096         break;
00097     }
00098   }
00099 }
00100 
00101 /**
00102  * Initialize the system
00103  *
00104  * @param  none
00105  * @return none
00106  *
00107  * @brief  Setup the microcontroller system.
00108  *         Initialize the System and update the SystemFrequency variable.
00109  */
00110 void SystemInit (void)
00111 {
00112 #if (CLOCK_SETUP)                       /* Clock Setup                        */
00113   LPC_SC->SCS       = SCS_Val;
00114   if (SCS_Val & (1 << 5)) {             /* If Main Oscillator is enabled      */
00115     while ((LPC_SC->SCS & (1 << 6)) == 0);  /* Wait for Oscillator to be ready    */
00116   }
00117 
00118   LPC_SC->CCLKCFG   = CCLKCFG_Val;          /* Setup Clock Divider                */
00119 
00120 #if (PLL0_SETUP)
00121   LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;        /* Select Clock Source for PLL0       */
00122   LPC_SC->PLL0CFG   = PLL0CFG_Val;
00123   LPC_SC->PLL0CON   = 0x01;                 /* PLL0 Enable                        */
00124   LPC_SC->PLL0FEED  = 0xAA;
00125   LPC_SC->PLL0FEED  = 0x55;
00126   while (!(LPC_SC->PLL0STAT & (1 << 26)));  /* Wait for PLOCK0                    */
00127 
00128   LPC_SC->PLL0CON   = 0x03;                 /* PLL0 Enable & Connect              */
00129   LPC_SC->PLL0FEED  = 0xAA;
00130   LPC_SC->PLL0FEED  = 0x55;
00131 #endif
00132 
00133   LPC_SC->USBCLKCFG = USBCLKCFG_Val;        /* Setup USB Clock Divider            */
00134 #endif
00135 
00136   LPC_SC->PCLKSEL0  = PCLKSEL0_Val;         /* Peripheral Clock Selection         */
00137   LPC_SC->PCLKSEL1  = PCLKSEL1_Val;
00138 
00139   LPC_SC->PCONP     = PCONP_Val;            /* Power Control for Peripherals      */
00140     
00141   // Setup MAM
00142   LPC_SC->MAMTIM      = MAMTIM_Val;
00143   LPC_SC->MAMCR       = MAMCR_Val;
00144 }