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DWT_Type Struct Reference
[Data Watchpoint and Trace (DWT)]
Structure type to access the Data Watchpoint and Trace Register (DWT). More...
#include <core_cm3.h>
Data Fields | |
| __IO uint32_t | CTRL |
| __IO uint32_t | CYCCNT |
| __IO uint32_t | CPICNT |
| __IO uint32_t | EXCCNT |
| __IO uint32_t | SLEEPCNT |
| __IO uint32_t | LSUCNT |
| __IO uint32_t | FOLDCNT |
| __I uint32_t | PCSR |
| __IO uint32_t | COMP0 |
| __IO uint32_t | MASK0 |
| __IO uint32_t | FUNCTION0 |
| __IO uint32_t | COMP1 |
| __IO uint32_t | MASK1 |
| __IO uint32_t | FUNCTION1 |
| __IO uint32_t | COMP2 |
| __IO uint32_t | MASK2 |
| __IO uint32_t | FUNCTION2 |
| __IO uint32_t | COMP3 |
| __IO uint32_t | MASK3 |
| __IO uint32_t | FUNCTION3 |
Detailed Description
Structure type to access the Data Watchpoint and Trace Register (DWT).
Definition at line 726 of file core_cm3.h.
Field Documentation
| __IO uint32_t COMP0 |
Offset: 0x020 (R/W) Comparator Register 0
Definition at line 736 of file core_cm3.h.
| __IO uint32_t COMP1 |
Offset: 0x030 (R/W) Comparator Register 1
Definition at line 740 of file core_cm3.h.
| __IO uint32_t COMP2 |
Offset: 0x040 (R/W) Comparator Register 2
Definition at line 744 of file core_cm3.h.
| __IO uint32_t COMP3 |
Offset: 0x050 (R/W) Comparator Register 3
Definition at line 748 of file core_cm3.h.
| __IO uint32_t CPICNT |
Offset: 0x008 (R/W) CPI Count Register
Definition at line 730 of file core_cm3.h.
| __IO uint32_t CTRL |
Offset: 0x000 (R/W) Control Register
Definition at line 728 of file core_cm3.h.
| __IO uint32_t CYCCNT |
Offset: 0x004 (R/W) Cycle Count Register
Definition at line 729 of file core_cm3.h.
| __IO uint32_t EXCCNT |
Offset: 0x00C (R/W) Exception Overhead Count Register
Definition at line 731 of file core_cm3.h.
| __IO uint32_t FOLDCNT |
Offset: 0x018 (R/W) Folded-instruction Count Register
Definition at line 734 of file core_cm3.h.
| __IO uint32_t FUNCTION0 |
Offset: 0x028 (R/W) Function Register 0
Definition at line 738 of file core_cm3.h.
| __IO uint32_t FUNCTION1 |
Offset: 0x038 (R/W) Function Register 1
Definition at line 742 of file core_cm3.h.
| __IO uint32_t FUNCTION2 |
Offset: 0x048 (R/W) Function Register 2
Definition at line 746 of file core_cm3.h.
| __IO uint32_t FUNCTION3 |
Offset: 0x058 (R/W) Function Register 3
Definition at line 750 of file core_cm3.h.
| __IO uint32_t LSUCNT |
Offset: 0x014 (R/W) LSU Count Register
Definition at line 733 of file core_cm3.h.
| __IO uint32_t MASK0 |
Offset: 0x024 (R/W) Mask Register 0
Definition at line 737 of file core_cm3.h.
| __IO uint32_t MASK1 |
Offset: 0x034 (R/W) Mask Register 1
Definition at line 741 of file core_cm3.h.
| __IO uint32_t MASK2 |
Offset: 0x044 (R/W) Mask Register 2
Definition at line 745 of file core_cm3.h.
| __IO uint32_t MASK3 |
Offset: 0x054 (R/W) Mask Register 3
Definition at line 749 of file core_cm3.h.
| __I uint32_t PCSR |
Offset: 0x01C (R/ ) Program Counter Sample Register
Definition at line 735 of file core_cm3.h.
| __IO uint32_t SLEEPCNT |
Offset: 0x010 (R/W) Sleep Count Register
Definition at line 732 of file core_cm3.h.
Generated on Tue Jul 12 2022 13:47:03 by
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