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usb_conf.hh
00001 /******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** 00002 * File Name : usb_conf.h 00003 * Author : MCD Application Team 00004 * Version : V3.2.1 00005 * Date : 07/05/2010 00006 * Description : Custom HID demo configuration file 00007 ******************************************************************************** 00008 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00009 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 00010 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 00011 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 00012 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 00013 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00014 *******************************************************************************/ 00015 00016 /* Define to prevent recursive inclusion -------------------------------------*/ 00017 #ifndef __USB_CONF_H 00018 #define __USB_CONF_H 00019 00020 /* Includes ------------------------------------------------------------------*/ 00021 /* Exported types ------------------------------------------------------------*/ 00022 /* Exported constants --------------------------------------------------------*/ 00023 /* Exported macro ------------------------------------------------------------*/ 00024 /* Exported functions ------------------------------------------------------- */ 00025 /* External variables --------------------------------------------------------*/ 00026 /*-------------------------------------------------------------*/ 00027 /* EP_NUM */ 00028 /* defines how many endpoints are used by the device */ 00029 /*-------------------------------------------------------------*/ 00030 #define EP_NUM (2) 00031 00032 #ifndef STM32F10X_CL 00033 /*-------------------------------------------------------------*/ 00034 /* -------------- Buffer Description Table -----------------*/ 00035 /*-------------------------------------------------------------*/ 00036 /* buffer table base address */ 00037 /* buffer table base address */ 00038 #define BTABLE_ADDRESS (0x00) 00039 00040 /* EP0 */ 00041 /* rx/tx buffer base address */ 00042 #define ENDP0_RXADDR (0x18) 00043 #define ENDP0_TXADDR (0x58) 00044 00045 /* EP1 */ 00046 /* tx buffer base address */ 00047 #define ENDP1_TXADDR (0x100) 00048 #define ENDP1_RXADDR (0x104) 00049 00050 /*-------------------------------------------------------------*/ 00051 /* ------------------- ISTR events -------------------------*/ 00052 /*-------------------------------------------------------------*/ 00053 /* IMR_MSK */ 00054 /* mask defining which events has to be handled */ 00055 /* by the device application software */ 00056 #define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \ 00057 | CNTR_ESOFM | CNTR_RESETM ) 00058 #endif /* STM32F10X_CL */ 00059 00060 #ifdef STM32F10X_CL 00061 00062 /******************************************************************************* 00063 * FIFO Size Configuration 00064 * 00065 * (i) Dedicated data FIFO SPRAM of 1.25 Kbytes = 1280 bytes = 320 32-bits words 00066 * available for the endpoints IN and OUT. 00067 * Device mode features: 00068 * -1 bidirectional CTRL EP 0 00069 * -3 IN EPs to support any kind of Bulk, Interrupt or Isochronous transfer 00070 * -3 OUT EPs to support any kind of Bulk, Interrupt or Isochronous transfer 00071 * 00072 * ii) Receive data FIFO size = RAM for setup packets + 00073 * OUT endpoint control information + 00074 * data OUT packets + miscellaneous 00075 * Space = ONE 32-bits words 00076 * --> RAM for setup packets = 4 * n + 6 space 00077 * (n is the nbr of CTRL EPs the device core supports) 00078 * --> OUT EP CTRL info = 1 space 00079 * (one space for status information written to the FIFO along with each 00080 * received packet) 00081 * --> data OUT packets = (Largest Packet Size / 4) + 1 spaces 00082 * (MINIMUM to receive packets) 00083 * --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces 00084 * (if high-bandwidth EP is enabled or multiple isochronous EPs) 00085 * --> miscellaneous = 1 space per OUT EP 00086 * (one space for transfer complete status information also pushed to the 00087 * FIFO with each endpoint's last packet) 00088 * 00089 * (iii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for 00090 * that particular IN EP. More space allocated in the IN EP Tx FIFO results 00091 * in a better performance on the USB and can hide latencies on the AHB. 00092 * 00093 * (iv) TXn min size = 16 words. (n : Transmit FIFO index) 00094 * (v) When a TxFIFO is not used, the Configuration should be as follows: 00095 * case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) 00096 * --> Txm can use the space allocated for Txn. 00097 * case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) 00098 * --> Txn should be configured with the minimum space of 16 words 00099 * (vi) The FIFO is used optimally when used TxFIFOs are allocated in the top 00100 * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. 00101 *******************************************************************************/ 00102 00103 #define RX_FIFO_SIZE 128 00104 #define TX0_FIFO_SIZE 64 00105 #define TX1_FIFO_SIZE 64 00106 #define TX2_FIFO_SIZE 16 00107 #define TX3_FIFO_SIZE 16 00108 00109 /* OTGD-FS-DEVICE IP interrupts Enable definitions */ 00110 /* Uncomment the define to enable the selected interrupt */ 00111 //#define INTR_MODEMISMATCH 00112 #define INTR_SOFINTR 00113 #define INTR_RXSTSQLVL /* Mandatory */ 00114 //#define INTR_NPTXFEMPTY 00115 //#define INTR_GINNAKEFF 00116 //#define INTR_GOUTNAKEFF 00117 //#define INTR_ERLYSUSPEND 00118 #define INTR_USBSUSPEND /* Mandatory */ 00119 #define INTR_USBRESET /* Mandatory */ 00120 #define INTR_ENUMDONE /* Mandatory */ 00121 //#define INTR_ISOOUTDROP 00122 //#define INTR_EOPFRAME 00123 //#define INTR_EPMISMATCH 00124 #define INTR_INEPINTR /* Mandatory */ 00125 #define INTR_OUTEPINTR /* Mandatory */ 00126 //#define INTR_INCOMPLISOIN 00127 //#define INTR_INCOMPLISOOUT 00128 #define INTR_WKUPINTR /* Mandatory */ 00129 00130 /* OTGD-FS-DEVICE IP interrupts subroutines */ 00131 /* Comment the define to enable the selected interrupt subroutine and replace it 00132 by user code */ 00133 #define INTR_MODEMISMATCH_Callback NOP_Process 00134 #define INTR_SOFINTR_Callback NOP_Process 00135 #define INTR_RXSTSQLVL_Callback NOP_Process 00136 #define INTR_NPTXFEMPTY_Callback NOP_Process 00137 #define INTR_NPTXFEMPTY_Callback NOP_Process 00138 #define INTR_GINNAKEFF_Callback NOP_Process 00139 #define INTR_GOUTNAKEFF_Callback NOP_Process 00140 #define INTR_ERLYSUSPEND_Callback NOP_Process 00141 #define INTR_USBSUSPEND_Callback NOP_Process 00142 #define INTR_USBRESET_Callback NOP_Process 00143 #define INTR_ENUMDONE_Callback NOP_Process 00144 #define INTR_ISOOUTDROP_Callback NOP_Process 00145 #define INTR_EOPFRAME_Callback NOP_Process 00146 #define INTR_EPMISMATCH_Callback NOP_Process 00147 #define INTR_INEPINTR_Callback NOP_Process 00148 #define INTR_OUTEPINTR_Callback NOP_Process 00149 #define INTR_INCOMPLISOIN_Callback NOP_Process 00150 #define INTR_INCOMPLISOOUT_Callback NOP_Process 00151 #define INTR_WKUPINTR_Callback NOP_Process 00152 00153 /* Isochronous data update */ 00154 #define INTR_RXSTSQLVL_ISODU_Callback NOP_Process 00155 00156 /* Isochronous transfer parameters */ 00157 /* Size of a single Isochronous buffer (size of a single transfer) */ 00158 #define ISOC_BUFFER_SZE 1 00159 /* Number of sub-buffers (number of single buffers/transfers), should be even */ 00160 #define NUM_SUB_BUFFERS 2 00161 00162 #endif /* STM32F10X_CL */ 00163 00164 00165 /* CTR service routines */ 00166 /* associated to defined endpoints */ 00167 #define EP1_IN_Callback NOP_Process 00168 #define EP2_IN_Callback NOP_Process 00169 #define EP3_IN_Callback NOP_Process 00170 #define EP4_IN_Callback NOP_Process 00171 #define EP5_IN_Callback NOP_Process 00172 #define EP6_IN_Callback NOP_Process 00173 #define EP7_IN_Callback NOP_Process 00174 00175 //#define EP1_OUT_Callback NOP_Process 00176 #define EP2_OUT_Callback NOP_Process 00177 #define EP3_OUT_Callback NOP_Process 00178 #define EP4_OUT_Callback NOP_Process 00179 #define EP5_OUT_Callback NOP_Process 00180 #define EP6_OUT_Callback NOP_Process 00181 #define EP7_OUT_Callback NOP_Process 00182 00183 #endif /*__USB_CONF_H*/ 00184 00185 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ 00186
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