usb_conf.h

00001 /******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
00002 * File Name          : usb_conf.h
00003 * Author             : MCD Application Team
00004 * Version            : V3.3.0
00005 * Date               : 21-March-2011
00006 * Description        : Virtual COM Port Demo configuration  header
00007 ********************************************************************************
00008 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00009 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
00010 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
00011 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
00012 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
00013 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00014 *******************************************************************************/
00015 
00016 /* Define to prevent recursive inclusion -------------------------------------*/
00017 #ifndef __USB_CONF_H
00018 #define __USB_CONF_H
00019 
00020 /* Includes ------------------------------------------------------------------*/
00021 /* Exported types ------------------------------------------------------------*/
00022 /* Exported constants --------------------------------------------------------*/
00023 /* Exported macro ------------------------------------------------------------*/
00024 /* Exported functions ------------------------------------------------------- */
00025 /* External variables --------------------------------------------------------*/
00026 
00027 /*-------------------------------------------------------------*/
00028 /* EP_NUM */
00029 /* defines how many endpoints are used by the device */
00030 /*-------------------------------------------------------------*/
00031 
00032 #define EP_NUM                          (4)
00033 
00034 
00035 #ifndef STM32F10X_CL
00036 /*-------------------------------------------------------------*/
00037 /* --------------   Buffer Description Table  -----------------*/
00038 /*-------------------------------------------------------------*/
00039 /* buffer table base address */
00040 /* buffer table base address */
00041 #define BTABLE_ADDRESS      (0x00)
00042 
00043 /* EP0  */
00044 /* rx/tx buffer base address */
00045 #define ENDP0_RXADDR        (0x40)
00046 #define ENDP0_TXADDR        (0x80)
00047 
00048 /* EP1  */
00049 /* tx buffer base address */
00050 #define ENDP1_TXADDR        (0xC0)
00051 #define ENDP2_TXADDR        (0x100)
00052 #define ENDP3_RXADDR        (0x110)
00053 
00054 
00055 /*-------------------------------------------------------------*/
00056 /* -------------------   ISTR events  -------------------------*/
00057 /*-------------------------------------------------------------*/
00058 /* IMR_MSK */
00059 /* mask defining which events has to be handled */
00060 /* by the device application software */
00061 #define IMR_MSK (CNTR_CTRM  | CNTR_SOFM  | CNTR_RESETM )
00062 
00063 /*#define CTR_CALLBACK*/
00064 /*#define DOVR_CALLBACK*/
00065 /*#define ERR_CALLBACK*/
00066 /*#define WKUP_CALLBACK*/
00067 /*#define SUSP_CALLBACK*/
00068 /*#define RESET_CALLBACK*/
00069 #define SOF_CALLBACK
00070 /*#define ESOF_CALLBACK*/
00071 #endif /* STM32F10X_CL */
00072 
00073 #ifdef STM32F10X_CL
00074 /*******************************************************************************
00075 *                              FIFO Size Configuration
00076 *  
00077 *  (i) Dedicated data FIFO SPRAM of 1.25 Kbytes = 1280 bytes = 320 32-bits words
00078 *      available for the endpoints IN and OUT.
00079 *      Device mode features:
00080 *      -1 bidirectional CTRL EP 0
00081 *      -3 IN EPs to support any kind of Bulk, Interrupt or Isochronous transfer
00082 *      -3 OUT EPs to support any kind of Bulk, Interrupt or Isochronous transfer
00083 *
00084 *  ii) Receive data FIFO size = RAM for setup packets + 
00085 *                   OUT endpoint control information +
00086 *                   data OUT packets + miscellaneous
00087 *      Space = ONE 32-bits words
00088 *     --> RAM for setup packets = 4 * n + 6 space
00089 *        (n is the nbr of CTRL EPs the device core supports) 
00090 *     --> OUT EP CTRL info      = 1 space
00091 *        (one space for status information written to the FIFO along with each 
00092 *        received packet)
00093 *     --> data OUT packets      = (Largest Packet Size / 4) + 1 spaces 
00094 *        (MINIMUM to receive packets)
00095 *     --> OR data OUT packets  = at least 2*(Largest Packet Size / 4) + 1 spaces 
00096 *        (if high-bandwidth EP is enabled or multiple isochronous EPs)
00097 *     --> miscellaneous = 1 space per OUT EP
00098 *        (one space for transfer complete status information also pushed to the 
00099 *        FIFO with each endpoint's last packet)
00100 *
00101 *  (iii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for 
00102 *       that particular IN EP. More space allocated in the IN EP Tx FIFO results
00103 *       in a better performance on the USB and can hide latencies on the AHB.
00104 *
00105 *  (iv) TXn min size = 16 words. (n  : Transmit FIFO index)
00106 *   (v) When a TxFIFO is not used, the Configuration should be as follows: 
00107 *       case 1 :  n > m    and Txn is not used    (n,m  : Transmit FIFO indexes)
00108 *       --> Txm can use the space allocated for Txn.
00109 *       case2  :  n < m    and Txn is not used    (n,m  : Transmit FIFO indexes)
00110 *       --> Txn should be configured with the minimum space of 16 words
00111 *  (vi) The FIFO is used optimally when used TxFIFOs are allocated in the top 
00112 *       of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
00113 *******************************************************************************/
00114 
00115 #define RX_FIFO_SIZE                          128
00116 #define TX0_FIFO_SIZE                          64
00117 #define TX1_FIFO_SIZE                          64
00118 #define TX2_FIFO_SIZE                          16
00119 #define TX3_FIFO_SIZE                          16
00120 
00121 /* OTGD-FS-DEVICE IP interrupts Enable definitions */
00122 /* Uncomment the define to enable the selected interrupt */
00123 //#define INTR_MODEMISMATCH
00124 #define INTR_SOFINTR
00125 #define INTR_RXSTSQLVL           /* Mandatory */
00126 //#define INTR_NPTXFEMPTY
00127 //#define INTR_GINNAKEFF
00128 //#define INTR_GOUTNAKEFF
00129 //#define INTR_ERLYSUSPEND
00130 #define INTR_USBSUSPEND          /* Mandatory */
00131 #define INTR_USBRESET            /* Mandatory */
00132 #define INTR_ENUMDONE            /* Mandatory */
00133 //#define INTR_ISOOUTDROP
00134 //#define INTR_EOPFRAME
00135 //#define INTR_EPMISMATCH
00136 #define INTR_INEPINTR            /* Mandatory */
00137 #define INTR_OUTEPINTR           /* Mandatory */
00138 //#define INTR_INCOMPLISOIN
00139 //#define INTR_INCOMPLISOOUT
00140 #define INTR_WKUPINTR            /* Mandatory */
00141 
00142 /* OTGD-FS-DEVICE IP interrupts subroutines */
00143 /* Comment the define to enable the selected interrupt subroutine and replace it
00144    by user code */
00145 #define  INTR_MODEMISMATCH_Callback      NOP_Process
00146 /* #define  INTR_SOFINTR_Callback           NOP_Process */
00147 #define  INTR_RXSTSQLVL_Callback         NOP_Process
00148 #define  INTR_NPTXFEMPTY_Callback        NOP_Process
00149 #define  INTR_NPTXFEMPTY_Callback        NOP_Process
00150 #define  INTR_GINNAKEFF_Callback         NOP_Process
00151 #define  INTR_GOUTNAKEFF_Callback        NOP_Process
00152 #define  INTR_ERLYSUSPEND_Callback       NOP_Process
00153 #define  INTR_USBSUSPEND_Callback        NOP_Process
00154 #define  INTR_USBRESET_Callback          NOP_Process
00155 #define  INTR_ENUMDONE_Callback          NOP_Process
00156 #define  INTR_ISOOUTDROP_Callback        NOP_Process
00157 #define  INTR_EOPFRAME_Callback          NOP_Process
00158 #define  INTR_EPMISMATCH_Callback        NOP_Process
00159 #define  INTR_INEPINTR_Callback          NOP_Process
00160 #define  INTR_OUTEPINTR_Callback         NOP_Process
00161 #define  INTR_INCOMPLISOIN_Callback      NOP_Process
00162 #define  INTR_INCOMPLISOOUT_Callback     NOP_Process
00163 #define  INTR_WKUPINTR_Callback          NOP_Process
00164 
00165 /* Isochronous data update */
00166 #define  INTR_RXSTSQLVL_ISODU_Callback   NOP_Process  
00167 
00168 /* Isochronous transfer parameters */
00169 /* Size of a single Isochronous buffer (size of a single transfer) */
00170 #define ISOC_BUFFER_SZE                  1
00171 /* Number of sub-buffers (number of single buffers/transfers), should be even */
00172 #define NUM_SUB_BUFFERS                  2
00173 
00174 #endif /* STM32F10X_CL */
00175 
00176 
00177 /* CTR service routines */
00178 /* associated to defined endpoints */
00179 /*#define  EP1_IN_Callback   NOP_Process*/
00180 #define  EP2_IN_Callback   NOP_Process
00181 #define  EP3_IN_Callback   NOP_Process
00182 #define  EP4_IN_Callback   NOP_Process
00183 #define  EP5_IN_Callback   NOP_Process
00184 #define  EP6_IN_Callback   NOP_Process
00185 #define  EP7_IN_Callback   NOP_Process
00186 
00187 #define  EP1_OUT_Callback   NOP_Process
00188 #define  EP2_OUT_Callback   NOP_Process
00189 /*#define  EP3_OUT_Callback   NOP_Process*/
00190 #define  EP4_OUT_Callback   NOP_Process
00191 #define  EP5_OUT_Callback   NOP_Process
00192 #define  EP6_OUT_Callback   NOP_Process
00193 #define  EP7_OUT_Callback   NOP_Process
00194 
00195 #endif /* __USB_CONF_H */
00196 
00197 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/