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st802rt1a.h
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00001 /** 00002 * @file st802rt1a.h 00003 * @brief ST802RT1A Ethernet PHY transceiver 00004 * 00005 * @section License 00006 * 00007 * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved. 00008 * 00009 * This file is part of CycloneTCP Open. 00010 * 00011 * This program is free software; you can redistribute it and/or 00012 * modify it under the terms of the GNU General Public License 00013 * as published by the Free Software Foundation; either version 2 00014 * of the License, or (at your option) any later version. 00015 * 00016 * This program is distributed in the hope that it will be useful, 00017 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00019 * GNU General Public License for more details. 00020 * 00021 * You should have received a copy of the GNU General Public License 00022 * along with this program; if not, write to the Free Software Foundation, 00023 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 00024 * 00025 * @author Oryx Embedded SARL (www.oryx-embedded.com) 00026 * @version 1.7.6 00027 **/ 00028 00029 #ifndef _ST802RT1A_H 00030 #define _ST802RT1A_H 00031 00032 //Dependencies 00033 #include "core/nic.h" 00034 00035 //PHY address 00036 #define ST802RT1A_PHY_ADDR 1 00037 00038 //ST802RT1A registers 00039 #define ST802RT1A_PHY_REG_RN00 0x00 00040 #define ST802RT1A_PHY_REG_RN01 0x01 00041 #define ST802RT1A_PHY_REG_RN02 0x02 00042 #define ST802RT1A_PHY_REG_RN03 0x03 00043 #define ST802RT1A_PHY_REG_RN04 0x04 00044 #define ST802RT1A_PHY_REG_RN05 0x05 00045 #define ST802RT1A_PHY_REG_RN06 0x06 00046 #define ST802RT1A_PHY_REG_RN07 0x07 00047 #define ST802RT1A_PHY_REG_RN08 0x08 00048 #define ST802RT1A_PHY_REG_RN10 0x10 00049 #define ST802RT1A_PHY_REG_RN11 0x11 00050 #define ST802RT1A_PHY_REG_RN12 0x12 00051 #define ST802RT1A_PHY_REG_RN13 0x13 00052 #define ST802RT1A_PHY_REG_RN14 0x14 00053 #define ST802RT1A_PHY_REG_RN18 0x18 00054 #define ST802RT1A_PHY_REG_RN19 0x19 00055 #define ST802RT1A_PHY_REG_RN1B 0x1B 00056 #define ST802RT1A_PHY_REG_RN1C 0x1C 00057 #define ST802RT1A_PHY_REG_RN1E 0x1E 00058 #define ST802RT1A_PHY_REG_RN1F 0x1F 00059 #define ST802RT1A_PHY_REG_RS1B 0x1B 00060 00061 //RN00 register 00062 #define RN00_SOFT_RESET (1 << 15) 00063 #define RN00_LOCAL_LOOPBACK (1 << 14) 00064 #define RN00_SPEED_SEL (1 << 13) 00065 #define RN00_AN_EN (1 << 12) 00066 #define RN00_POWER_DOWN (1 << 11) 00067 #define RN00_ISOLATE (1 << 10) 00068 #define RN00_RESTART_AN (1 << 9) 00069 #define RN00_DUPLEX_MODE (1 << 8) 00070 #define RN00_COL_TEST (1 << 7) 00071 00072 //RN01 register 00073 #define RN01_100BT4 (1 << 15) 00074 #define RN01_100BTX_FD (1 << 14) 00075 #define RN01_100BTX (1 << 13) 00076 #define RN01_10BT_FD (1 << 12) 00077 #define RN01_10BT (1 << 11) 00078 #define RN01_NO_PREAMBLE (1 << 6) 00079 #define RN01_AN_COMPLETE (1 << 5) 00080 #define RN01_REMOTE_FAULT (1 << 4) 00081 #define RN01_AN_ABLE (1 << 3) 00082 #define RN01_LINK_STATUS (1 << 2) 00083 #define RN01_JABBER_DETECT (1 << 1) 00084 #define RN01_EXTENDED_CAP (1 << 0) 00085 00086 //RN04 register 00087 #define RN04_NP (1 << 15) 00088 #define RN04_RF (1 << 13) 00089 #define RN04_ASYM_PAUSE (1 << 11) 00090 #define RN04_PAUSE (1 << 10) 00091 #define RN04_100BT4 (1 << 9) 00092 #define RN04_100BTX_FD (1 << 8) 00093 #define RN04100BTX (1 << 7) 00094 #define RN04_10BT_FD (1 << 6) 00095 #define RN04_10BT (1 << 5) 00096 #define RN04_SELECTOR4 (1 << 4) 00097 #define RN04_SELECTOR3 (1 << 3) 00098 #define RN04_SELECTOR2 (1 << 2) 00099 #define RN04_SELECTOR1 (1 << 1) 00100 #define RN04_SELECTOR0 (1 << 0) 00101 00102 //RN05 register 00103 #define RN05_NP (1 << 15) 00104 #define RN05_ACK (1 << 14) 00105 #define RN05_RF (1 << 13) 00106 #define RN05_ASYM_PAUSE (1 << 11) 00107 #define RN05_PAUSE (1 << 10) 00108 #define RN05_100BT4 (1 << 9) 00109 #define RN05_100BTX_FD (1 << 8) 00110 #define RN05_100BTX (1 << 7) 00111 #define RN05_10BT_FD (1 << 6) 00112 #define RN05_10BT (1 << 5) 00113 #define RN05_SELECTOR4 (1 << 4) 00114 #define RN05_SELECTOR3 (1 << 3) 00115 #define RN05_SELECTOR2 (1 << 2) 00116 #define RN05_SELECTOR1 (1 << 1) 00117 #define RN05_SELECTOR0 (1 << 0) 00118 00119 //RN06 register 00120 #define RN06_PD_FAULT (1 << 4) 00121 #define RN06_LP_NP_ABLE (1 << 3) 00122 #define RN06_NP_ABLE (1 << 2) 00123 #define RN06_PAGE_RCVD (1 << 1) 00124 #define RN06_LP_AN_ABLE (1 << 0) 00125 00126 //RN07 register 00127 #define RN07_NP (1 << 15) 00128 #define RN07_MP (1 << 13) 00129 #define RN07_ACK2 (1 << 12) 00130 #define RN07_TOGGLE (1 << 11) 00131 #define RN07_CODE10 (1 << 10) 00132 #define RN07_CODE9 (1 << 9) 00133 #define RN07_CODE8 (1 << 8) 00134 #define RN07_CODE7 (1 << 7) 00135 #define RN07_CODE6 (1 << 6) 00136 #define RN07_CODE5 (1 << 5) 00137 #define RN07_CODE4 (1 << 4) 00138 #define RN07_CODE3 (1 << 3) 00139 #define RN07_CODE2 (1 << 2) 00140 #define RN07_CODE1 (1 << 1) 00141 #define RN07_CODE0 (1 << 0) 00142 00143 //RN08 register 00144 #define RN08_NP (1 << 15) 00145 #define RN08_ACK (1 << 14) 00146 #define RN08_MP (1 << 13) 00147 #define RN08_ACK2 (1 << 12) 00148 #define RN08_TOGGLE (1 << 11) 00149 #define RN08_CODE10 (1 << 10) 00150 #define RN08_CODE9 (1 << 9) 00151 #define RN08_CODE8 (1 << 8) 00152 #define RN08_CODE7 (1 << 7) 00153 #define RN08_CODE6 (1 << 6) 00154 #define RN08_CODE5 (1 << 5) 00155 #define RN08_CODE4 (1 << 4) 00156 #define RN08_CODE3 (1 << 3) 00157 #define RN08_CODE2 (1 << 2) 00158 #define RN08_CODE1 (1 << 1) 00159 #define RN08_CODE0 (1 << 0) 00160 00161 //RN10 register 00162 #define RN10_MII_EN (1 << 9) 00163 #define RN10_FEF_EN (1 << 5) 00164 #define RN10_FIFO_EXT (1 << 2) 00165 #define RN10_RMII_OOBS (1 << 1) 00166 00167 //RN11 register 00168 #define RN11_FX_MODE (1 << 10) 00169 #define RN11_SPEED (1 << 9) 00170 #define RN11_DUPLEX (1 << 8) 00171 #define RN11_PAUSE (1 << 7) 00172 #define RN11_AN_COMPLETE_INT (1 << 6) 00173 #define RN11_REMOTE_FAULT_INT (1 << 5) 00174 #define RN11_LINK_DOWN_INT (1 << 4) 00175 #define RN11_AN_LCW_RCVD_INT (1 << 3) 00176 #define RN11_PD_FAULT_INT (1 << 2) 00177 #define RN11_PG_RCVD_INT (1 << 1) 00178 #define RN11_RX_FUL_INT (1 << 0) 00179 00180 //RN12 register 00181 #define RN12_INT_OE_N (1 << 8) 00182 #define RN12_INT_EN (1 << 7) 00183 #define RN12_AN_COMPLETE_EN (1 << 6) 00184 #define RN12_REMOTE_FAULT_EN (1 << 5) 00185 #define RN12_LINK_DOWN_EN (1 << 4) 00186 #define RN12_AN_LCW_RCVD_EN (1 << 3) 00187 #define RN12_PD_FAULT_EN (1 << 2) 00188 #define RN12_PG_RCVD_EN (1 << 1) 00189 #define RN12_RX_FULL_EN (1 << 0) 00190 00191 //RN13 register 00192 #define RN13_RX_ERR_COUNTER_DIS (1 << 13) 00193 #define RN13_AN_COMPLETE (1 << 12) 00194 #define RN13_DC_REST_EN (1 << 8) 00195 #define RN13_NRZ_CONV_EN (1 << 7) 00196 #define RN13_TX_ISOLATE (1 << 5) 00197 #define RN13_CMODE2 (1 << 4) 00198 #define RN13_CMODE1 (1 << 3) 00199 #define RN13_CMODE0 (1 << 2) 00200 #define RN13_MLT3_DIS (1 << 1) 00201 #define RN13_SCRAMBLER_DIS (1 << 0) 00202 00203 #define RN13_CMODE_MASK (7 << 2) 00204 #define RN13_CMODE_AN (0 << 2) 00205 #define RN13_CMODE_10BT (1 << 2) 00206 #define RN13_CMODE_100BTX (2 << 2) 00207 #define RN13_CMODE_10BT_FD (5 << 2) 00208 #define RN13_CMODE_100BTX_FD (6 << 2) 00209 #define RN13_CMODE_TX_ISOLATE (7 << 2) 00210 00211 //RN14 register 00212 #define RN14_PHY_ADDR4 (1 << 7) 00213 #define RN14_PHY_ADDR3 (1 << 6) 00214 #define RN14_PHY_ADDR2 (1 << 5) 00215 #define RN14_PHY_ADDR1 (1 << 4) 00216 #define RN14_PHY_ADDR0 (1 << 3) 00217 #define RN14_NO_PREAMBLE (1 << 1) 00218 00219 //RN18 register 00220 #define RN18_JABBER_DIS (1 << 15) 00221 #define RN18_MDIO_PS (1 << 4) 00222 00223 //RN19 register 00224 #define RN19_AN_COMPLETE (1 << 15) 00225 #define RN19_AN_ACK (1 << 14) 00226 #define RN19_AN_DETECT (1 << 13) 00227 #define RN19_LP_AN_ABLE_DETECT (1 << 12) 00228 #define RN19_AN_PAUSE (1 << 11) 00229 #define RN19_AN_HCD2 (1 << 10) 00230 #define RN19_AN_HCD1 (1 << 9) 00231 #define RN19_AN_HCD0 (1 << 8) 00232 #define RN19_PD_FAULT (1 << 7) 00233 #define RN19_REMOTE_FAULT (1 << 6) 00234 #define RN19_PAGE_RCVD (1 << 5) 00235 #define RN19_LP_AN_ABLE (1 << 4) 00236 #define RN19_SP100 (1 << 3) 00237 #define RN19_LINK_STATUS (1 << 2) 00238 #define RN19_AN_EN (1 << 1) 00239 #define RN19_JABBER_DETECT (1 << 0) 00240 00241 //RN1B register 00242 #define RN1B_LED_MODE (1 << 9) 00243 #define RN1B_10BT_ECHO_DIS (1 << 7) 00244 #define RN1B_MI_SQE_DIS (1 << 3) 00245 00246 //RN1C register 00247 #define RN1C_MDIX_STATUS (1 << 13) 00248 #define RN1C_MDIX_SWAP (1 << 12) 00249 #define RN1C_MDIX_DIS (1 << 11) 00250 #define RN1C_JABBER_DETECT (1 << 9) 00251 #define RN1C_POLARITY_CHANGED (1 << 8) 00252 00253 //RN1E 00254 #define RN1E_HCD_100BTX_FD (1 << 15) 00255 #define RN1E_HCD_100BT4 (1 << 14) 00256 #define RN1E_HCD_100BTX (1 << 13) 00257 #define RN1E_HCD_10BT_FD (1 << 12) 00258 #define RN1E_HCD_10BT (1 << 11) 00259 #define RN1E_AN_RESTART (1 << 8) 00260 #define RN1E_AN_COMPLETE (1 << 7) 00261 #define RN1E_AN_ACK_COMPLETE (1 << 6) 00262 #define RN1E_AN_ACK (1 << 5) 00263 #define RN1E_AN_ABLE (1 << 4) 00264 #define RN1E_SUPER_ISOLATE (1 << 3) 00265 00266 //RN1F register 00267 #define RN1F_SHADOW_REG_EN (1 << 7) 00268 00269 //RS1B 00270 #define RS1B_MLT3_DETECT (1 << 15) 00271 #define RS1B_TX_CABLE_LEN2 (1 << 14) 00272 #define RS1B_TX_CABLE_LEN1 (1 << 13) 00273 #define RS1B_TX_CABLE_LEN0 (1 << 12) 00274 #define RS1B_LED_TEST_CTRL (1 << 10) 00275 #define RS1B_DESCRAMBLER_LOCKED (1 << 9) 00276 #define RS1B_FALSE_CARRIER_DETECT (1 << 8) 00277 #define RS1B_BAD_ESD_DETECT (1 << 7) 00278 #define RS1B_RX_ERROR_DETECT (1 << 6) 00279 #define RS1B_LOCK_ERROR_DETECT (1 << 4) 00280 #define RS1B_MLT3_ERROR_DETECT (1 << 3) 00281 00282 //ST802RT1A Ethernet PHY driver 00283 extern const PhyDriver st802rt1aPhyDriver; 00284 00285 //ST802RT1A related functions 00286 error_t st802rt1aInit(NetInterface *interface); 00287 00288 void st802rt1aTick(NetInterface *interface); 00289 00290 void st802rt1aEnableIrq(NetInterface *interface); 00291 void st802rt1aDisableIrq(NetInterface *interface); 00292 00293 void st802rt1aEventHandler(NetInterface *interface); 00294 00295 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data); 00296 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address); 00297 00298 void st802rt1aDumpPhyReg(NetInterface *interface); 00299 00300 #endif 00301
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