sam4e_eth.h

00001 /**
00002  * @file sam4e_eth.h
00003  * @brief SAM4E Ethernet MAC controller
00004  *
00005  * @section License
00006  *
00007  * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
00008  *
00009  * This file is part of CycloneTCP Open.
00010  *
00011  * This program is free software; you can redistribute it and/or
00012  * modify it under the terms of the GNU General Public License
00013  * as published by the Free Software Foundation; either version 2
00014  * of the License, or (at your option) any later version.
00015  *
00016  * This program is distributed in the hope that it will be useful,
00017  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00018  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019  * GNU General Public License for more details.
00020  *
00021  * You should have received a copy of the GNU General Public License
00022  * along with this program; if not, write to the Free Software Foundation,
00023  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00024  *
00025  * @author Oryx Embedded SARL (www.oryx-embedded.com)
00026  * @version 1.7.6
00027  **/
00028 
00029 #ifndef _SAM4E_ETH_H
00030 #define _SAM4E_ETH_H
00031 
00032 //Number of TX buffers
00033 #ifndef SAM4E_ETH_TX_BUFFER_COUNT
00034    #define SAM4E_ETH_TX_BUFFER_COUNT 2
00035 #elif (SAM4E_ETH_TX_BUFFER_COUNT < 1)
00036    #error SAM4E_ETH_TX_BUFFER_COUNT parameter is not valid
00037 #endif
00038 
00039 //TX buffer size
00040 #ifndef SAM4E_ETH_TX_BUFFER_SIZE
00041    #define SAM4E_ETH_TX_BUFFER_SIZE 1536
00042 #elif (SAM4E_ETH_TX_BUFFER_SIZE != 1536)
00043    #error SAM4E_ETH_TX_BUFFER_SIZE parameter is not valid
00044 #endif
00045 
00046 //Number of RX buffers
00047 #ifndef SAM4E_ETH_RX_BUFFER_COUNT
00048    #define SAM4E_ETH_RX_BUFFER_COUNT 48
00049 #elif (SAM4E_ETH_RX_BUFFER_COUNT < 12)
00050    #error SAM4E_ETH_RX_BUFFER_COUNT parameter is not valid
00051 #endif
00052 
00053 //RX buffer size
00054 #ifndef SAM4E_ETH_RX_BUFFER_SIZE
00055    #define SAM4E_ETH_RX_BUFFER_SIZE 128
00056 #elif (SAM4E_ETH_RX_BUFFER_SIZE != 128)
00057    #error SAM4E_ETH_RX_BUFFER_SIZE parameter is not valid
00058 #endif
00059 
00060 //Interrupt priority grouping
00061 #ifndef SAM4E_ETH_IRQ_PRIORITY_GROUPING
00062    #define SAM4E_ETH_IRQ_PRIORITY_GROUPING 3
00063 #elif (SAM4E_ETH_IRQ_PRIORITY_GROUPING < 0)
00064    #error SAM4E_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
00065 #endif
00066 
00067 //Ethernet interrupt group priority
00068 #ifndef SAM4E_ETH_IRQ_GROUP_PRIORITY
00069    #define SAM4E_ETH_IRQ_GROUP_PRIORITY 12
00070 #elif (SAM4E_ETH_IRQ_GROUP_PRIORITY < 0)
00071    #error SAM4E_ETH_IRQ_GROUP_PRIORITY parameter is not valid
00072 #endif
00073 
00074 //Ethernet interrupt subpriority
00075 #ifndef SAM4E_ETH_IRQ_SUB_PRIORITY
00076    #define SAM4E_ETH_IRQ_SUB_PRIORITY 0
00077 #elif (SAM4E_ETH_IRQ_SUB_PRIORITY < 0)
00078    #error SAM4E_ETH_IRQ_SUB_PRIORITY parameter is not valid
00079 #endif
00080 
00081 //Legacy definitions
00082 #ifndef PIO_PD6A_GRX1
00083    #define PIO_PD6A_GRX1 PIO_PD6A_GRX0
00084 #endif
00085 
00086 //MII signals
00087 #define GMAC_MII_MASK (PIO_PD16A_GTX3 | \
00088    PIO_PD15A_GTX2 | PIO_PD14A_GRXCK | PIO_PD13A_GCOL | PIO_PD12A_GRX3 | \
00089    PIO_PD11A_GRX2 | PIO_PD10A_GCRS | PIO_PD9A_GMDIO | PIO_PD8A_GMDC | \
00090    PIO_PD7A_GRXER | PIO_PD6A_GRX1 | PIO_PD5A_GRX0 | PIO_PD4A_GRXDV | \
00091    PIO_PD3A_GTX1 | PIO_PD2A_GTX0 | PIO_PD1A_GTXEN | PIO_PD0A_GTXCK)
00092 
00093 //TX buffer descriptor flags
00094 #define GMAC_TX_USED           0x80000000
00095 #define GMAC_TX_WRAP           0x40000000
00096 #define GMAC_TX_RLE_ERROR      0x20000000
00097 #define GMAC_TX_UNDERRUN_ERROR 0x10000000
00098 #define GMAC_TX_AHB_ERROR      0x08000000
00099 #define GMAC_TX_LATE_COL_ERROR 0x04000000
00100 #define GMAC_TX_CHECKSUM_ERROR 0x00700000
00101 #define GMAC_TX_NO_CRC         0x00010000
00102 #define GMAC_TX_LAST           0x00008000
00103 #define GMAC_TX_LENGTH         0x00003FFF
00104 
00105 //RX buffer descriptor flags
00106 #define GMAC_RX_ADDRESS        0xFFFFFFFC
00107 #define GMAC_RX_WRAP           0x00000002
00108 #define GMAC_RX_OWNERSHIP      0x00000001
00109 #define GMAC_RX_BROADCAST      0x80000000
00110 #define GMAC_RX_MULTICAST_HASH 0x40000000
00111 #define GMAC_RX_UNICAST_HASH   0x20000000
00112 #define GMAC_RX_SAR            0x08000000
00113 #define GMAC_RX_SAR_MASK       0x06000000
00114 #define GMAC_RX_TYPE_ID        0x01000000
00115 #define GMAC_RX_SNAP           0x01000000
00116 #define GMAC_RX_TYPE_ID_MASK   0x00C00000
00117 #define GMAC_RX_CHECKSUM_VALID 0x00C00000
00118 #define GMAC_RX_VLAN_TAG       0x00200000
00119 #define GMAC_RX_PRIORITY_TAG   0x00100000
00120 #define GMAC_RX_VLAN_PRIORITY  0x000E0000
00121 #define GMAC_RX_CFI            0x00010000
00122 #define GMAC_RX_EOF            0x00008000
00123 #define GMAC_RX_SOF            0x00004000
00124 #define GMAC_RX_LENGTH_MSB     0x00002000
00125 #define GMAC_RX_BAD_FCS        0x00002000
00126 #define GMAC_RX_LENGTH         0x00001FFF
00127 
00128 
00129 /**
00130  * @brief Transmit buffer descriptor
00131  **/
00132 
00133 typedef struct
00134 {
00135    uint32_t address;
00136    uint32_t status;
00137 } Sam4eTxBufferDesc;
00138 
00139 
00140 /**
00141  * @brief Receive buffer descriptor
00142  **/
00143 
00144 typedef struct
00145 {
00146    uint32_t address;
00147    uint32_t status;
00148 } Sam4eRxBufferDesc;
00149 
00150 
00151 //SAM4E Ethernet MAC driver
00152 extern const NicDriver sam4eEthDriver;
00153 
00154 //SAM4E Ethernet MAC related functions
00155 error_t sam4eEthInit(NetInterface *interface);
00156 void sam4eEthInitGpio(NetInterface *interface);
00157 void sam4eEthInitBufferDesc(NetInterface *interface);
00158 
00159 void sam4eEthTick(NetInterface *interface);
00160 
00161 void sam4eEthEnableIrq(NetInterface *interface);
00162 void sam4eEthDisableIrq(NetInterface *interface);
00163 void sam4eEthEventHandler(NetInterface *interface);
00164 
00165 error_t sam4eEthSendPacket(NetInterface *interface,
00166    const NetBuffer *buffer, size_t offset);
00167 
00168 error_t sam4eEthReceivePacket(NetInterface *interface);
00169 
00170 error_t sam4eEthSetMulticastFilter(NetInterface *interface);
00171 error_t sam4eEthUpdateMacConfig(NetInterface *interface);
00172 
00173 void sam4eEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
00174 uint16_t sam4eEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
00175 
00176 #endif
00177