sam3x_eth.h

00001 /**
00002  * @file sam3x_eth.h
00003  * @brief SAM3X Ethernet MAC controller
00004  *
00005  * @section License
00006  *
00007  * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
00008  *
00009  * This file is part of CycloneTCP Open.
00010  *
00011  * This program is free software; you can redistribute it and/or
00012  * modify it under the terms of the GNU General Public License
00013  * as published by the Free Software Foundation; either version 2
00014  * of the License, or (at your option) any later version.
00015  *
00016  * This program is distributed in the hope that it will be useful,
00017  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00018  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019  * GNU General Public License for more details.
00020  *
00021  * You should have received a copy of the GNU General Public License
00022  * along with this program; if not, write to the Free Software Foundation,
00023  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00024  *
00025  * @author Oryx Embedded SARL (www.oryx-embedded.com)
00026  * @version 1.7.6
00027  **/
00028 
00029 #ifndef _SAM3X_ETH_H
00030 #define _SAM3X_ETH_H
00031 
00032 //Number of TX buffers
00033 #ifndef SAM3X_ETH_TX_BUFFER_COUNT
00034    #define SAM3X_ETH_TX_BUFFER_COUNT 2
00035 #elif (SAM3X_ETH_TX_BUFFER_COUNT < 1)
00036    #error SAM3X_ETH_TX_BUFFER_COUNT parameter is not valid
00037 #endif
00038 
00039 //TX buffer size
00040 #ifndef SAM3X_ETH_TX_BUFFER_SIZE
00041    #define SAM3X_ETH_TX_BUFFER_SIZE 1536
00042 #elif (SAM3X_ETH_TX_BUFFER_SIZE != 1536)
00043    #error SAM3X_ETH_TX_BUFFER_SIZE parameter is not valid
00044 #endif
00045 
00046 //Number of RX buffers
00047 #ifndef SAM3X_ETH_RX_BUFFER_COUNT
00048    #define SAM3X_ETH_RX_BUFFER_COUNT 48
00049 #elif (SAM3X_ETH_RX_BUFFER_COUNT < 12)
00050    #error SAM3X_ETH_RX_BUFFER_COUNT parameter is not valid
00051 #endif
00052 
00053 //RX buffer size
00054 #ifndef SAM3X_ETH_RX_BUFFER_SIZE
00055    #define SAM3X_ETH_RX_BUFFER_SIZE 128
00056 #elif (SAM3X_ETH_RX_BUFFER_SIZE != 128)
00057    #error SAM3X_ETH_RX_BUFFER_SIZE parameter is not valid
00058 #endif
00059 
00060 //Interrupt priority grouping
00061 #ifndef SAM3X_ETH_IRQ_PRIORITY_GROUPING
00062    #define SAM3X_ETH_IRQ_PRIORITY_GROUPING 3
00063 #elif (SAM3X_ETH_IRQ_PRIORITY_GROUPING < 0)
00064    #error SAM3X_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
00065 #endif
00066 
00067 //Ethernet interrupt group priority
00068 #ifndef SAM3X_ETH_IRQ_GROUP_PRIORITY
00069    #define SAM3X_ETH_IRQ_GROUP_PRIORITY 12
00070 #elif (SAM3X_ETH_IRQ_GROUP_PRIORITY < 0)
00071    #error SAM3X_ETH_IRQ_GROUP_PRIORITY parameter is not valid
00072 #endif
00073 
00074 //Ethernet interrupt subpriority
00075 #ifndef SAM3X_ETH_IRQ_SUB_PRIORITY
00076    #define SAM3X_ETH_IRQ_SUB_PRIORITY 0
00077 #elif (SAM3X_ETH_IRQ_SUB_PRIORITY < 0)
00078    #error SAM3X_ETH_IRQ_SUB_PRIORITY parameter is not valid
00079 #endif
00080 
00081 //RMII signals
00082 #define EMAC_RMII_MASK (PIO_PB9A_EMDIO | PIO_PB8A_EMDC | \
00083    PIO_PB7A_ERXER | PIO_PB6A_ERX1 | PIO_PB5A_ERX0 | PIO_PB4A_ERXDV | \
00084    PIO_PB3A_ETX1 | PIO_PB2A_ETX0 | PIO_PB1A_ETXEN | PIO_PB0A_ETXCK)
00085 
00086 //TX buffer descriptor flags
00087 #define EMAC_TX_USED           0x80000000
00088 #define EMAC_TX_WRAP           0x40000000
00089 #define EMAC_TX_ERROR          0x20000000
00090 #define EMAC_TX_UNDERRUN       0x10000000
00091 #define EMAC_TX_EXHAUSTED      0x08000000
00092 #define EMAC_TX_NO_CRC         0x00010000
00093 #define EMAC_TX_LAST           0x00008000
00094 #define EMAC_TX_LENGTH         0x000007FF
00095 
00096 //RX buffer descriptor flags
00097 #define EMAC_RX_ADDRESS        0xFFFFFFFC
00098 #define EMAC_RX_WRAP           0x00000002
00099 #define EMAC_RX_OWNERSHIP      0x00000001
00100 #define EMAC_RX_BROADCAST      0x80000000
00101 #define EMAC_RX_MULTICAST_HASH 0x40000000
00102 #define EMAC_RX_UNICAST_HASH   0x20000000
00103 #define EMAC_RX_EXT_ADDR       0x10000000
00104 #define EMAC_RX_SAR1           0x04000000
00105 #define EMAC_RX_SAR2           0x02000000
00106 #define EMAC_RX_SAR3           0x01000000
00107 #define EMAC_RX_SAR4           0x00800000
00108 #define EMAC_RX_TYPE_ID        0x00400000
00109 #define EMAC_RX_VLAN_TAG       0x00200000
00110 #define EMAC_RX_PRIORITY_TAG   0x00100000
00111 #define EMAC_RX_VLAN_PRIORITY  0x000E0000
00112 #define EMAC_RX_CFI            0x00010000
00113 #define EMAC_RX_EOF            0x00008000
00114 #define EMAC_RX_SOF            0x00004000
00115 #define EMAC_RX_OFFSET         0x00003000
00116 #define EMAC_RX_LENGTH         0x00000FFF
00117 
00118 
00119 /**
00120  * @brief Transmit buffer descriptor
00121  **/
00122 
00123 typedef struct
00124 {
00125    uint32_t address;
00126    uint32_t status;
00127 } Sam3xTxBufferDesc;
00128 
00129 
00130 /**
00131  * @brief Receive buffer descriptor
00132  **/
00133 
00134 typedef struct
00135 {
00136    uint32_t address;
00137    uint32_t status;
00138 } Sam3xRxBufferDesc;
00139 
00140 
00141 //SAM3X Ethernet MAC driver
00142 extern const NicDriver sam3xEthDriver;
00143 
00144 //SAM3X Ethernet MAC related functions
00145 error_t sam3xEthInit(NetInterface *interface);
00146 void sam3xEthInitGpio(NetInterface *interface);
00147 void sam3xEthInitBufferDesc(NetInterface *interface);
00148 
00149 void sam3xEthTick(NetInterface *interface);
00150 
00151 void sam3xEthEnableIrq(NetInterface *interface);
00152 void sam3xEthDisableIrq(NetInterface *interface);
00153 void sam3xEthEventHandler(NetInterface *interface);
00154 
00155 error_t sam3xEthSendPacket(NetInterface *interface,
00156    const NetBuffer *buffer, size_t offset);
00157 
00158 error_t sam3xEthReceivePacket(NetInterface *interface);
00159 
00160 error_t sam3xEthSetMulticastFilter(NetInterface *interface);
00161 error_t sam3xEthUpdateMacConfig(NetInterface *interface);
00162 
00163 void sam3xEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
00164 uint16_t sam3xEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
00165 
00166 #endif
00167