rtl8211.h

00001 /**
00002  * @file rtl8211.h
00003  * @brief RTL8211 Ethernet PHY transceiver
00004  *
00005  * @section License
00006  *
00007  * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
00008  *
00009  * This file is part of CycloneTCP Open.
00010  *
00011  * This program is free software; you can redistribute it and/or
00012  * modify it under the terms of the GNU General Public License
00013  * as published by the Free Software Foundation; either version 2
00014  * of the License, or (at your option) any later version.
00015  *
00016  * This program is distributed in the hope that it will be useful,
00017  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00018  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019  * GNU General Public License for more details.
00020  *
00021  * You should have received a copy of the GNU General Public License
00022  * along with this program; if not, write to the Free Software Foundation,
00023  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00024  *
00025  * @author Oryx Embedded SARL (www.oryx-embedded.com)
00026  * @version 1.7.6
00027  **/
00028 
00029 #ifndef _RTL8211_H
00030 #define _RTL8211_H
00031 
00032 //Dependencies
00033 #include "core/nic.h"
00034 
00035 //PHY address
00036 #ifndef RTL8211_PHY_ADDR
00037    #define RTL8211_PHY_ADDR 1
00038 #elif (RTL8211_PHY_ADDR < 0 || RTL8211_PHY_ADDR > 31)
00039    #error RTL8211_PHY_ADDR parameter is not valid
00040 #endif
00041 
00042 //RTL8211 registers
00043 #define RTL8211_PHY_REG_BMCR        0x00
00044 #define RTL8211_PHY_REG_BMSR        0x01
00045 #define RTL8211_PHY_REG_PHYIDR1     0x02
00046 #define RTL8211_PHY_REG_PHYIDR2     0x03
00047 #define RTL8211_PHY_REG_ANAR        0x04
00048 #define RTL8211_PHY_REG_ANLPAR      0x05
00049 #define RTL8211_PHY_REG_ANER        0x06
00050 #define RTL8211_PHY_REG_ANNPRR      0x07
00051 #define RTL8211_PHY_REG_LPNPAR      0x08
00052 #define RTL8211_PHY_REG_GBCR        0x09
00053 #define RTL8211_PHY_REG_GBSR        0x0A
00054 #define RTL8211_PHY_REG_MACR        0x0D
00055 #define RTL8211_PHY_REG_MAADR       0x0E
00056 #define RTL8211_PHY_REG_GBESR       0x0F
00057 #define RTL8211_PHY_REG_PHYCR       0x10
00058 #define RTL8211_PHY_REG_PHYSR       0x11
00059 #define RTL8211_PHY_REG_INER        0x12
00060 #define RTL8211_PHY_REG_INSR        0x13
00061 #define RTL8211_PHY_REG_RXERC       0x18
00062 #define RTL8211_PHY_REG_LDPSR       0x1B
00063 #define RTL8211_PHY_REG_EPAGSR      0x1E
00064 #define RTL8211_PHY_REG_PAGSEL      0x1F
00065 
00066 //BMCR register
00067 #define BMCR_RESET                  (1 << 15)
00068 #define BMCR_LOOPBACK               (1 << 14)
00069 #define BMCR_SPEED_SEL              (1 << 13)
00070 #define BMCR_AN_EN                  (1 << 12)
00071 #define BMCR_POWER_DOWN             (1 << 11)
00072 #define BMCR_ISOLATE                (1 << 10)
00073 #define BMCR_RESTART_AN             (1 << 9)
00074 #define BMCR_DUPLEX_MODE            (1 << 8)
00075 #define BMCR_COL_TEST               (1 << 7)
00076 
00077 //BMSR register
00078 #define BMSR_100BT4                 (1 << 15)
00079 #define BMSR_100BTX_FD              (1 << 14)
00080 #define BMSR_100BTX                 (1 << 13)
00081 #define BMSR_10BT_FD                (1 << 12)
00082 #define BMSR_10BT                   (1 << 11)
00083 #define BMSR_NO_PREAMBLE            (1 << 6)
00084 #define BMSR_AN_COMPLETE            (1 << 5)
00085 #define BMSR_REMOTE_FAULT           (1 << 4)
00086 #define BMSR_AN_ABLE                (1 << 3)
00087 #define BMSR_LINK_STATUS            (1 << 2)
00088 #define BMSR_JABBER_DETECT          (1 << 1)
00089 #define BMSR_EXTENDED_CAP           (1 << 0)
00090 
00091 //ANAR register
00092 #define ANAR_NEXT_PAGE              (1 << 15)
00093 #define ANAR_REMOTE_FAULT           (1 << 13)
00094 #define ANAR_PAUSE1                 (1 << 11)
00095 #define ANAR_PAUSE0                 (1 << 10)
00096 #define ANAR_100BT4                 (1 << 9)
00097 #define ANAR_100BTX_FD              (1 << 8)
00098 #define ANAR_100BTX                 (1 << 7)
00099 #define ANAR_10BT_FD                (1 << 6)
00100 #define ANAR_10BT                   (1 << 5)
00101 #define ANAR_SELECTOR4              (1 << 4)
00102 #define ANAR_SELECTOR3              (1 << 3)
00103 #define ANAR_SELECTOR2              (1 << 2)
00104 #define ANAR_SELECTOR1              (1 << 1)
00105 #define ANAR_SELECTOR0              (1 << 0)
00106 
00107 //ANLPAR register
00108 #define ANLPAR_NEXT_PAGE            (1 << 15)
00109 #define ANLPAR_LP_ACK               (1 << 14)
00110 #define ANLPAR_REMOTE_FAULT         (1 << 13)
00111 #define ANLPAR_PAUSE1               (1 << 11)
00112 #define ANLPAR_PAUSE0               (1 << 10)
00113 #define ANLPAR_100BT4               (1 << 9)
00114 #define ANLPAR_100BTX_FD            (1 << 8)
00115 #define ANLPAR_100BTX               (1 << 7)
00116 #define ANLPAR_10BT_FD              (1 << 6)
00117 #define ANLPAR_10BT                 (1 << 5)
00118 #define ANLPAR_SELECTOR4            (1 << 4)
00119 #define ANLPAR_SELECTOR3            (1 << 3)
00120 #define ANLPAR_SELECTOR2            (1 << 2)
00121 #define ANLPAR_SELECTOR1            (1 << 1)
00122 #define ANLPAR_SELECTOR0            (1 << 0)
00123 
00124 //ANER register
00125 #define ANER_PAR_DET_FAULT          (1 << 4)
00126 #define ANER_LP_NEXT_PAGE_ABLE      (1 << 3)
00127 #define ANER_NEXT_PAGE_ABLE         (1 << 2)
00128 #define ANER_PAGE_RECEIVED          (1 << 1)
00129 #define ANER_LP_AN_ABLE             (1 << 0)
00130 
00131 //ANNPTR register
00132 #define ANNPTR_NEXT_PAGE            (1 << 15)
00133 #define ANNPTR_MSG_PAGE             (1 << 13)
00134 #define ANNPTR_ACK2                 (1 << 12)
00135 #define ANNPTR_TOGGLE               (1 << 11)
00136 #define ANNPTR_MESSAGE10            (1 << 10)
00137 #define ANNPTR_MESSAGE9             (1 << 9)
00138 #define ANNPTR_MESSAGE8             (1 << 8)
00139 #define ANNPTR_MESSAGE7             (1 << 7)
00140 #define ANNPTR_MESSAGE6             (1 << 6)
00141 #define ANNPTR_MESSAGE5             (1 << 5)
00142 #define ANNPTR_MESSAGE4             (1 << 4)
00143 #define ANNPTR_MESSAGE3             (1 << 3)
00144 #define ANNPTR_MESSAGE2             (1 << 2)
00145 #define ANNPTR_MESSAGE1             (1 << 1)
00146 #define ANNPTR_MESSAGE0             (1 << 0)
00147 
00148 //ANNPRR register
00149 #define ANNPRR_NEXT_PAGE            (1 << 15)
00150 #define ANNPRR_ACK                  (1 << 14)
00151 #define ANNPRR_MSG_PAGE             (1 << 13)
00152 #define ANNPRR_ACK2                 (1 << 12)
00153 #define ANNPRR_TOGGLE               (1 << 11)
00154 #define ANNPRR_MESSAGE10            (1 << 10)
00155 #define ANNPRR_MESSAGE9             (1 << 9)
00156 #define ANNPRR_MESSAGE8             (1 << 8)
00157 #define ANNPRR_MESSAGE7             (1 << 7)
00158 #define ANNPRR_MESSAGE6             (1 << 6)
00159 #define ANNPRR_MESSAGE5             (1 << 5)
00160 #define ANNPRR_MESSAGE4             (1 << 4)
00161 #define ANNPRR_MESSAGE3             (1 << 3)
00162 #define ANNPRR_MESSAGE2             (1 << 2)
00163 #define ANNPRR_MESSAGE1             (1 << 1)
00164 #define ANNPRR_MESSAGE0             (1 << 0)
00165 
00166 //GBCR register
00167 #define GBCR_TEST_MODE2             (1 << 15)
00168 #define GBCR_TEST_MODE1             (1 << 14)
00169 #define GBCR_TEST_MODE0             (1 << 13)
00170 #define GBCR_MS_MAN_CONF_EN         (1 << 12)
00171 #define GBCR_MS_MAN_CONF_VAL        (1 << 11)
00172 #define GBCR_PORT_TYPE              (1 << 10)
00173 #define GBCR_1000BT_FD              (1 << 9)
00174 #define GBCR_1000BT_HD              (1 << 8)
00175 
00176 //GBSR register
00177 #define GBSR_MS_CONF_FAULT          (1 << 15)
00178 #define GBSR_MS_CONF_RES            (1 << 14)
00179 #define GBSR_LOC_REC_STATUS         (1 << 13)
00180 #define GBSR_REM_REC_STATUS         (1 << 12)
00181 #define GBSR_LP_1000BT_FD           (1 << 11)
00182 #define GBSR_LP_1000BT_HD           (1 << 10)
00183 #define GBSR_IDLE_ERR_CTR7          (1 << 7)
00184 #define GBSR_IDLE_ERR_CTR6          (1 << 6)
00185 #define GBSR_IDLE_ERR_CTR5          (1 << 5)
00186 #define GBSR_IDLE_ERR_CTR4          (1 << 4)
00187 #define GBSR_IDLE_ERR_CTR3          (1 << 3)
00188 #define GBSR_IDLE_ERR_CTR2          (1 << 2)
00189 #define GBSR_IDLE_ERR_CTR1          (1 << 1)
00190 #define GBSR_IDLE_ERR_CTR0          (1 << 0)
00191 
00192 //MACR register
00193 #define MACR_FUNCTION1              (1 << 15)
00194 #define MACR_FUNCTION0              (1 << 14)
00195 #define MACR_DEVAD4                 (1 << 4)
00196 #define MACR_DEVAD3                 (1 << 3)
00197 #define MACR_DEVAD2                 (1 << 2)
00198 #define MACR_DEVAD1                 (1 << 1)
00199 #define MACR_DEVAD0                 (1 << 0)
00200 
00201 //GBESR register
00202 #define GBESR_1000BX_FD             (1 << 15)
00203 #define GBESR_1000BX_HD             (1 << 14)
00204 #define GBESR_1000BT_FD             (1 << 13)
00205 #define GBESR_1000BT_HD             (1 << 12)
00206 
00207 //PHYCR register
00208 #define PHYCR_DISABLE_RXC           (1 << 15)
00209 #define PHYCR_FPR_FAIL_SEL2         (1 << 14)
00210 #define PHYCR_FPR_FAIL_SEL1         (1 << 13)
00211 #define PHYCR_FPR_FAIL_SEL0         (1 << 12)
00212 #define PHYCR_ASSERT_CRS_ON_TX      (1 << 11)
00213 #define PHYCR_FORCE_LINK_GOOD       (1 << 10)
00214 #define PHYCR_ENABLE_CROSSOVER      (1 << 6)
00215 #define PHYCR_MDI_MODE              (1 << 5)
00216 #define PHYCR_DISABLE CLK125        (1 << 4)
00217 #define PHYCR_DISABLE_JABBER        (1 << 0)
00218 
00219 //PHYSR register
00220 #define PHYSR_SPEED1                (1 << 15)
00221 #define PHYSR_SPEED0                (1 << 14)
00222 #define PHYSR_DUPLEX                (1 << 13)
00223 #define PHYSR_PAGE_RECEIVED         (1 << 12)
00224 #define PHYSR_SPEED_DUPLEX_RESOLVED (1 << 11)
00225 #define PHYSR_LINK                  (1 << 10)
00226 #define PHYSR_MDI_CROSSOVER_STATUS  (1 << 6)
00227 #define PHYSR_RE_LINK_OK            (1 << 1)
00228 #define PHYSR_JABBER                (1 << 0)
00229 
00230 //Speed
00231 #define PHYSR_SPEED_MASK            (3 << 14)
00232 #define PHYSR_SPEED_10              (0 << 14)
00233 #define PHYSR_SPEED_100             (1 << 14)
00234 #define PHYSR_SPEED_1000            (2 << 14)
00235 
00236 //INER register
00237 #define INER_AN_ERROR               (1 << 15)
00238 #define INER_PAGE_RECEIVED          (1 << 12)
00239 #define INER_AN_COMPLETE            (1 << 11)
00240 #define INER_LINK_STATUS            (1 << 10)
00241 #define INER_SYMBOL_ERROR           (1 << 9)
00242 #define INER_FALSE_CARRIER          (1 << 8)
00243 #define INER_JABBER                 (1 << 0)
00244 
00245 //INSR register
00246 #define INSR_AN_ERROR               (1 << 15)
00247 #define INSR_PAGE_RECEIVED          (1 << 12)
00248 #define INSR_AN_COMPLETE            (1 << 11)
00249 #define INSR_LINK_STATUS            (1 << 10)
00250 #define INSR_SYMBOL_ERROR           (1 << 9)
00251 #define INSR_FALSE_CARRIER          (1 << 8)
00252 #define INSR_JABBER                 (1 << 0)
00253 
00254 //LDPSR register
00255 #define LDPSR_POWER_SAVE_MODE       (1 << 0)
00256 
00257 //EPAGSR register
00258 #define EPAGSR_EXT_PAGE_SEL7        (1 << 7)
00259 #define EPAGSR_EXT_PAGE_SEL6        (1 << 6)
00260 #define EPAGSR_EXT_PAGE_SEL5        (1 << 5)
00261 #define EPAGSR_EXT_PAGE_SEL4        (1 << 4)
00262 #define EPAGSR_EXT_PAGE_SEL3        (1 << 3)
00263 #define EPAGSR_EXT_PAGE_SEL2        (1 << 2)
00264 #define EPAGSR_EXT_PAGE_SEL1        (1 << 1)
00265 #define EPAGSR_EXT_PAGE_SEL0        (1 << 0)
00266 
00267 //PAGSEL register
00268 #define PAGSEL_PAGE_SEL2            (1 << 2)
00269 #define PAGSEL_PAGE_SEL1            (1 << 1)
00270 #define PAGSEL_PAGE_SEL0            (1 << 0)
00271 
00272 //RTL8211 Ethernet PHY driver
00273 extern const PhyDriver rtl8211PhyDriver;
00274 
00275 //RTL8211 related functions
00276 error_t rtl8211Init(NetInterface *interface);
00277 
00278 void rtl8211Tick(NetInterface *interface);
00279 
00280 void rtl8211EnableIrq(NetInterface *interface);
00281 void rtl8211DisableIrq(NetInterface *interface);
00282 
00283 void rtl8211EventHandler(NetInterface *interface);
00284 
00285 void rtl8211WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data);
00286 uint16_t rtl8211ReadPhyReg(NetInterface *interface, uint8_t address);
00287 
00288 void rtl8211DumpPhyReg(NetInterface *interface);
00289 
00290 #endif
00291