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ksz9031.h
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00001 /** 00002 * @file ksz9031.h 00003 * @brief KSZ9031 Gigabit Ethernet PHY transceiver 00004 * 00005 * @section License 00006 * 00007 * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved. 00008 * 00009 * This file is part of CycloneTCP Open. 00010 * 00011 * This program is free software; you can redistribute it and/or 00012 * modify it under the terms of the GNU General Public License 00013 * as published by the Free Software Foundation; either version 2 00014 * of the License, or (at your option) any later version. 00015 * 00016 * This program is distributed in the hope that it will be useful, 00017 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00019 * GNU General Public License for more details. 00020 * 00021 * You should have received a copy of the GNU General Public License 00022 * along with this program; if not, write to the Free Software Foundation, 00023 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 00024 * 00025 * @author Oryx Embedded SARL (www.oryx-embedded.com) 00026 * @version 1.7.6 00027 **/ 00028 00029 #ifndef _KSZ9031_H 00030 #define _KSZ9031_H 00031 00032 //Dependencies 00033 #include "core/nic.h" 00034 00035 //PHY address 00036 #ifndef KSZ9031_PHY_ADDR 00037 #define KSZ9031_PHY_ADDR 7 00038 #elif (KSZ9031_PHY_ADDR < 0 || KSZ9031_PHY_ADDR > 31) 00039 #error KSZ9031_PHY_ADDR parameter is not valid 00040 #endif 00041 00042 //KSZ9031 registers 00043 #define KSZ9031_PHY_REG_BMCR 0x00 00044 #define KSZ9031_PHY_REG_BMSR 0x01 00045 #define KSZ9031_PHY_REG_PHYIDR1 0x02 00046 #define KSZ9031_PHY_REG_PHYIDR2 0x03 00047 #define KSZ9031_PHY_REG_ANAR 0x04 00048 #define KSZ9031_PHY_REG_ANLPAR 0x05 00049 #define KSZ9031_PHY_REG_ANER 0x06 00050 #define KSZ9031_PHY_REG_ANNPTR 0x07 00051 #define KSZ9031_PHY_REG_LPNPAR 0x08 00052 #define KSZ9031_PHY_REG_1000BT_CTRL 0x09 00053 #define KSZ9031_PHY_REG_1000BT_STATUS 0x0A 00054 #define KSZ9031_PHY_REG_MMD_CTRL 0x0D 00055 #define KSZ9031_PHY_REG_MMD_DATA 0x0E 00056 #define KSZ9031_PHY_REG_EXT_STATUS 0x0F 00057 #define KSZ9031_PHY_REG_RLB 0x11 00058 #define KSZ9031_PHY_REG_LINKMDCD 0x12 00059 #define KSZ9031_PHY_REG_DPMAPCSS 0x13 00060 #define KSZ9031_PHY_REG_RXERCTR 0x15 00061 #define KSZ9031_PHY_REG_ICSR 0x1B 00062 #define KSZ9031_PHY_REG_AUTOMDI 0x1C 00063 #define KSZ9031_PHY_REG_PHYCON 0x1F 00064 00065 //BMCR register 00066 #define BMCR_RESET (1 << 15) 00067 #define BMCR_LOOPBACK (1 << 14) 00068 #define BMCR_SPEED_SEL (1 << 13) 00069 #define BMCR_AN_EN (1 << 12) 00070 #define BMCR_POWER_DOWN (1 << 11) 00071 #define BMCR_ISOLATE (1 << 10) 00072 #define BMCR_RESTART_AN (1 << 9) 00073 #define BMCR_DUPLEX_MODE (1 << 8) 00074 00075 //BMSR register 00076 #define BMSR_100BT4 (1 << 15) 00077 #define BMSR_100BTX_FD (1 << 14) 00078 #define BMSR_100BTX_HD (1 << 13) 00079 #define BMSR_10BT_FD (1 << 12) 00080 #define BMSR_10BT_HD (1 << 11) 00081 #define BMSR_EXTENDED_STATUS (1 << 8) 00082 #define BMSR_NO_PREAMBLE (1 << 6) 00083 #define BMSR_AN_COMPLETE (1 << 5) 00084 #define BMSR_REMOTE_FAULT (1 << 4) 00085 #define BMSR_AN_ABLE (1 << 3) 00086 #define BMSR_LINK_STATUS (1 << 2) 00087 #define BMSR_JABBER_DETECT (1 << 1) 00088 #define BMSR_EXTENDED_CAP (1 << 0) 00089 00090 //ANAR register 00091 #define ANAR_NEXT_PAGE (1 << 15) 00092 #define ANAR_REMOTE_FAULT (1 << 13) 00093 #define ANAR_PAUSE1 (1 << 11) 00094 #define ANAR_PAUSE0 (1 << 10) 00095 #define ANAR_100BT4 (1 << 9) 00096 #define ANAR_100BTX_FD (1 << 8) 00097 #define ANAR_100BTX_HD (1 << 7) 00098 #define ANAR_10BT_FD (1 << 6) 00099 #define ANAR_10BT_HD (1 << 5) 00100 #define ANAR_SELECTOR4 (1 << 4) 00101 #define ANAR_SELECTOR3 (1 << 3) 00102 #define ANAR_SELECTOR2 (1 << 2) 00103 #define ANAR_SELECTOR1 (1 << 1) 00104 #define ANAR_SELECTOR0 (1 << 0) 00105 00106 //ANLPAR register 00107 #define ANLPAR_NEXT_PAGE (1 << 15) 00108 #define ANLPAR_LP_ACK (1 << 14) 00109 #define ANLPAR_REMOTE_FAULT (1 << 13) 00110 #define ANLPAR_PAUSE1 (1 << 11) 00111 #define ANLPAR_PAUSE0 (1 << 10) 00112 #define ANLPAR_100BT4 (1 << 9) 00113 #define ANLPAR_100BTX_FD (1 << 8) 00114 #define ANLPAR_100BTX_HD (1 << 7) 00115 #define ANLPAR_10BT_FD (1 << 6) 00116 #define ANLPAR_10BT_HD (1 << 5) 00117 #define ANLPAR_SELECTOR4 (1 << 4) 00118 #define ANLPAR_SELECTOR3 (1 << 3) 00119 #define ANLPAR_SELECTOR2 (1 << 2) 00120 #define ANLPAR_SELECTOR1 (1 << 1) 00121 #define ANLPAR_SELECTOR0 (1 << 0) 00122 00123 //ANER register 00124 #define ANER_PAR_DET_FAULT (1 << 4) 00125 #define ANER_LP_NEXT_PAGE_ABLE (1 << 3) 00126 #define ANER_NEXT_PAGE_ABLE (1 << 2) 00127 #define ANER_PAGE_RECEIVED (1 << 1) 00128 #define ANER_LP_AN_ABLE (1 << 0) 00129 00130 //ANNPTR register 00131 #define ANNPTR_NEXT_PAGE (1 << 15) 00132 #define ANNPTR_MSG_PAGE (1 << 13) 00133 #define ANNPTR_ACK2 (1 << 12) 00134 #define ANNPTR_TOGGLE (1 << 11) 00135 #define ANNPTR_MESSAGE10 (1 << 10) 00136 #define ANNPTR_MESSAGE9 (1 << 9) 00137 #define ANNPTR_MESSAGE8 (1 << 8) 00138 #define ANNPTR_MESSAGE7 (1 << 7) 00139 #define ANNPTR_MESSAGE6 (1 << 6) 00140 #define ANNPTR_MESSAGE5 (1 << 5) 00141 #define ANNPTR_MESSAGE4 (1 << 4) 00142 #define ANNPTR_MESSAGE3 (1 << 3) 00143 #define ANNPTR_MESSAGE2 (1 << 2) 00144 #define ANNPTR_MESSAGE1 (1 << 1) 00145 #define ANNPTR_MESSAGE0 (1 << 0) 00146 00147 //LPNPAR register 00148 #define LPNPAR_NEXT_PAGE (1 << 15) 00149 #define LPNPAR_ACK (1 << 14) 00150 #define LPNPAR_MSG_PAGE (1 << 13) 00151 #define LPNPAR_ACK2 (1 << 12) 00152 #define LPNPAR_TOGGLE (1 << 11) 00153 #define LPNPAR_MESSAGE10 (1 << 10) 00154 #define LPNPAR_MESSAGE9 (1 << 9) 00155 #define LPNPAR_MESSAGE8 (1 << 8) 00156 #define LPNPAR_MESSAGE7 (1 << 7) 00157 #define LPNPAR_MESSAGE6 (1 << 6) 00158 #define LPNPAR_MESSAGE5 (1 << 5) 00159 #define LPNPAR_MESSAGE4 (1 << 4) 00160 #define LPNPAR_MESSAGE3 (1 << 3) 00161 #define LPNPAR_MESSAGE2 (1 << 2) 00162 #define LPNPAR_MESSAGE1 (1 << 1) 00163 #define LPNPAR_MESSAGE0 (1 << 0) 00164 00165 //1000BT_CTRL register 00166 #define _1000BT_CTRL_TEST_MODE2 (1 << 15) 00167 #define _1000BT_CTRL_TEST_MODE1 (1 << 14) 00168 #define _1000BT_CTRL_TEST_MODE0 (1 << 13) 00169 #define _1000BT_CTRL_MS_MAN_CONF_EN (1 << 12) 00170 #define _1000BT_CTRL_MS_MAN_CONF_VAL (1 << 11) 00171 #define _1000BT_CTRL_PORT_TYPE (1 << 10) 00172 #define _1000BT_CTRL_1000BT_FD (1 << 9) 00173 #define _1000BT_CTRL_1000BT_HD (1 << 8) 00174 00175 //1000BT_STATUS register 00176 #define _1000BT_STATUS_MS_CONF_FAULT (1 << 15) 00177 #define _1000BT_STATUS_MS_CONF_RES (1 << 14) 00178 #define _1000BT_STATUS_LOC_REC_STATUS (1 << 13) 00179 #define _1000BT_STATUS_REM_REC_STATUS (1 << 12) 00180 #define _1000BT_STATUS_LP_1000BT_FD (1 << 11) 00181 #define _1000BT_STATUS_LP_1000BT_HD (1 << 10) 00182 #define _1000BT_STATUS_IDLE_ERR_CTR7 (1 << 7) 00183 #define _1000BT_STATUS_IDLE_ERR_CTR6 (1 << 6) 00184 #define _1000BT_STATUS_IDLE_ERR_CTR5 (1 << 5) 00185 #define _1000BT_STATUS_IDLE_ERR_CTR4 (1 << 4) 00186 #define _1000BT_STATUS_IDLE_ERR_CTR3 (1 << 3) 00187 #define _1000BT_STATUS_IDLE_ERR_CTR2 (1 << 2) 00188 #define _1000BT_STATUS_IDLE_ERR_CTR1 (1 << 1) 00189 #define _1000BT_STATUS_IDLE_ERR_CTR0 (1 << 0) 00190 00191 //MMD_CTRL register 00192 #define MMD_CTRL_DEVICE_OP_MODE1 (1 << 15) 00193 #define MMD_CTRL_DEVICE_OP_MODE0 (1 << 14) 00194 #define MMD_CTRL_DEVICE_ADDR4 (1 << 4) 00195 #define MMD_CTRL_DEVICE_ADDR3 (1 << 3) 00196 #define MMD_CTRL_DEVICE_ADDR2 (1 << 2) 00197 #define MMD_CTRL_DEVICE_ADDR1 (1 << 1) 00198 #define MMD_CTRL_DEVICE_ADDR0 (1 << 0) 00199 00200 //EXT_STATUS register 00201 #define EXT_STATUS_1000BX_FD (1 << 15) 00202 #define EXT_STATUS_1000BX_HD (1 << 14) 00203 #define EXT_STATUS_1000BT_FD (1 << 13) 00204 #define EXT_STATUS_1000BT_HD (1 << 12) 00205 00206 //RLB register 00207 #define RLB_REMOTE_LOOPBACK (1 << 8) 00208 00209 //LINKMDCD register 00210 #define LINKMDCD_DIAG_EN (1 << 15) 00211 #define LINKMDCD_DIAG_TEST_PAIR1 (1 << 13) 00212 #define LINKMDCD_DIAG_TEST_PAIR0 (1 << 12) 00213 #define LINKMDCD_FAULT_STATUS1 (1 << 9) 00214 #define LINKMDCD_FAULT_STATUS0 (1 << 8) 00215 #define LINKMDCD_FAULT_DATA7 (1 << 7) 00216 #define LINKMDCD_FAULT_DATA6 (1 << 6) 00217 #define LINKMDCD_FAULT_DATA5 (1 << 5) 00218 #define LINKMDCD_FAULT_DATA4 (1 << 4) 00219 #define LINKMDCD_FAULT_DATA3 (1 << 3) 00220 #define LINKMDCD_FAULT_DATA2 (1 << 2) 00221 #define LINKMDCD_FAULT_DATA1 (1 << 1) 00222 #define LINKMDCD_FAULT_DATA0 (1 << 0) 00223 00224 //DPMAPCSS register 00225 #define DPMAPCSS_1000BT_LINK_STATUS (1 << 2) 00226 #define DPMAPCSS_100BTX_LINK_STATUS (1 << 1) 00227 00228 //ICSR register 00229 #define ICSR_JABBER_IE (1 << 15) 00230 #define ICSR_RECEIVE_ERROR_IE (1 << 14) 00231 #define ICSR_PAGE_RECEIVED_IE (1 << 13) 00232 #define ICSR_PAR_DET_FAULT_IE (1 << 12) 00233 #define ICSR_LP_ACK_IE (1 << 11) 00234 #define ICSR_LINK_DOWN_IE (1 << 10) 00235 #define ICSR_REMOTE_FAULT_IE (1 << 9) 00236 #define ICSR_LINK_UP_IE (1 << 8) 00237 #define ICSR_JABBER_IF (1 << 7) 00238 #define ICSR_RECEIVE_ERROR_IF (1 << 6) 00239 #define ICSR_PAGE_RECEIVED_IF (1 << 5) 00240 #define ICSR_PAR_DET_FAULT_IF (1 << 4) 00241 #define ICSR_LP_ACK_IF (1 << 3) 00242 #define ICSR_LINK_DOWN_IF (1 << 2) 00243 #define ICSR_REMOTE_FAULT_IF (1 << 1) 00244 #define ICSR_LINK_UP_IF (1 << 0) 00245 00246 //AUTOMDI register 00247 #define AUTOMDI_MDI_SEL (1 << 7) 00248 #define AUTOMDI_SWAP_OFF (1 << 6) 00249 00250 //PHYCON register 00251 #define PHYCON_INT_LEVEL (1 << 14) 00252 #define PHYCON_JABBER_EN (1 << 9) 00253 #define PHYCON_SPEED_1000BT (1 << 6) 00254 #define PHYCON_SPEED_100BTX (1 << 5) 00255 #define PHYCON_SPEED_10BT (1 << 4) 00256 #define PHYCON_DUPLEX_STATUS (1 << 3) 00257 #define PHYCON_1000BT_MS_STATUS (1 << 2) 00258 #define PHYCON_LINK_STATUS_CHECK_FAIL (1 << 0) 00259 00260 //KSZ9031 Ethernet PHY driver 00261 extern const PhyDriver ksz9031PhyDriver; 00262 00263 //KSZ9031 related functions 00264 error_t ksz9031Init(NetInterface *interface); 00265 00266 void ksz9031Tick(NetInterface *interface); 00267 00268 void ksz9031EnableIrq(NetInterface *interface); 00269 void ksz9031DisableIrq(NetInterface *interface); 00270 00271 void ksz9031EventHandler(NetInterface *interface); 00272 00273 void ksz9031WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data); 00274 uint16_t ksz9031ReadPhyReg(NetInterface *interface, uint8_t address); 00275 00276 void ksz9031DumpPhyReg(NetInterface *interface); 00277 00278 #endif 00279
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