ksz8895.h

00001 /**
00002  * @file ksz8895.h
00003  * @brief KSZ8895 Ethernet switch
00004  *
00005  * @section License
00006  *
00007  * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
00008  *
00009  * This file is part of CycloneTCP Open.
00010  *
00011  * This program is free software; you can redistribute it and/or
00012  * modify it under the terms of the GNU General Public License
00013  * as published by the Free Software Foundation; either version 2
00014  * of the License, or (at your option) any later version.
00015  *
00016  * This program is distributed in the hope that it will be useful,
00017  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00018  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019  * GNU General Public License for more details.
00020  *
00021  * You should have received a copy of the GNU General Public License
00022  * along with this program; if not, write to the Free Software Foundation,
00023  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00024  *
00025  * @author Oryx Embedded SARL (www.oryx-embedded.com)
00026  * @version 1.7.6
00027  **/
00028 
00029 #ifndef _KSZ8895_H
00030 #define _KSZ8895_H
00031 
00032 //Dependencies
00033 #include "core/nic.h"
00034 
00035 //KSZ8895 ports
00036 #define KSZ8895_PORT1               1
00037 #define KSZ8895_PORT2               2
00038 #define KSZ8895_PORT3               3
00039 #define KSZ8895_PORT4               4
00040 
00041 //KSZ8895 registers
00042 #define KSZ8895_PHY_REG_BMCR        0x00
00043 #define KSZ8895_PHY_REG_BMSR        0x01
00044 #define KSZ8895_PHY_REG_PHYIDR1     0x02
00045 #define KSZ8895_PHY_REG_PHYIDR2     0x03
00046 #define KSZ8895_PHY_REG_ANAR        0x04
00047 #define KSZ8895_PHY_REG_ANLPAR      0x05
00048 #define KSZ8895_PHY_REG_LINKMDCS    0x1D
00049 #define KSZ8895_PHY_REG_PHYSCS      0x1F
00050 
00051 //BMCR register
00052 #define BMCR_SOFT_RESET             (1 << 15)
00053 #define BMCR_LOOPBACK               (1 << 14)
00054 #define BMCR_FORCE_100              (1 << 13)
00055 #define BMCR_AN_EN                  (1 << 12)
00056 #define BMCR_POWER_DOWN             (1 << 11)
00057 #define BMCR_ISOLATE                (1 << 10)
00058 #define BMCR_RESTART_AN             (1 << 9)
00059 #define BMCR_FORCE_FULL_DUPLEX      (1 << 8)
00060 #define BMCR_COL_TEST               (1 << 7)
00061 #define BMCR_HP_MDIX                (1 << 5)
00062 #define BMCR_FORCE_MDI              (1 << 4)
00063 #define BMCR_DIS_AUTO_MDIX          (1 << 3)
00064 #define BMCR_DIS_FAR_END_FAULT      (1 << 2)
00065 #define BMCR_DIS_TRANSMIT           (1 << 1)
00066 #define BMCR_DIS_LED                (1 << 0)
00067 
00068 //BMSR register
00069 #define BMSR_100BT4                 (1 << 15)
00070 #define BMSR_100BTX_FD              (1 << 14)
00071 #define BMSR_100BTX                 (1 << 13)
00072 #define BMSR_10BT_FD                (1 << 12)
00073 #define BMSR_10BT                   (1 << 11)
00074 #define BMSR_NO_PREAMBLE            (1 << 6)
00075 #define BMSR_AN_COMPLETE            (1 << 5)
00076 #define BMSR_FAR_END_FAULT          (1 << 4)
00077 #define BMSR_AN_ABLE                (1 << 3)
00078 #define BMSR_LINK_STATUS            (1 << 2)
00079 #define BMSR_JABBER_TEST            (1 << 1)
00080 #define BMSR_EXTENDED_CAP           (1 << 0)
00081 
00082 //ANAR register
00083 #define ANAR_NEXT_PAGE              (1 << 15)
00084 #define ANAR_REMOTE_FAULT           (1 << 13)
00085 #define ANAR_PAUSE                  (1 << 10)
00086 #define ANAR_100BTX_FD              (1 << 8)
00087 #define ANAR_100BTX                 (1 << 7)
00088 #define ANAR_10BT_FD                (1 << 6)
00089 #define ANAR_10BT                   (1 << 5)
00090 #define ANAR_SELECTOR4              (1 << 4)
00091 #define ANAR_SELECTOR3              (1 << 3)
00092 #define ANAR_SELECTOR2              (1 << 2)
00093 #define ANAR_SELECTOR1              (1 << 1)
00094 #define ANAR_SELECTOR0              (1 << 0)
00095 
00096 //ANLPAR register
00097 #define ANLPAR_NEXT_PAGE            (1 << 15)
00098 #define ANLPAR_LP_ACK               (1 << 14)
00099 #define ANLPAR_REMOTE_FAULT         (1 << 13)
00100 #define ANLPAR_PAUSE                (1 << 10)
00101 #define ANLPAR_100BTX_FD            (1 << 8)
00102 #define ANLPAR_100BTX               (1 << 7)
00103 #define ANLPAR_10BT_FD              (1 << 6)
00104 #define ANLPAR_10BT                 (1 << 5)
00105 
00106 //LINKMDCS register
00107 #define LINKMDCS_VCT_EN             (1 << 15)
00108 #define LINKMDCS_VCT_RESULT1        (1 << 14)
00109 #define LINKMDCS_VCT_RESULT0        (1 << 13)
00110 #define LINKMDCS_VCT_10M_SHORT      (1 << 12)
00111 #define LINKMDCS_VCT_FAULT_COUNT8   (1 << 8)
00112 #define LINKMDCS_VCT_FAULT_COUNT7   (1 << 7)
00113 #define LINKMDCS_VCT_FAULT_COUNT6   (1 << 6)
00114 #define LINKMDCS_VCT_FAULT_COUNT5   (1 << 5)
00115 #define LINKMDCS_VCT_FAULT_COUNT4   (1 << 4)
00116 #define LINKMDCS_VCT_FAULT_COUNT3   (1 << 3)
00117 #define LINKMDCS_VCT_FAULT_COUNT2   (1 << 2)
00118 #define LINKMDCS_VCT_FAULT_COUNT1   (1 << 1)
00119 #define LINKMDCS_VCT_FAULT_COUNT0   (1 << 0)
00120 
00121 //PHYSCS register
00122 #define PHYSCS_OP_MODE2             (1 << 10)
00123 #define PHYSCS_OP_MODE1             (1 << 9)
00124 #define PHYSCS_OP_MODE0             (1 << 8)
00125 #define PHYSCS_POLRVS               (1 << 5)
00126 #define PHYSCS_MDIX_STATUS          (1 << 4)
00127 #define PHYSCS_FORCE_LINK           (1 << 3)
00128 #define PHYSCS_PWRSAVE              (1 << 2)
00129 #define PHYSCS_REMOTE_LOOPBACK      (1 << 1)
00130 
00131 //Operation mode indication
00132 #define PHYCON1_OP_MODE_MASK        (7 << 8)
00133 #define PHYCON1_OP_MODE_AN          (0 << 8)
00134 #define PHYCON1_OP_MODE_10BT        (1 << 8)
00135 #define PHYCON1_OP_MODE_100BTX      (2 << 8)
00136 #define PHYCON1_OP_MODE_10BT_FD     (5 << 8)
00137 #define PHYCON1_OP_MODE_100BTX_FD   (6 << 8)
00138 
00139 //KSZ8895 Ethernet switch driver
00140 extern const PhyDriver ksz8895PhyDriver;
00141 
00142 //KSZ8895 related functions
00143 error_t ksz8895Init(NetInterface *interface);
00144 
00145 bool_t ksz8895GetLinkState(NetInterface *interface, uint8_t port);
00146 
00147 void ksz8895Tick(NetInterface *interface);
00148 
00149 void ksz8895EnableIrq(NetInterface *interface);
00150 void ksz8895DisableIrq(NetInterface *interface);
00151 
00152 void ksz8895EventHandler(NetInterface *interface);
00153 
00154 void ksz8895WritePhyReg(NetInterface *interface,
00155    uint8_t port, uint8_t address, uint16_t data);
00156 
00157 uint16_t ksz8895ReadPhyReg(NetInterface *interface,
00158    uint8_t port, uint8_t address);
00159 
00160 void ksz8895DumpPhyReg(NetInterface *interface, uint8_t port);
00161 
00162 #endif
00163