ksz8721.h

00001 /**
00002  * @file ksz8721.h
00003  * @brief KSZ8721 Ethernet PHY transceiver
00004  *
00005  * @section License
00006  *
00007  * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
00008  *
00009  * This file is part of CycloneTCP Open.
00010  *
00011  * This program is free software; you can redistribute it and/or
00012  * modify it under the terms of the GNU General Public License
00013  * as published by the Free Software Foundation; either version 2
00014  * of the License, or (at your option) any later version.
00015  *
00016  * This program is distributed in the hope that it will be useful,
00017  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00018  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019  * GNU General Public License for more details.
00020  *
00021  * You should have received a copy of the GNU General Public License
00022  * along with this program; if not, write to the Free Software Foundation,
00023  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00024  *
00025  * @author Oryx Embedded SARL (www.oryx-embedded.com)
00026  * @version 1.7.6
00027  **/
00028 
00029 #ifndef _KSZ8721_H
00030 #define _KSZ8721_H
00031 
00032 //Dependencies
00033 #include "core/nic.h"
00034 
00035 //PHY address
00036 #ifndef KSZ8721_PHY_ADDR
00037    #define KSZ8721_PHY_ADDR 1
00038 #elif (KSZ8721_PHY_ADDR < 0 || KSZ8721_PHY_ADDR > 31)
00039    #error KSZ8721_PHY_ADDR parameter is not valid
00040 #endif
00041 
00042 //KSZ8721 registers
00043 #define KSZ8721_PHY_REG_BMCR     0x00
00044 #define KSZ8721_PHY_REG_BMSR     0x01
00045 #define KSZ8721_PHY_REG_PHYIDR1  0x02
00046 #define KSZ8721_PHY_REG_PHYIDR2  0x03
00047 #define KSZ8721_PHY_REG_ANAR     0x04
00048 #define KSZ8721_PHY_REG_ANLPAR   0x05
00049 #define KSZ8721_PHY_REG_ANER     0x06
00050 #define KSZ8721_PHY_REG_ANNPTR   0x07
00051 #define KSZ8721_PHY_REG_LPNPAR   0x08
00052 #define KSZ8721_PHY_REG_RECR     0x15
00053 #define KSZ8721_PHY_REG_ICSR     0x1B
00054 #define KSZ8721_PHY_REG_PHYCON   0x1F
00055 
00056 //BMCR register
00057 #define BMCR_RESET               (1 << 15)
00058 #define BMCR_LOOPBACK            (1 << 14)
00059 #define BMCR_SPEED_SEL           (1 << 13)
00060 #define BMCR_AN_EN               (1 << 12)
00061 #define BMCR_POWER_DOWN          (1 << 11)
00062 #define BMCR_ISOLATE             (1 << 10)
00063 #define BMCR_RESTART_AN          (1 << 9)
00064 #define BMCR_DUPLEX_MODE         (1 << 8)
00065 #define BMCR_COL_TEST            (1 << 7)
00066 #define BMCR_TX_DIS              (1 << 0)
00067 
00068 //BMSR register
00069 #define BMSR_100BT4              (1 << 15)
00070 #define BMSR_100BTX_FD           (1 << 14)
00071 #define BMSR_100BTX              (1 << 13)
00072 #define BMSR_10BT_FD             (1 << 12)
00073 #define BMSR_10BT                (1 << 11)
00074 #define BMSR_NO_PREAMBLE         (1 << 6)
00075 #define BMSR_AN_COMPLETE         (1 << 5)
00076 #define BMSR_REMOTE_FAULT        (1 << 4)
00077 #define BMSR_AN_ABLE             (1 << 3)
00078 #define BMSR_LINK_STATUS         (1 << 2)
00079 #define BMSR_JABBER_DETECT       (1 << 1)
00080 #define BMSR_EXTENDED_CAP        (1 << 0)
00081 
00082 //ANAR register
00083 #define ANAR_NEXT_PAGE           (1 << 15)
00084 #define ANAR_REMOTE_FAULT        (1 << 13)
00085 #define ANAR_PAUSE               (1 << 10)
00086 #define ANAR_100BT4              (1 << 9)
00087 #define ANAR_100BTX_FD           (1 << 8)
00088 #define ANAR_100BTX              (1 << 7)
00089 #define ANAR_10BT_FD             (1 << 6)
00090 #define ANAR_10BT                (1 << 5)
00091 #define ANAR_SELECTOR4           (1 << 4)
00092 #define ANAR_SELECTOR3           (1 << 3)
00093 #define ANAR_SELECTOR2           (1 << 2)
00094 #define ANAR_SELECTOR1           (1 << 1)
00095 #define ANAR_SELECTOR0           (1 << 0)
00096 
00097 //ANLPAR register
00098 #define ANLPAR_NEXT_PAGE         (1 << 15)
00099 #define ANLPAR_LP_ACK            (1 << 14)
00100 #define ANLPAR_REMOTE_FAULT      (1 << 13)
00101 #define ANLPAR_PAUSE1            (1 << 11)
00102 #define ANLPAR_PAUSE0            (1 << 10)
00103 #define ANLPAR_100BT4            (1 << 9)
00104 #define ANLPAR_100BTX_FD         (1 << 8)
00105 #define ANLPAR_100BTX            (1 << 7)
00106 #define ANLPAR_10BT_FD           (1 << 6)
00107 #define ANLPAR_10BT              (1 << 5)
00108 #define ANLPAR_SELECTOR4         (1 << 4)
00109 #define ANLPAR_SELECTOR3         (1 << 3)
00110 #define ANLPAR_SELECTOR2         (1 << 2)
00111 #define ANLPAR_SELECTOR1         (1 << 1)
00112 #define ANLPAR_SELECTOR0         (1 << 0)
00113 
00114 //ANER register
00115 #define ANER_PAR_DET_FAULT       (1 << 4)
00116 #define ANER_LP_NEXT_PAGE_ABLE   (1 << 3)
00117 #define ANER_NEXT_PAGE_ABLE      (1 << 2)
00118 #define ANER_PAGE_RECEIVED       (1 << 1)
00119 #define ANER_LP_AN_ABLE          (1 << 0)
00120 
00121 //ANNPTR register
00122 #define ANNPTR_NEXT_PAGE         (1 << 15)
00123 #define ANNPTR_MSG_PAGE          (1 << 13)
00124 #define ANNPTR_ACK2              (1 << 12)
00125 #define ANNPTR_TOGGLE            (1 << 11)
00126 #define ANNPTR_MESSAGE10         (1 << 10)
00127 #define ANNPTR_MESSAGE9          (1 << 9)
00128 #define ANNPTR_MESSAGE8          (1 << 8)
00129 #define ANNPTR_MESSAGE7          (1 << 7)
00130 #define ANNPTR_MESSAGE6          (1 << 6)
00131 #define ANNPTR_MESSAGE5          (1 << 5)
00132 #define ANNPTR_MESSAGE4          (1 << 4)
00133 #define ANNPTR_MESSAGE3          (1 << 3)
00134 #define ANNPTR_MESSAGE2          (1 << 2)
00135 #define ANNPTR_MESSAGE1          (1 << 1)
00136 #define ANNPTR_MESSAGE0          (1 << 0)
00137 
00138 //ICSR register
00139 #define ICSR_JABBER_IE           (1 << 15)
00140 #define ICSR_RECEIVE_ERROR_IE    (1 << 14)
00141 #define ICSR_PAGE_RECEIVED_IE    (1 << 13)
00142 #define ICSR_PAR_DET_FAULT_IE    (1 << 12)
00143 #define ICSR_LP_ACK_IE           (1 << 11)
00144 #define ICSR_LINK_DOWN_IE        (1 << 10)
00145 #define ICSR_REMOTE_FAULT_IE     (1 << 9)
00146 #define ICSR_LINK_UP_IE          (1 << 8)
00147 #define ICSR_JABBER_IF           (1 << 7)
00148 #define ICSR_RECEIVE_ERROR_IF    (1 << 6)
00149 #define ICSR_PAGE_RECEIVED_IF    (1 << 5)
00150 #define ICSR_PAR_DET_FAULT_IF    (1 << 4)
00151 #define ICSR_LP_ACK_IF           (1 << 3)
00152 #define ICSR_LINK_DOWN_IF        (1 << 2)
00153 #define ICSR_REMOTE_FAULT_IF     (1 << 1)
00154 #define ICSR_LINK_UP_IF          (1 << 0)
00155 
00156 //PHYCON register
00157 #define PHYCON_PAIR_SWAP_DIS     (1 << 13)
00158 #define PHYCON_ENERGY_DETECT     (1 << 12)
00159 #define PHYCON_FORCE_LINK        (1 << 11)
00160 #define PHYCON_POWER_SAVING      (1 << 10)
00161 #define PHYCON_INT_LEVEL         (1 << 9)
00162 #define PHYCON_JABBER_EN         (1 << 8)
00163 #define PHYCON_AN_COMPLETE       (1 << 7)
00164 #define PHYCON_PAUSE_EN          (1 << 6)
00165 #define PHYCON_ISOLATE           (1 << 5)
00166 #define PHYCON_OP_MODE2          (1 << 4)
00167 #define PHYCON_OP_MODE1          (1 << 3)
00168 #define PHYCON_OP_MODE0          (1 << 2)
00169 #define PHYCON_SQE_TEST_EN       (1 << 1)
00170 #define PHYCON_SCRAMBLER_DIS     (1 << 0)
00171 
00172 //Operation mode indication
00173 #define PHYCON_OP_MODE_MASK      (7 << 2)
00174 #define PHYCON_OP_MODE_AN        (0 << 2)
00175 #define PHYCON_OP_MODE_10BT      (1 << 2)
00176 #define PHYCON_OP_MODE_100BTX    (2 << 2)
00177 #define PHYCON_OP_MODE_10BT_FD   (5 << 2)
00178 #define PHYCON_OP_MODE_100BTX_FD (6 << 2)
00179 #define PHYCON_OP_MODE_ISOLATE   (7 << 2)
00180 
00181 //KSZ8721 Ethernet PHY driver
00182 extern const PhyDriver ksz8721PhyDriver;
00183 
00184 //KSZ8721 related functions
00185 error_t ksz8721Init(NetInterface *interface);
00186 
00187 void ksz8721Tick(NetInterface *interface);
00188 
00189 void ksz8721EnableIrq(NetInterface *interface);
00190 void ksz8721DisableIrq(NetInterface *interface);
00191 
00192 void ksz8721EventHandler(NetInterface *interface);
00193 
00194 void ksz8721WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data);
00195 uint16_t ksz8721ReadPhyReg(NetInterface *interface, uint8_t address);
00196 
00197 void ksz8721DumpPhyReg(NetInterface *interface);
00198 
00199 #endif
00200