Sam Shi / Mbed 2 deprecated unytelogo_animation

growing leaf (6 frames) and reverse

Dependencies:   Adafruit_GFX_i2c BLE_API USBDevice mbed

Fork of mbed-os-example-mbed5-blinky by mbed-os-examples

clkman.h@32:114e947a916b, 2017-07-18 (annotated)

Committer:
SamShiSS
Date:
Tue Jul 18 16:39:46 2017 +0000
Revision:
32:114e947a916b
unyte logo animation

Who changed what in which revision?

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SamShiSS 32:114e947a916b 1 /*******************************************************************************
SamShiSS 32:114e947a916b 2 * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved.
SamShiSS 32:114e947a916b 3 *
SamShiSS 32:114e947a916b 4 * Permission is hereby granted, free of charge, to any person obtaining a
SamShiSS 32:114e947a916b 5 * copy of this software and associated documentation files (the "Software"),
SamShiSS 32:114e947a916b 6 * to deal in the Software without restriction, including without limitation
SamShiSS 32:114e947a916b 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
SamShiSS 32:114e947a916b 8 * and/or sell copies of the Software, and to permit persons to whom the
SamShiSS 32:114e947a916b 9 * Software is furnished to do so, subject to the following conditions:
SamShiSS 32:114e947a916b 10 *
SamShiSS 32:114e947a916b 11 * The above copyright notice and this permission notice shall be included
SamShiSS 32:114e947a916b 12 * in all copies or substantial portions of the Software.
SamShiSS 32:114e947a916b 13 *
SamShiSS 32:114e947a916b 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
SamShiSS 32:114e947a916b 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
SamShiSS 32:114e947a916b 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
SamShiSS 32:114e947a916b 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
SamShiSS 32:114e947a916b 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
SamShiSS 32:114e947a916b 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
SamShiSS 32:114e947a916b 20 * OTHER DEALINGS IN THE SOFTWARE.
SamShiSS 32:114e947a916b 21 *
SamShiSS 32:114e947a916b 22 * Except as contained in this notice, the name of Maxim Integrated
SamShiSS 32:114e947a916b 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
SamShiSS 32:114e947a916b 24 * Products, Inc. Branding Policy.
SamShiSS 32:114e947a916b 25 *
SamShiSS 32:114e947a916b 26 * The mere transfer of this software does not imply any licenses
SamShiSS 32:114e947a916b 27 * of trade secrets, proprietary technology, copyrights, patents,
SamShiSS 32:114e947a916b 28 * trademarks, maskwork rights, or any other form of intellectual
SamShiSS 32:114e947a916b 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
SamShiSS 32:114e947a916b 30 * ownership rights.
SamShiSS 32:114e947a916b 31 *******************************************************************************
SamShiSS 32:114e947a916b 32 */
SamShiSS 32:114e947a916b 33
SamShiSS 32:114e947a916b 34 /* $Revision: 3581 $ $Date: 2014-11-18 11:46:39 -0600 (Tue, 18 Nov 2014) $ */
SamShiSS 32:114e947a916b 35
SamShiSS 32:114e947a916b 36 #ifndef _CLKMAN_H
SamShiSS 32:114e947a916b 37 #define _CLKMAN_H
SamShiSS 32:114e947a916b 38
SamShiSS 32:114e947a916b 39 #include "clkman_regs.h"
SamShiSS 32:114e947a916b 40 #include "adc_regs.h"
SamShiSS 32:114e947a916b 41
SamShiSS 32:114e947a916b 42 /**
SamShiSS 32:114e947a916b 43 * @file clkman.h
SamShiSS 32:114e947a916b 44 * @addtogroup clkman CLKMAN
SamShiSS 32:114e947a916b 45 * @{
SamShiSS 32:114e947a916b 46 * @brief This is the high level API for the clock management module
SamShiSS 32:114e947a916b 47 * of the MAX32600 family of ARM Cortex based embedded microcontrollers.
SamShiSS 32:114e947a916b 48 */
SamShiSS 32:114e947a916b 49
SamShiSS 32:114e947a916b 50 /**
SamShiSS 32:114e947a916b 51 * @brief Selects an internal module clock for clock scaling configuration.
SamShiSS 32:114e947a916b 52 */
SamShiSS 32:114e947a916b 53 typedef enum {
SamShiSS 32:114e947a916b 54 /** Main System clock */
SamShiSS 32:114e947a916b 55 MXC_E_CLKMAN_CLK_SYS = 0,
SamShiSS 32:114e947a916b 56 /** GPIO module clock */
SamShiSS 32:114e947a916b 57 MXC_E_CLKMAN_CLK_GPIO,
SamShiSS 32:114e947a916b 58 /** Pulse Train engine clock */
SamShiSS 32:114e947a916b 59 MXC_E_CLKMAN_CLK_PT,
SamShiSS 32:114e947a916b 60 /** SPI instance 0 module clock */
SamShiSS 32:114e947a916b 61 MXC_E_CLKMAN_CLK_SPI0,
SamShiSS 32:114e947a916b 62 /** SPI instance 1 module clock */
SamShiSS 32:114e947a916b 63 MXC_E_CLKMAN_CLK_SPI1,
SamShiSS 32:114e947a916b 64 /** SPI instance 2 module clock */
SamShiSS 32:114e947a916b 65 MXC_E_CLKMAN_CLK_SPI2,
SamShiSS 32:114e947a916b 66 /** I2C Master module clock (for all instances) */
SamShiSS 32:114e947a916b 67 MXC_E_CLKMAN_CLK_I2CM,
SamShiSS 32:114e947a916b 68 /** I2C Slave module clock */
SamShiSS 32:114e947a916b 69 MXC_E_CLKMAN_CLK_I2CS,
SamShiSS 32:114e947a916b 70 /** LCD Charge pump clock */
SamShiSS 32:114e947a916b 71 MXC_E_CLKMAN_CLK_LCD_CHPUMP,
SamShiSS 32:114e947a916b 72 /** Reserved */
SamShiSS 32:114e947a916b 73 MXC_E_CLKMAN_CLK_PUF,
SamShiSS 32:114e947a916b 74 /** PRNG module clock */
SamShiSS 32:114e947a916b 75 MXC_E_CLKMAN_CLK_PRNG,
SamShiSS 32:114e947a916b 76 /** Watchdog Timer 0 clock */
SamShiSS 32:114e947a916b 77 MXC_E_CLKMAN_CLK_WDT0,
SamShiSS 32:114e947a916b 78 /** Watchdog Timer 1 clock */
SamShiSS 32:114e947a916b 79 MXC_E_CLKMAN_CLK_WDT1,
SamShiSS 32:114e947a916b 80 /** RTC synchronizer clock (required for cross-clock-domain register updates) */
SamShiSS 32:114e947a916b 81 MXC_E_CLKMAN_CLK_RTC_INT_SYNC,
SamShiSS 32:114e947a916b 82 /** Clock for DAC 0 */
SamShiSS 32:114e947a916b 83 MXC_E_CLKMAN_CLK_DAC0,
SamShiSS 32:114e947a916b 84 /** Clock for DAC 1 */
SamShiSS 32:114e947a916b 85 MXC_E_CLKMAN_CLK_DAC1,
SamShiSS 32:114e947a916b 86 /** Clock for DAC 2 */
SamShiSS 32:114e947a916b 87 MXC_E_CLKMAN_CLK_DAC2,
SamShiSS 32:114e947a916b 88 /** Clock for DAC 3 */
SamShiSS 32:114e947a916b 89 MXC_E_CLKMAN_CLK_DAC3
SamShiSS 32:114e947a916b 90 } mxc_clkman_clk_t;
SamShiSS 32:114e947a916b 91
SamShiSS 32:114e947a916b 92 /**
SamShiSS 32:114e947a916b 93 * @brief Selects a TPU module clock for crypto ring-oscillator clock scaling configuration
SamShiSS 32:114e947a916b 94 */
SamShiSS 32:114e947a916b 95 typedef enum {
SamShiSS 32:114e947a916b 96 /** AES engine clock */
SamShiSS 32:114e947a916b 97 MXC_E_CLKMAN_CRYPT_CLK_AES = 0,
SamShiSS 32:114e947a916b 98 /** Modular Arithmetic Accelerator (MAA) clock */
SamShiSS 32:114e947a916b 99 MXC_E_CLKMAN_CRYPT_CLK_MAA,
SamShiSS 32:114e947a916b 100 /** Pseudo-random number Generator (PRNG) clock */
SamShiSS 32:114e947a916b 101 MXC_E_CLKMAN_CRYPT_CLK_PRNG
SamShiSS 32:114e947a916b 102 } mxc_clkman_crypt_clk_t;
SamShiSS 32:114e947a916b 103
SamShiSS 32:114e947a916b 104 /**
SamShiSS 32:114e947a916b 105 * @brief Configures but does not enable the high frequency external oscillator circuitry.
SamShiSS 32:114e947a916b 106 *
SamShiSS 32:114e947a916b 107 * @param hfx_bypass 1 for crystal receiver bypass, 0 for no bypass.
SamShiSS 32:114e947a916b 108 * @param hfx_gm_adjust High frequency crystal gain adjust.
SamShiSS 32:114e947a916b 109 * @param hfx_dc_control High frequency crystal dc control.
SamShiSS 32:114e947a916b 110 *
SamShiSS 32:114e947a916b 111 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 112 */
SamShiSS 32:114e947a916b 113 int32_t CLKMAN_HFXConfig(uint8_t hfx_bypass, uint8_t hfx_gm_adjust, uint8_t hfx_dc_control);
SamShiSS 32:114e947a916b 114
SamShiSS 32:114e947a916b 115 /**
SamShiSS 32:114e947a916b 116 * @brief Enables the high frequency crystal receiver. Make sure HFX is stable before switching system clock.
SamShiSS 32:114e947a916b 117 */
SamShiSS 32:114e947a916b 118 void CLKMAN_HFXEnable(void);
SamShiSS 32:114e947a916b 119
SamShiSS 32:114e947a916b 120 /**
SamShiSS 32:114e947a916b 121 * @brief Disables the high frequency crystal receiver.
SamShiSS 32:114e947a916b 122 *
SamShiSS 32:114e947a916b 123 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 124 */
SamShiSS 32:114e947a916b 125 int32_t CLKMAN_HFXDisable(void);
SamShiSS 32:114e947a916b 126
SamShiSS 32:114e947a916b 127 /**
SamShiSS 32:114e947a916b 128 * @brief Configures but does not enable the phase locked loop circuitry.
SamShiSS 32:114e947a916b 129 *
SamShiSS 32:114e947a916b 130 * @param pll_input_select Phase locked loop clock input.
SamShiSS 32:114e947a916b 131 * @param pll_divisor_select Input clock frequency for the phase locked loop.
SamShiSS 32:114e947a916b 132 * @param pll_stability_count Number of clocks before phase locked loop is stable.
SamShiSS 32:114e947a916b 133 * @param pll_bypass 1 for high frequency oscillator output for 48MHz clock, 0 for phase locked loop output.
SamShiSS 32:114e947a916b 134 * @param pll_8mhz_enable 1 for enable 8MHz phase locked loop output, 0 for disable.
SamShiSS 32:114e947a916b 135 *
SamShiSS 32:114e947a916b 136 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 137 */
SamShiSS 32:114e947a916b 138 int32_t CLKMAN_PLLConfig(mxc_clkman_pll_input_select_t pll_input_select,
SamShiSS 32:114e947a916b 139 mxc_clkman_pll_divisor_select_t pll_divisor_select,
SamShiSS 32:114e947a916b 140 mxc_clkman_stability_count_t pll_stability_count,
SamShiSS 32:114e947a916b 141 uint8_t pll_bypass, uint8_t pll_8mhz_enable);
SamShiSS 32:114e947a916b 142
SamShiSS 32:114e947a916b 143 /**
SamShiSS 32:114e947a916b 144 * @brief Enables the phase locked loop circuitry.
SamShiSS 32:114e947a916b 145 */
SamShiSS 32:114e947a916b 146 void CLKMAN_PLLEnable(void);
SamShiSS 32:114e947a916b 147
SamShiSS 32:114e947a916b 148 /**
SamShiSS 32:114e947a916b 149 * @brief Disables the phase locked loop circuitry.
SamShiSS 32:114e947a916b 150 *
SamShiSS 32:114e947a916b 151 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 152 */
SamShiSS 32:114e947a916b 153 int32_t CLKMAN_PLLDisable(void);
SamShiSS 32:114e947a916b 154
SamShiSS 32:114e947a916b 155 /**
SamShiSS 32:114e947a916b 156 * @brief Starts the Trim calibration of the relaxation oscillator off the 32kHz crystal for use with USB.
SamShiSS 32:114e947a916b 157 */
SamShiSS 32:114e947a916b 158 void CLKMAN_TrimRO_Start(void);
SamShiSS 32:114e947a916b 159
SamShiSS 32:114e947a916b 160 /**
SamShiSS 32:114e947a916b 161 * @brief Stops the Trim calibration of the relaxation oscillator off the 32kHz crystal for use with USB.
SamShiSS 32:114e947a916b 162 */
SamShiSS 32:114e947a916b 163 void CLKMAN_TrimRO_Stop(void);
SamShiSS 32:114e947a916b 164
SamShiSS 32:114e947a916b 165 /**
SamShiSS 32:114e947a916b 166 * @brief Sets the system clock source if the source is valid. Make sure HFX is stable before switching system clock.
SamShiSS 32:114e947a916b 167 *
SamShiSS 32:114e947a916b 168 * @param system_source_select System clock source.
SamShiSS 32:114e947a916b 169 *
SamShiSS 32:114e947a916b 170 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 171 */
SamShiSS 32:114e947a916b 172 int32_t CLKMAN_SetSystemClock(mxc_clkman_system_source_select_t system_source_select);
SamShiSS 32:114e947a916b 173
SamShiSS 32:114e947a916b 174 /**
SamShiSS 32:114e947a916b 175 * @brief Polls on the clock stable flags until all are stable.
SamShiSS 32:114e947a916b 176 */
SamShiSS 32:114e947a916b 177 void CLKMAN_WaitForSystemClockStable(void);
SamShiSS 32:114e947a916b 178
SamShiSS 32:114e947a916b 179 /**
SamShiSS 32:114e947a916b 180 * @brief Enables the USB clock.
SamShiSS 32:114e947a916b 181 */
SamShiSS 32:114e947a916b 182 void CLKMAN_USBClockEnable(void);
SamShiSS 32:114e947a916b 183
SamShiSS 32:114e947a916b 184 /**
SamShiSS 32:114e947a916b 185 * @brief Disables the USB clock.
SamShiSS 32:114e947a916b 186 */
SamShiSS 32:114e947a916b 187 void CLKMAN_USBClockDisable(void);
SamShiSS 32:114e947a916b 188
SamShiSS 32:114e947a916b 189 /**
SamShiSS 32:114e947a916b 190 * @brief Configures but does not enable the crypto clock.
SamShiSS 32:114e947a916b 191 *
SamShiSS 32:114e947a916b 192 * @param crypto_stability_count Number of clocks before crypto clock is stable.
SamShiSS 32:114e947a916b 193 *
SamShiSS 32:114e947a916b 194 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 195 */
SamShiSS 32:114e947a916b 196 int32_t CLKMAN_CryptoClockConfig(mxc_clkman_stability_count_t crypto_stability_count);
SamShiSS 32:114e947a916b 197
SamShiSS 32:114e947a916b 198 /**
SamShiSS 32:114e947a916b 199 * @brief Enables the crypto clock.
SamShiSS 32:114e947a916b 200 */
SamShiSS 32:114e947a916b 201 void CLKMAN_CryptoClockEnable(void);
SamShiSS 32:114e947a916b 202
SamShiSS 32:114e947a916b 203 /**
SamShiSS 32:114e947a916b 204 * @brief Disables the crypto clock.
SamShiSS 32:114e947a916b 205 */
SamShiSS 32:114e947a916b 206 void CLKMAN_CryptoClockDisable(void);
SamShiSS 32:114e947a916b 207
SamShiSS 32:114e947a916b 208 /**
SamShiSS 32:114e947a916b 209 * @brief Sets the analog to digital converter clock source if the source is valid.
SamShiSS 32:114e947a916b 210 *
SamShiSS 32:114e947a916b 211 * @param adc_source_select Analog to digital converter clock source.
SamShiSS 32:114e947a916b 212 * @param adc_clk_mode Divide the clock source into the ADC if source is too high.
SamShiSS 32:114e947a916b 213 * ADC must run at 8MHz.
SamShiSS 32:114e947a916b 214 *
SamShiSS 32:114e947a916b 215 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 216 */
SamShiSS 32:114e947a916b 217 int32_t CLKMAN_SetADCClock(mxc_clkman_adc_source_select_t adc_source_select, mxc_adc_clk_mode adc_clk_mode);
SamShiSS 32:114e947a916b 218
SamShiSS 32:114e947a916b 219 /**
SamShiSS 32:114e947a916b 220 * @brief Disables the analog to digital converter clock source.
SamShiSS 32:114e947a916b 221 */
SamShiSS 32:114e947a916b 222 void CLKMAN_ADCClockDisable(void);
SamShiSS 32:114e947a916b 223
SamShiSS 32:114e947a916b 224 /**
SamShiSS 32:114e947a916b 225 * @brief Sets the watchdog clock source if the source is valid for the watchdog specified.
SamShiSS 32:114e947a916b 226 *
SamShiSS 32:114e947a916b 227 * @param index Index of watchdog to set clock.
SamShiSS 32:114e947a916b 228 * @param watchdog_source_select Watchdog clock source.
SamShiSS 32:114e947a916b 229 *
SamShiSS 32:114e947a916b 230 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 231 */
SamShiSS 32:114e947a916b 232 int32_t CLKMAN_SetWatchdogClock(uint8_t index, mxc_clkman_wdt_source_select_t watchdog_source_select);
SamShiSS 32:114e947a916b 233
SamShiSS 32:114e947a916b 234 /**
SamShiSS 32:114e947a916b 235 * @brief Disable the watchdog clock source for the watchdog specified.
SamShiSS 32:114e947a916b 236 *
SamShiSS 32:114e947a916b 237 * @param index Index of watchdog to disable.
SamShiSS 32:114e947a916b 238 *
SamShiSS 32:114e947a916b 239 * @return 0 => Success. Non zero => error condition.
SamShiSS 32:114e947a916b 240 */
SamShiSS 32:114e947a916b 241 int32_t CLKMAN_WatchdogClockDisable(uint8_t index);
SamShiSS 32:114e947a916b 242
SamShiSS 32:114e947a916b 243 /**
SamShiSS 32:114e947a916b 244 * @brief Set the system clock scale.
SamShiSS 32:114e947a916b 245 * @param device_clk device enum for clock scale setup
SamShiSS 32:114e947a916b 246 * @param clk_scale System clock scale.
SamShiSS 32:114e947a916b 247 */
SamShiSS 32:114e947a916b 248 void CLKMAN_SetClkScale(mxc_clkman_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale);
SamShiSS 32:114e947a916b 249
SamShiSS 32:114e947a916b 250 /**
SamShiSS 32:114e947a916b 251 * @brief Set the TPU clock scale.
SamShiSS 32:114e947a916b 252 * @param device_clk device enum for clock scale setup
SamShiSS 32:114e947a916b 253 * @param clk_scale System clock scale.
SamShiSS 32:114e947a916b 254 */
SamShiSS 32:114e947a916b 255 void CLKMAN_SetCryptClkScale(mxc_clkman_crypt_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale);
SamShiSS 32:114e947a916b 256
SamShiSS 32:114e947a916b 257 /**
SamShiSS 32:114e947a916b 258 * @brief Set RTC clock for systick counter, allowing systick to operate in full clockgating powersaving mode
SamShiSS 32:114e947a916b 259 * @param enable 1 enable 0 disable
SamShiSS 32:114e947a916b 260 */
SamShiSS 32:114e947a916b 261 void CLKMAN_SetRTOSMode(uint8_t enable);
SamShiSS 32:114e947a916b 262
SamShiSS 32:114e947a916b 263 /**
SamShiSS 32:114e947a916b 264 * @}
SamShiSS 32:114e947a916b 265 */
SamShiSS 32:114e947a916b 266
SamShiSS 32:114e947a916b 267 #endif /* _CLKMAN_H */
SamShiSS 32:114e947a916b 268