icc_regs.h

00001 /*******************************************************************************
00002 * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved.
00003 *
00004 * Permission is hereby granted, free of charge, to any person obtaining a
00005 * copy of this software and associated documentation files (the "Software"),
00006 * to deal in the Software without restriction, including without limitation
00007 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008 * and/or sell copies of the Software, and to permit persons to whom the
00009 * Software is furnished to do so, subject to the following conditions:
00010 *
00011 * The above copyright notice and this permission notice shall be included
00012 * in all copies or substantial portions of the Software.
00013 *
00014 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020 * OTHER DEALINGS IN THE SOFTWARE.
00021 *
00022 * Except as contained in this notice, the name of Maxim Integrated 
00023 * Products, Inc. shall not be used except as stated in the Maxim Integrated 
00024 * Products, Inc. Branding Policy.
00025 *
00026 * The mere transfer of this software does not imply any licenses
00027 * of trade secrets, proprietary technology, copyrights, patents,
00028 * trademarks, maskwork rights, or any other form of intellectual
00029 * property whatsoever. Maxim Integrated Products, Inc. retains all 
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00031 *******************************************************************************
00032 */
00033 
00034 /* $Revision: 3545 $ $Date: 2014-11-11 18:20:37 -0600 (Tue, 11 Nov 2014) $ */
00035 
00036 #ifndef _MXC_ICC_REGS_H_
00037 #define _MXC_ICC_REGS_H_
00038 
00039 
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043 
00044 #include <stdint.h>
00045 
00046 /*
00047     If types are not defined elsewhere (CMSIS) define them here
00048 */
00049 #ifndef __IO
00050 #define __IO volatile
00051 #endif
00052 #ifndef __I
00053 #define __I  volatile const
00054 #endif
00055 #ifndef __O
00056 #define __O  volatile
00057 #endif
00058 #ifndef __R
00059 #define __R  volatile const
00060 #endif
00061 
00062 /*
00063     Bitfield structs for registers in this module
00064 */
00065 typedef struct
00066 {
00067     uint32_t rtl_version       : 6;
00068     uint32_t part_num          : 4;
00069     uint32_t cache_id          : 6;
00070     uint32_t                   : 16;
00071 } mxc_icc_id_t;
00072 
00073 typedef struct
00074 {
00075     uint32_t cache_size        : 16;
00076     uint32_t main_memory_size  : 16;
00077 } mxc_icc_mem_cfg_t;
00078 
00079 typedef struct
00080 {
00081     uint32_t enable            : 1;
00082     uint32_t                   : 15;
00083     uint32_t ready             : 1;
00084     uint32_t                   : 15;
00085 } mxc_icc_ctrl_stat_t;
00086 
00087 
00088 /*
00089    Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
00090    register access along with union access to bit/bitfield struct (where defined).
00091 */
00092 /*                                                  Offset   Register Description
00093                                                     ======   =================================================== */
00094 typedef struct {
00095     union {
00096         __IO uint32_t id;                       /*  0x0000   Device ID Register                                  */
00097         __IO mxc_icc_id_t id_f;
00098     };
00099     union {
00100         __IO uint32_t mem_cfg;                  /*  0x0004   Memory Configuration                                */
00101         __IO mxc_icc_mem_cfg_t mem_cfg_f;
00102     };
00103     __R uint32_t rsv0008[62];                   /*  0x0008                                                       */
00104     union {
00105         __IO uint32_t ctrl_stat;                /*  0x0100   Control and Status                                  */
00106         __IO mxc_icc_ctrl_stat_t ctrl_stat_f;
00107     };
00108     __R uint32_t rsv0104[383];                  /*  0x0104                                                       */
00109     __IO uint32_t invdt_all;                    /*  0x0700   Invalidate (Clear) Cache Control                    */
00110 } mxc_icc_regs_t;
00111 
00112 
00113 /*
00114    Register offsets for module ICC.
00115 */
00116 #define MXC_R_ICC_OFFS_ID                         ((uint32_t)0x00000000UL)
00117 #define MXC_R_ICC_OFFS_MEM_CFG                    ((uint32_t)0x00000004UL)
00118 #define MXC_R_ICC_OFFS_CTRL_STAT                  ((uint32_t)0x00000100UL)
00119 #define MXC_R_ICC_OFFS_INVDT_ALL                  ((uint32_t)0x00000700UL)
00120 
00121 #ifdef __cplusplus
00122 }
00123 #endif
00124 #endif
00125