clkman.h

00001 /*******************************************************************************
00002 * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved.
00003 *
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00005 * copy of this software and associated documentation files (the "Software"),
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00009 * Software is furnished to do so, subject to the following conditions:
00010 *
00011 * The above copyright notice and this permission notice shall be included
00012 * in all copies or substantial portions of the Software.
00013 *
00014 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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00019 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020 * OTHER DEALINGS IN THE SOFTWARE.
00021 *
00022 * Except as contained in this notice, the name of Maxim Integrated
00023 * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024 * Products, Inc. Branding Policy.
00025 *
00026 * The mere transfer of this software does not imply any licenses
00027 * of trade secrets, proprietary technology, copyrights, patents,
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00032 */
00033 
00034 /* $Revision: 3581 $ $Date: 2014-11-18 11:46:39 -0600 (Tue, 18 Nov 2014) $ */
00035 
00036 #ifndef _CLKMAN_H
00037 #define _CLKMAN_H
00038 
00039 #include "clkman_regs.h"
00040 #include "adc_regs.h"
00041 
00042 /**
00043  * @file  clkman.h
00044  * @addtogroup clkman CLKMAN
00045  * @{
00046  * @brief This is the high level API for the clock management module
00047  *        of the MAX32600 family of ARM Cortex based embedded microcontrollers.
00048  */
00049 
00050 /**
00051  * @brief Selects an internal module clock for clock scaling configuration.
00052  */
00053 typedef enum {
00054     /** Main System clock */
00055     MXC_E_CLKMAN_CLK_SYS = 0,
00056     /** GPIO module clock */
00057     MXC_E_CLKMAN_CLK_GPIO,
00058     /** Pulse Train engine clock */
00059     MXC_E_CLKMAN_CLK_PT,
00060     /** SPI instance 0 module clock */
00061     MXC_E_CLKMAN_CLK_SPI0,
00062     /** SPI instance 1 module clock */
00063     MXC_E_CLKMAN_CLK_SPI1,
00064     /** SPI instance 2 module clock */
00065     MXC_E_CLKMAN_CLK_SPI2,
00066     /** I2C Master module clock (for all instances) */
00067     MXC_E_CLKMAN_CLK_I2CM,
00068     /** I2C Slave module clock */
00069     MXC_E_CLKMAN_CLK_I2CS,
00070     /** LCD Charge pump clock */
00071     MXC_E_CLKMAN_CLK_LCD_CHPUMP,
00072     /** Reserved */
00073     MXC_E_CLKMAN_CLK_PUF,
00074     /** PRNG module clock */
00075     MXC_E_CLKMAN_CLK_PRNG,
00076     /** Watchdog Timer 0 clock */
00077     MXC_E_CLKMAN_CLK_WDT0,
00078     /** Watchdog Timer 1 clock */
00079     MXC_E_CLKMAN_CLK_WDT1,
00080     /** RTC synchronizer clock (required for cross-clock-domain register updates) */
00081     MXC_E_CLKMAN_CLK_RTC_INT_SYNC,
00082     /** Clock for DAC 0 */
00083     MXC_E_CLKMAN_CLK_DAC0,
00084     /** Clock for DAC 1 */
00085     MXC_E_CLKMAN_CLK_DAC1,
00086     /** Clock for DAC 2 */
00087     MXC_E_CLKMAN_CLK_DAC2,
00088     /** Clock for DAC 3 */
00089     MXC_E_CLKMAN_CLK_DAC3
00090 } mxc_clkman_clk_t;
00091 
00092 /**
00093  * @brief Selects a TPU module clock for crypto ring-oscillator clock scaling configuration
00094  */
00095 typedef enum {
00096     /** AES engine clock */
00097     MXC_E_CLKMAN_CRYPT_CLK_AES = 0,
00098     /** Modular Arithmetic Accelerator (MAA) clock */
00099     MXC_E_CLKMAN_CRYPT_CLK_MAA,
00100     /** Pseudo-random number Generator (PRNG) clock */
00101     MXC_E_CLKMAN_CRYPT_CLK_PRNG
00102 } mxc_clkman_crypt_clk_t;
00103 
00104 /**
00105  * @brief Configures but does not enable the high frequency external oscillator circuitry.
00106  *
00107  * @param hfx_bypass 1 for crystal receiver bypass, 0 for no bypass.
00108  * @param hfx_gm_adjust High frequency crystal gain adjust.
00109  * @param hfx_dc_control High frequency crystal dc control.
00110  *
00111  * @return 0 => Success. Non zero => error condition.
00112  */
00113 int32_t CLKMAN_HFXConfig(uint8_t hfx_bypass, uint8_t hfx_gm_adjust, uint8_t hfx_dc_control);
00114 
00115 /**
00116  * @brief Enables the high frequency crystal receiver. Make sure HFX is stable before switching system clock.
00117  */
00118 void CLKMAN_HFXEnable(void);
00119 
00120 /**
00121  * @brief Disables the high frequency crystal receiver.
00122  *
00123  * @return 0 => Success. Non zero => error condition.
00124  */
00125 int32_t CLKMAN_HFXDisable(void);
00126 
00127 /**
00128  * @brief Configures but does not enable the phase locked loop circuitry.
00129  *
00130  * @param pll_input_select    Phase locked loop clock input.
00131  * @param pll_divisor_select  Input clock frequency for the phase locked loop.
00132  * @param pll_stability_count Number of clocks before phase locked loop is stable.
00133  * @param pll_bypass   1 for high frequency oscillator output for 48MHz clock, 0 for phase locked loop output.
00134  * @param pll_8mhz_enable  1 for enable 8MHz phase locked loop output, 0 for disable.
00135  *
00136  * @return 0 => Success. Non zero => error condition.
00137  */
00138 int32_t CLKMAN_PLLConfig(mxc_clkman_pll_input_select_t pll_input_select,
00139         mxc_clkman_pll_divisor_select_t pll_divisor_select,
00140         mxc_clkman_stability_count_t pll_stability_count,
00141         uint8_t pll_bypass, uint8_t pll_8mhz_enable);
00142 
00143 /**
00144  * @brief Enables the phase locked loop circuitry.
00145  */
00146 void CLKMAN_PLLEnable(void);
00147 
00148 /**
00149  * @brief Disables the phase locked loop circuitry.
00150  *
00151  * @return 0 => Success. Non zero => error condition.
00152  */
00153 int32_t CLKMAN_PLLDisable(void);
00154 
00155 /**
00156  * @brief Starts the Trim calibration of the  relaxation oscillator off the 32kHz crystal for use with USB.
00157  */
00158 void CLKMAN_TrimRO_Start(void);
00159 
00160 /**
00161  * @brief Stops the Trim calibration of the  relaxation oscillator off the 32kHz crystal for use with USB.
00162  */
00163 void CLKMAN_TrimRO_Stop(void);
00164 
00165 /**
00166  * @brief Sets the system clock source if the source is valid. Make sure HFX is stable before switching system clock.
00167  *
00168  * @param system_source_select System clock source.
00169  *
00170  * @return 0 => Success. Non zero => error condition.
00171  */
00172 int32_t CLKMAN_SetSystemClock(mxc_clkman_system_source_select_t system_source_select);
00173 
00174 /**
00175  * @brief Polls on the clock stable flags until all are stable.
00176  */
00177 void CLKMAN_WaitForSystemClockStable(void);
00178 
00179 /**
00180  * @brief Enables the USB clock.
00181  */
00182 void CLKMAN_USBClockEnable(void);
00183 
00184 /**
00185  * @brief Disables the USB clock.
00186  */
00187 void CLKMAN_USBClockDisable(void);
00188 
00189 /**
00190  * @brief Configures but does not enable the crypto clock.
00191  *
00192  * @param crypto_stability_count Number of clocks before crypto clock is stable.
00193  *
00194  * @return 0 => Success. Non zero => error condition.
00195  */
00196 int32_t CLKMAN_CryptoClockConfig(mxc_clkman_stability_count_t crypto_stability_count);
00197 
00198 /**
00199  * @brief Enables the crypto clock.
00200  */
00201 void CLKMAN_CryptoClockEnable(void);
00202 
00203 /**
00204  * @brief Disables the crypto clock.
00205  */
00206 void CLKMAN_CryptoClockDisable(void);
00207 
00208 /**
00209  * @brief Sets the analog to digital converter clock source if the source is valid.
00210  *
00211  * @param adc_source_select Analog to digital converter clock source.
00212  * @param adc_clk_mode      Divide the clock source into the ADC if source is too high.
00213  *                          ADC must run at 8MHz.
00214  *
00215  * @return 0 => Success. Non zero => error condition.
00216  */
00217 int32_t CLKMAN_SetADCClock(mxc_clkman_adc_source_select_t adc_source_select, mxc_adc_clk_mode adc_clk_mode);
00218 
00219 /**
00220  * @brief Disables the analog to digital converter clock source.
00221  */
00222 void CLKMAN_ADCClockDisable(void);
00223 
00224 /**
00225  * @brief Sets the watchdog clock source if the source is valid for the watchdog specified.
00226  *
00227  * @param index Index of watchdog to set clock.
00228  * @param watchdog_source_select Watchdog clock source.
00229  *
00230  * @return 0 => Success. Non zero => error condition.
00231  */
00232 int32_t CLKMAN_SetWatchdogClock(uint8_t index, mxc_clkman_wdt_source_select_t watchdog_source_select);
00233 
00234 /**
00235  * @brief Disable the watchdog clock source for the watchdog specified.
00236  *
00237  * @param index Index of watchdog to disable.
00238  *
00239  * @return 0 => Success. Non zero => error condition.
00240  */
00241 int32_t CLKMAN_WatchdogClockDisable(uint8_t index);
00242 
00243 /**
00244  * @brief Set the system clock scale.
00245  * @param device_clk device enum for clock scale setup
00246  * @param clk_scale System clock scale.
00247  */
00248 void CLKMAN_SetClkScale(mxc_clkman_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale);
00249 
00250 /**
00251  * @brief Set the TPU clock scale.
00252  * @param device_clk device enum for clock scale setup
00253  * @param clk_scale System clock scale.
00254  */
00255 void CLKMAN_SetCryptClkScale(mxc_clkman_crypt_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale);
00256 
00257 /**
00258  * @brief Set RTC clock for systick counter, allowing systick to operate in full clockgating powersaving mode
00259  * @param enable 1 enable 0 disable
00260  */
00261 void CLKMAN_SetRTOSMode(uint8_t enable);
00262 
00263 /**
00264  * @}
00265  */
00266 
00267 #endif /* _CLKMAN_H */
00268