uart_11xx.h

00001 /*
00002  * @brief LPC11xx UART chip driver
00003  *
00004  * @note
00005  * Copyright(C) NXP Semiconductors, 2012
00006  * All rights reserved.
00007  *
00008  * @par
00009  * Software that is described herein is for illustrative purposes only
00010  * which provides customers with programming information regarding the
00011  * LPC products.  This software is supplied "AS IS" without any warranties of
00012  * any kind, and NXP Semiconductors and its licensor disclaim any and
00013  * all warranties, express or implied, including all implied warranties of
00014  * merchantability, fitness for a particular purpose and non-infringement of
00015  * intellectual property rights.  NXP Semiconductors assumes no responsibility
00016  * or liability for the use of the software, conveys no license or rights under any
00017  * patent, copyright, mask work right, or any other intellectual property rights in
00018  * or to any products. NXP Semiconductors reserves the right to make changes
00019  * in the software without notification. NXP Semiconductors also makes no
00020  * representation or warranty that such application will be suitable for the
00021  * specified use without further testing or modification.
00022  *
00023  * @par
00024  * Permission to use, copy, modify, and distribute this software and its
00025  * documentation is hereby granted, under NXP Semiconductors' and its
00026  * licensor's relevant copyrights in the software, without fee, provided that it
00027  * is used in conjunction with NXP Semiconductors microcontrollers.  This
00028  * copyright, permission, and disclaimer notice must appear in all copies of
00029  * this code.
00030  */
00031 
00032 #ifndef __UART_11XX_H_
00033 #define __UART_11XX_H_
00034 
00035 #include "ring_buffer.h"
00036 
00037 #ifdef __cplusplus
00038 extern "C" {
00039 #endif
00040 
00041 /** @defgroup UART_11XX CHIP: LPC11xx UART driver
00042  * @ingroup CHIP_11XX_Drivers
00043  * @{
00044  */
00045 
00046 /**
00047  * @brief USART register block structure
00048  */
00049 typedef struct {                    /*!< USARTn Structure       */
00050 
00051     union {
00052         __IO uint32_t  DLL ;         /*!< Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider (DLAB = 1). */
00053         __O  uint32_t  THR ;         /*!< Transmit Holding Register. The next character to be transmitted is written here (DLAB = 0). */
00054         __I  uint32_t  RBR ;         /*!< Receiver Buffer Register. Contains the next received character to be read (DLAB = 0). */
00055     };
00056 
00057     union {
00058         __IO uint32_t IER ;          /*!< Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential UART interrupts (DLAB = 0). */
00059         __IO uint32_t DLM ;          /*!< Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider (DLAB = 1). */
00060     };
00061 
00062     union {
00063         __O  uint32_t FCR ;          /*!< FIFO Control Register. Controls UART FIFO usage and modes. */
00064         __I  uint32_t IIR ;          /*!< Interrupt ID Register. Identifies which interrupt(s) are pending. */
00065     };
00066 
00067     __IO uint32_t LCR ;              /*!< Line Control Register. Contains controls for frame formatting and break generation. */
00068     __IO uint32_t MCR ;              /*!< Modem Control Register. Only present on USART ports with full modem support. */
00069     __I  uint32_t LSR ;              /*!< Line Status Register. Contains flags for transmit and receive status, including line errors. */
00070     __I  uint32_t MSR ;              /*!< Modem Status Register. Only present on USART ports with full modem support. */
00071     __IO uint32_t SCR ;              /*!< Scratch Pad Register. Eight-bit temporary storage for software. */
00072     __IO uint32_t ACR ;              /*!< Auto-baud Control Register. Contains controls for the auto-baud feature. */
00073     __IO uint32_t ICR ;              /*!< IrDA control register (not all UARTS) */
00074     __IO uint32_t FDR ;              /*!< Fractional Divider Register. Generates a clock input for the baud rate divider. */
00075     __IO uint32_t OSR ;              /*!< Oversampling Register. Controls the degree of oversampling during each bit time. Only on some UARTS. */
00076     __IO uint32_t TER1 ;             /*!< Transmit Enable Register. Turns off USART transmitter for use with software flow control. */
00077     uint32_t  RESERVED0[3];
00078     __IO uint32_t HDEN ;             /*!< Half-duplex enable Register- only on some UARTs */
00079     __I  uint32_t RESERVED1[1];
00080     __IO uint32_t SCICTRL ;          /*!< Smart card interface control register- only on some UARTs */
00081 
00082     __IO uint32_t RS485CTRL ;        /*!< RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes. */
00083     __IO uint32_t RS485ADRMATCH ;    /*!< RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode. */
00084     __IO uint32_t RS485DLY ;         /*!< RS-485/EIA-485 direction control delay. */
00085 
00086     union {
00087         __IO uint32_t SYNCCTRL ;     /*!< Synchronous mode control register. Only on USARTs. */
00088         __I  uint32_t FIFOLVL ;      /*!< FIFO Level register. Provides the current fill levels of the transmit and receive FIFOs. */
00089     };
00090 
00091     __IO uint32_t TER2 ;             /*!< Transmit Enable Register. Only on LPC177X_8X UART4 and LPC18XX/43XX USART0/2/3. */
00092 } LPC_USART_T;
00093 
00094 
00095 /**
00096  * @brief Macro defines for UART Receive Buffer register
00097  */
00098 #define UART_RBR_MASKBIT    (0xFF)              /*!< UART Received Buffer mask bit (8 bits) */
00099 
00100 /**
00101  * @brief Macro defines for UART Divisor Latch LSB register
00102  */
00103 #define UART_LOAD_DLL(div)  ((div) & 0xFF)      /*!< Macro for loading LSB of divisor */
00104 #define UART_DLL_MASKBIT    (0xFF)              /*!< Divisor latch LSB bit mask */
00105 
00106 /**
00107  * @brief Macro defines for UART Divisor Latch MSB register
00108  */
00109 #define UART_LOAD_DLM(div)  (((div) >> 8) & 0xFF)   /*!< Macro for loading MSB of divisors */
00110 #define UART_DLM_MASKBIT    (0xFF)                  /*!< Divisor latch MSB bit mask */
00111 
00112 /**
00113  * @brief Macro defines for UART Interrupt Enable Register
00114  */
00115 #define UART_IER_RBRINT      (1 << 0)   /*!< RBR Interrupt enable */
00116 #define UART_IER_THREINT     (1 << 1)   /*!< THR Interrupt enable */
00117 #define UART_IER_RLSINT      (1 << 2)   /*!< RX line status interrupt enable */
00118 #define UART_IER_MSINT       (1 << 3)   /*!< Modem status interrupt enable - valid for 11xx, 17xx/40xx UART1, 18xx/43xx UART1  only */
00119 #define UART_IER_CTSINT      (1 << 7)   /*!< CTS signal transition interrupt enable - valid for 17xx/40xx UART1, 18xx/43xx UART1 only */
00120 #define UART_IER_ABEOINT     (1 << 8)   /*!< Enables the end of auto-baud interrupt */
00121 #define UART_IER_ABTOINT     (1 << 9)   /*!< Enables the auto-baud time-out interrupt */
00122 #define UART_IER_BITMASK     (0x307)    /*!< UART interrupt enable register bit mask  - valid for 13xx, 17xx/40xx UART0/2/3, 18xx/43xx UART0/2/3 only*/
00123 #define UART1_IER_BITMASK    (0x30F)    /*!< UART1 interrupt enable register bit mask - valid for 11xx only */
00124 #define UART2_IER_BITMASK    (0x38F)    /*!< UART2 interrupt enable register bit mask - valid for 17xx/40xx UART1, 18xx/43xx UART1 only */
00125 
00126 /**
00127  * @brief Macro defines for UART Interrupt Identification Register
00128  */
00129 #define UART_IIR_INTSTAT_PEND   (1 << 0)    /*!< Interrupt pending status - Active low */
00130 #define UART_IIR_FIFO_EN        (3 << 6)    /*!< These bits are equivalent to FCR[0] */
00131 #define UART_IIR_ABEO_INT       (1 << 8)    /*!< End of auto-baud interrupt */
00132 #define UART_IIR_ABTO_INT       (1 << 9)    /*!< Auto-baud time-out interrupt */
00133 #define UART_IIR_BITMASK        (0x3CF)     /*!< UART interrupt identification register bit mask */
00134 
00135 /* Interrupt ID bit definitions */
00136 #define UART_IIR_INTID_MASK     (7 << 1)    /*!< Interrupt identification: Interrupt ID mask */
00137 #define UART_IIR_INTID_RLS      (3 << 1)    /*!< Interrupt identification: Receive line interrupt */
00138 #define UART_IIR_INTID_RDA      (2 << 1)    /*!< Interrupt identification: Receive data available interrupt */
00139 #define UART_IIR_INTID_CTI      (6 << 1)    /*!< Interrupt identification: Character time-out indicator interrupt */
00140 #define UART_IIR_INTID_THRE     (1 << 1)    /*!< Interrupt identification: THRE interrupt */
00141 #define UART_IIR_INTID_MODEM    (0 << 1)    /*!< Interrupt identification: Modem interrupt */
00142 
00143 /**
00144  * @brief Macro defines for UART FIFO Control Register
00145  */
00146 #define UART_FCR_FIFO_EN        (1 << 0)    /*!< UART FIFO enable */
00147 #define UART_FCR_RX_RS          (1 << 1)    /*!< UART RX FIFO reset */
00148 #define UART_FCR_TX_RS          (1 << 2)    /*!< UART TX FIFO reset */
00149 #define UART_FCR_DMAMODE_SEL    (1 << 3)    /*!< UART DMA mode selection - valid for 17xx/40xx, 18xx/43xx only */
00150 #define UART_FCR_BITMASK        (0xCF)      /*!< UART FIFO control bit mask */
00151 
00152 #define UART_TX_FIFO_SIZE       (16)
00153 
00154 /* FIFO trigger level bit definitions */
00155 #define UART_FCR_TRG_LEV0       (0)         /*!< UART FIFO trigger level 0: 1 character */
00156 #define UART_FCR_TRG_LEV1       (1 << 6)    /*!< UART FIFO trigger level 1: 4 character */
00157 #define UART_FCR_TRG_LEV2       (2 << 6)    /*!< UART FIFO trigger level 2: 8 character */
00158 #define UART_FCR_TRG_LEV3       (3 << 6)    /*!< UART FIFO trigger level 3: 14 character */
00159 
00160 /**
00161  * @brief Macro defines for UART Line Control Register
00162  */
00163 /* UART word length select bit definitions */
00164 #define UART_LCR_WLEN_MASK      (3 << 0)        /*!< UART word length select bit mask */
00165 #define UART_LCR_WLEN5          (0 << 0)        /*!< UART word length select: 5 bit data mode */
00166 #define UART_LCR_WLEN6          (1 << 0)        /*!< UART word length select: 6 bit data mode */
00167 #define UART_LCR_WLEN7          (2 << 0)        /*!< UART word length select: 7 bit data mode */
00168 #define UART_LCR_WLEN8          (3 << 0)        /*!< UART word length select: 8 bit data mode */
00169 
00170 /* UART Stop bit select bit definitions */
00171 #define UART_LCR_SBS_MASK       (1 << 2)        /*!< UART stop bit select: bit mask */
00172 #define UART_LCR_SBS_1BIT       (0 << 2)        /*!< UART stop bit select: 1 stop bit */
00173 #define UART_LCR_SBS_2BIT       (1 << 2)        /*!< UART stop bit select: 2 stop bits (in 5 bit data mode, 1.5 stop bits) */
00174 
00175 /* UART Parity enable bit definitions */
00176 #define UART_LCR_PARITY_EN      (1 << 3)        /*!< UART Parity Enable */
00177 #define UART_LCR_PARITY_DIS     (0 << 3)        /*!< UART Parity Disable */
00178 #define UART_LCR_PARITY_ODD     (0 << 4)        /*!< UART Parity select: Odd parity */
00179 #define UART_LCR_PARITY_EVEN    (1 << 4)        /*!< UART Parity select: Even parity */
00180 #define UART_LCR_PARITY_F_1     (2 << 4)        /*!< UART Parity select: Forced 1 stick parity */
00181 #define UART_LCR_PARITY_F_0     (3 << 4)        /*!< UART Parity select: Forced 0 stick parity */
00182 #define UART_LCR_BREAK_EN       (1 << 6)        /*!< UART Break transmission enable */
00183 #define UART_LCR_DLAB_EN        (1 << 7)        /*!< UART Divisor Latches Access bit enable */
00184 #define UART_LCR_BITMASK        (0xFF)          /*!< UART line control bit mask */
00185 
00186 /**
00187  * @brief Macro defines for UART Modem Control Register
00188  */
00189 #define UART_MCR_DTR_CTRL       (1 << 0)        /*!< Source for modem output pin DTR */
00190 #define UART_MCR_RTS_CTRL       (1 << 1)        /*!< Source for modem output pin RTS */
00191 #define UART_MCR_LOOPB_EN       (1 << 4)        /*!< Loop back mode select */
00192 #define UART_MCR_AUTO_RTS_EN    (1 << 6)        /*!< Enable Auto RTS flow-control */
00193 #define UART_MCR_AUTO_CTS_EN    (1 << 7)        /*!< Enable Auto CTS flow-control */
00194 #define UART_MCR_BITMASK        (0xD3)          /*!< UART bit mask value */
00195 
00196 /**
00197  * @brief Macro defines for UART Line Status Register
00198  */
00199 #define UART_LSR_RDR        (1 << 0)    /*!< Line status: Receive data ready */
00200 #define UART_LSR_OE         (1 << 1)    /*!< Line status: Overrun error */
00201 #define UART_LSR_PE         (1 << 2)    /*!< Line status: Parity error */
00202 #define UART_LSR_FE         (1 << 3)    /*!< Line status: Framing error */
00203 #define UART_LSR_BI         (1 << 4)    /*!< Line status: Break interrupt */
00204 #define UART_LSR_THRE       (1 << 5)    /*!< Line status: Transmit holding register empty */
00205 #define UART_LSR_TEMT       (1 << 6)    /*!< Line status: Transmitter empty */
00206 #define UART_LSR_RXFE       (1 << 7)    /*!< Line status: Error in RX FIFO */
00207 #define UART_LSR_TXFE       (1 << 8)    /*!< Line status: Error in RX FIFO */
00208 #define UART_LSR_BITMASK    (0xFF)      /*!< UART Line status bit mask */
00209 #define UART1_LSR_BITMASK   (0x1FF)     /*!< UART1 Line status bit mask - valid for 11xx, 18xx/43xx UART0/2/3 only */
00210 
00211 /**
00212  * @brief Macro defines for UART Modem Status Register
00213  */
00214 #define UART_MSR_DELTA_CTS      (1 << 0)    /*!< Modem status: State change of input CTS */
00215 #define UART_MSR_DELTA_DSR      (1 << 1)    /*!< Modem status: State change of input DSR */
00216 #define UART_MSR_LO2HI_RI       (1 << 2)    /*!< Modem status: Low to high transition of input RI */
00217 #define UART_MSR_DELTA_DCD      (1 << 3)    /*!< Modem status: State change of input DCD */
00218 #define UART_MSR_CTS            (1 << 4)    /*!< Modem status: Clear To Send State */
00219 #define UART_MSR_DSR            (1 << 5)    /*!< Modem status: Data Set Ready State */
00220 #define UART_MSR_RI             (1 << 6)    /*!< Modem status: Ring Indicator State */
00221 #define UART_MSR_DCD            (1 << 7)    /*!< Modem status: Data Carrier Detect State */
00222 #define UART_MSR_BITMASK        (0xFF)      /*!< Modem status: MSR register bit-mask value */
00223 
00224 /**
00225  * @brief Macro defines for UART Auto baudrate control register
00226  */
00227 #define UART_ACR_START              (1 << 0)    /*!< UART Auto-baud start */
00228 #define UART_ACR_MODE               (1 << 1)    /*!< UART Auto baudrate Mode 1 */
00229 #define UART_ACR_AUTO_RESTART       (1 << 2)    /*!< UART Auto baudrate restart */
00230 #define UART_ACR_ABEOINT_CLR        (1 << 8)    /*!< UART End of auto-baud interrupt clear */
00231 #define UART_ACR_ABTOINT_CLR        (1 << 9)    /*!< UART Auto-baud time-out interrupt clear */
00232 #define UART_ACR_BITMASK            (0x307)     /*!< UART Auto Baudrate register bit mask */
00233 
00234 /**
00235  * @brief Macro defines for UART RS485 Control register
00236  */
00237 #define UART_RS485CTRL_NMM_EN       (1 << 0)    /*!< RS-485/EIA-485 Normal Multi-drop Mode (NMM) is disabled */
00238 #define UART_RS485CTRL_RX_DIS       (1 << 1)    /*!< The receiver is disabled */
00239 #define UART_RS485CTRL_AADEN        (1 << 2)    /*!< Auto Address Detect (AAD) is enabled */
00240 #define UART_RS485CTRL_SEL_DTR      (1 << 3)    /*!< If direction control is enabled (bit DCTRL = 1), pin DTR is
00241                                                         used for direction control */
00242 #define UART_RS485CTRL_DCTRL_EN     (1 << 4)    /*!< Enable Auto Direction Control */
00243 #define UART_RS485CTRL_OINV_1       (1 << 5)    /*!< This bit reverses the polarity of the direction
00244                                                        control signal on the RTS (or DTR) pin. The direction control pin
00245                                                        will be driven to logic "1" when the transmitter has data to be sent */
00246 #define UART_RS485CTRL_BITMASK      (0x3F)      /*!< RS485 control bit-mask value */
00247 
00248 /**
00249  * @brief Macro defines for UART IrDA Control Register - valid for 11xx, 17xx/40xx UART0/2/3, 18xx/43xx UART3 only
00250  */
00251 #define UART_ICR_IRDAEN         (1 << 0)            /*!< IrDA mode enable */
00252 #define UART_ICR_IRDAINV        (1 << 1)            /*!< IrDA serial input inverted */
00253 #define UART_ICR_FIXPULSE_EN    (1 << 2)            /*!< IrDA fixed pulse width mode */
00254 #define UART_ICR_PULSEDIV(n)    ((n & 0x07) << 3)   /*!< PulseDiv - Configures the pulse when FixPulseEn = 1 */
00255 #define UART_ICR_BITMASK        (0x3F)              /*!< UART IRDA bit mask */
00256 
00257 /**
00258  * @brief Macro defines for UART half duplex register - ????
00259  */
00260 #define UART_HDEN_HDEN          ((1 << 0))          /*!< enable half-duplex mode*/
00261 
00262 /**
00263  * @brief Macro defines for UART Smart card interface Control Register - valid for 11xx, 18xx/43xx UART0/2/3 only
00264  */
00265 #define UART_SCICTRL_SCIEN        (1 << 0)          /*!< enable asynchronous half-duplex smart card interface*/
00266 #define UART_SCICTRL_NACKDIS      (1 << 1)          /*!< NACK response is inhibited*/
00267 #define UART_SCICTRL_PROTSEL_T1   (1 << 2)          /*!< ISO7816-3 protocol T1 is selected*/
00268 #define UART_SCICTRL_TXRETRY(n)   ((n & 0x07) << 5) /*!< number of retransmission*/
00269 #define UART_SCICTRL_GUARDTIME(n) ((n & 0xFF) << 8) /*!< Extra guard time*/
00270 
00271 /**
00272  * @brief Macro defines for UART Fractional Divider Register
00273  */
00274 #define UART_FDR_DIVADDVAL(n)   (n & 0x0F)          /*!< Baud-rate generation pre-scaler divisor */
00275 #define UART_FDR_MULVAL(n)      ((n << 4) & 0xF0)   /*!< Baud-rate pre-scaler multiplier value */
00276 #define UART_FDR_BITMASK        (0xFF)              /*!< UART Fractional Divider register bit mask */
00277 
00278 /**
00279  * @brief Macro defines for UART Tx Enable Register
00280  */
00281 #define UART_TER1_TXEN      (1 << 7)        /*!< Transmit enable bit  - valid for 11xx, 13xx, 17xx/40xx only */
00282 #define UART_TER2_TXEN      (1 << 0)        /*!< Transmit enable bit  - valid for 18xx/43xx only */
00283 
00284 /**
00285  * @brief Macro defines for UART Synchronous Control Register - 11xx, 18xx/43xx UART0/2/3 only 
00286  */
00287 #define UART_SYNCCTRL_SYNC             (1 << 0)         /*!< enable synchronous mode*/
00288 #define UART_SYNCCTRL_CSRC_MASTER      (1 << 1)         /*!< synchronous master mode*/
00289 #define UART_SYNCCTRL_FES              (1 << 2)         /*!< sample on falling edge*/
00290 #define UART_SYNCCTRL_TSBYPASS         (1 << 3)         /*!< to be defined*/
00291 #define UART_SYNCCTRL_CSCEN            (1 << 4)         /*!< Continuous running clock enable (master mode only)*/
00292 #define UART_SYNCCTRL_STARTSTOPDISABLE (1 << 5)         /*!< Do not send start/stop bit*/
00293 #define UART_SYNCCTRL_CCCLR            (1 << 6)         /*!< stop continuous clock*/
00294 
00295 /**
00296  * @brief   Enable transmission on UART TxD pin
00297  * @param   pUART   : Pointer to selected pUART peripheral
00298  * @return Nothing
00299  */
00300 STATIC INLINE void Chip_UART_TXEnable(LPC_USART_T *pUART)
00301 {
00302     pUART->TER1  = UART_TER1_TXEN;
00303 }
00304 
00305 /**
00306  * @brief   Disable transmission on UART TxD pin
00307  * @param   pUART   : Pointer to selected pUART peripheral
00308  * @return Nothing
00309  */
00310 STATIC INLINE void Chip_UART_TXDisable(LPC_USART_T *pUART)
00311 {
00312     pUART->TER1  = 0;
00313 }
00314 
00315 /**
00316  * @brief   Transmit a single data byte through the UART peripheral
00317  * @param   pUART   : Pointer to selected UART peripheral
00318  * @param   data    : Byte to transmit
00319  * @return  Nothing
00320  * @note    This function attempts to place a byte into the UART transmit
00321  *          FIFO or transmit hold register regard regardless of UART state
00322  */
00323 STATIC INLINE void Chip_UART_SendByte(LPC_USART_T *pUART, uint8_t data)
00324 {
00325     pUART->THR  = (uint32_t) data;
00326 }
00327 
00328 /**
00329  * @brief   Read a single byte data from the UART peripheral
00330  * @param   pUART   : Pointer to selected UART peripheral
00331  * @return  A single byte of data read
00332  * @note    This function reads a byte from the UART receive FIFO or
00333  *          receive hold register regard regardless of UART state. The
00334  *          FIFO status should be read first prior to using this function
00335  */
00336 STATIC INLINE uint8_t Chip_UART_ReadByte(LPC_USART_T *pUART)
00337 {
00338     return (uint8_t) (pUART->RBR  & UART_RBR_MASKBIT);
00339 }
00340 
00341 /**
00342  * @brief   Enable UART interrupts
00343  * @param   pUART   : Pointer to selected UART peripheral
00344  * @param   intMask : OR'ed Interrupts to enable in the Interrupt Enable Register (IER)
00345  * @return  Nothing
00346  * @note    Use an OR'ed value of UART_IER_* definitions with this function
00347  *          to enable specific UART interrupts. The Divisor Latch Access Bit
00348  *          (DLAB) in LCR must be cleared in order to access the IER register.
00349  *          This function doesn't alter the DLAB state
00350  */
00351 STATIC INLINE void Chip_UART_IntEnable(LPC_USART_T *pUART, uint32_t intMask)
00352 {
00353     pUART->IER  |= intMask;
00354 }
00355 
00356 /**
00357  * @brief   Disable UART interrupts
00358  * @param   pUART   : Pointer to selected UART peripheral
00359  * @param   intMask : OR'ed Interrupts to disable in the Interrupt Enable Register (IER)
00360  * @return  Nothing
00361  * @note    Use an OR'ed value of UART_IER_* definitions with this function
00362  *          to disable specific UART interrupts. The Divisor Latch Access Bit
00363  *          (DLAB) in LCR must be cleared in order to access the IER register.
00364  *          This function doesn't alter the DLAB state
00365  */
00366 STATIC INLINE void Chip_UART_IntDisable(LPC_USART_T *pUART, uint32_t intMask)
00367 {
00368     pUART->IER  &= ~intMask;
00369 }
00370 
00371 /**
00372  * @brief   Returns UART interrupts that are enabled
00373  * @param   pUART   : Pointer to selected UART peripheral
00374  * @return  Returns the enabled UART interrupts
00375  * @note    Use an OR'ed value of UART_IER_* definitions with this function
00376  *          to determine which interrupts are enabled. You can check
00377  *          for multiple enabled bits if needed.
00378  */
00379 STATIC INLINE uint32_t Chip_UART_GetIntsEnabled(LPC_USART_T *pUART)
00380 {
00381     return pUART->IER ;
00382 }
00383 
00384 /**
00385  * @brief   Read the Interrupt Identification Register (IIR)
00386  * @param   pUART   : Pointer to selected UART peripheral
00387  * @return  Current pending interrupt status per the IIR register
00388  */
00389 STATIC INLINE uint32_t Chip_UART_ReadIntIDReg(LPC_USART_T *pUART)
00390 {
00391     return pUART->IIR ;
00392 }
00393 
00394 /**
00395  * @brief   Setup the UART FIFOs
00396  * @param   pUART   : Pointer to selected UART peripheral
00397  * @param   fcr     : FIFO control register setup OR'ed flags
00398  * @return  Nothing
00399  * @note    Use OR'ed value of UART_FCR_* definitions with this function
00400  *          to select specific options. For example, to enable the FIFOs
00401  *          with a RX trip level of 8 characters, use something like
00402  *          (UART_FCR_FIFO_EN | UART_FCR_TRG_LEV2)
00403  */
00404 STATIC INLINE void Chip_UART_SetupFIFOS(LPC_USART_T *pUART, uint32_t fcr)
00405 {
00406     pUART->FCR  = fcr;
00407 }
00408 
00409 /**
00410  * @brief   Configure data width, parity and stop bits
00411  * @param   pUART   : Pointer to selected pUART peripheral
00412  * @param   config  : UART configuration, OR'ed values of UART_LCR_* defines
00413  * @return  Nothing
00414  * @note    Select OR'ed config options for the UART from the UART_LCR_*
00415  *          definitions. For example, a configuration of 8 data bits, 1
00416  *          stop bit, and even (enabled) parity would be
00417  *          (UART_LCR_WLEN8 | UART_LCR_SBS_1BIT | UART_LCR_PARITY_EN | UART_LCR_PARITY_EVEN)
00418  */
00419 STATIC INLINE void Chip_UART_ConfigData(LPC_USART_T *pUART, uint32_t config)
00420 {
00421     pUART->LCR  = config;
00422 }
00423 
00424 /**
00425  * @brief   Enable access to Divisor Latches
00426  * @param   pUART   : Pointer to selected UART peripheral
00427  * @return  Nothing
00428  */
00429 STATIC INLINE void Chip_UART_EnableDivisorAccess(LPC_USART_T *pUART)
00430 {
00431     pUART->LCR  |= UART_LCR_DLAB_EN;
00432 }
00433 
00434 /**
00435  * @brief   Disable access to Divisor Latches
00436  * @param   pUART   : Pointer to selected UART peripheral
00437  * @return  Nothing
00438  */
00439 STATIC INLINE void Chip_UART_DisableDivisorAccess(LPC_USART_T *pUART)
00440 {
00441     pUART->LCR  &= ~UART_LCR_DLAB_EN;
00442 }
00443 
00444 /**
00445  * @brief   Set LSB and MSB divisor latch registers
00446  * @param   pUART   : Pointer to selected UART peripheral
00447  * @param   dll     : Divisor Latch LSB value
00448  * @param   dlm     : Divisor Latch MSB value
00449  * @return  Nothing
00450  * @note    The Divisor Latch Access Bit (DLAB) in LCR must be set in
00451  *          order to access the USART Divisor Latches. This function
00452  *          doesn't alter the DLAB state.
00453  */
00454 STATIC INLINE void Chip_UART_SetDivisorLatches(LPC_USART_T *pUART, uint8_t dll, uint8_t dlm)
00455 {
00456     pUART->DLL  = (uint32_t) dll;
00457     pUART->DLM  = (uint32_t) dlm;
00458 }
00459 
00460 /**
00461  * @brief   Return modem control register/status
00462  * @param   pUART   : Pointer to selected UART peripheral
00463  * @return  Modem control register (status)
00464  * @note    Mask bits of the returned status value with UART_MCR_*
00465  *          definitions for specific statuses.
00466  */
00467 STATIC INLINE uint32_t Chip_UART_ReadModemControl(LPC_USART_T *pUART)
00468 {
00469     return pUART->MCR ;
00470 }
00471 
00472 /**
00473  * @brief   Set modem control register/status
00474  * @param   pUART   : Pointer to selected UART peripheral
00475  * @param   mcr     : Modem control register flags to set
00476  * @return  Nothing
00477  * @note    Use an Or'ed value of UART_MCR_* definitions with this
00478  *          call to set specific options.
00479  */
00480 STATIC INLINE void Chip_UART_SetModemControl(LPC_USART_T *pUART, uint32_t mcr)
00481 {
00482     pUART->MCR  |= mcr;
00483 }
00484 
00485 /**
00486  * @brief   Clear modem control register/status
00487  * @param   pUART   : Pointer to selected UART peripheral
00488  * @param   mcr     : Modem control register flags to clear
00489  * @return  Nothing
00490  * @note    Use an Or'ed value of UART_MCR_* definitions with this
00491  *          call to clear specific options.
00492  */
00493 STATIC INLINE void Chip_UART_ClearModemControl(LPC_USART_T *pUART, uint32_t mcr)
00494 {
00495     pUART->MCR  &= ~mcr;
00496 }
00497 
00498 /**
00499  * @brief   Return Line Status register/status (LSR)
00500  * @param   pUART   : Pointer to selected UART peripheral
00501  * @return  Line Status register (status)
00502  * @note    Mask bits of the returned status value with UART_LSR_*
00503  *          definitions for specific statuses.
00504  */
00505 STATIC INLINE uint32_t Chip_UART_ReadLineStatus(LPC_USART_T *pUART)
00506 {
00507     return pUART->LSR ;
00508 }
00509 
00510 /**
00511  * @brief   Return Modem Status register/status (MSR)
00512  * @param   pUART   : Pointer to selected UART peripheral
00513  * @return  Modem Status register (status)
00514  * @note    Mask bits of the returned status value with UART_MSR_*
00515  *          definitions for specific statuses.
00516  */
00517 STATIC INLINE uint32_t Chip_UART_ReadModemStatus(LPC_USART_T *pUART)
00518 {
00519     return pUART->MSR ;
00520 }
00521 
00522 /**
00523  * @brief   Write a byte to the scratchpad register
00524  * @param   pUART   : Pointer to selected UART peripheral
00525  * @param   data    : Byte value to write
00526  * @return  Nothing
00527  */
00528 STATIC INLINE void Chip_UART_SetScratch(LPC_USART_T *pUART, uint8_t data)
00529 {
00530     pUART->SCR  = (uint32_t) data;
00531 }
00532 
00533 /**
00534  * @brief   Returns current byte value in the scratchpad register
00535  * @param   pUART   : Pointer to selected UART peripheral
00536  * @return  Byte value read from scratchpad register
00537  */
00538 STATIC INLINE uint8_t Chip_UART_ReadScratch(LPC_USART_T *pUART)
00539 {
00540     return (uint8_t) (pUART->SCR  & 0xFF);
00541 }
00542 
00543 /**
00544  * @brief   Set autobaud register options
00545  * @param   pUART   : Pointer to selected UART peripheral
00546  * @param   acr     : Or'ed values to set for ACR register
00547  * @return  Nothing
00548  * @note    Use an Or'ed value of UART_ACR_* definitions with this
00549  *          call to set specific options.
00550  */
00551 STATIC INLINE void Chip_UART_SetAutoBaudReg(LPC_USART_T *pUART, uint32_t acr)
00552 {
00553     pUART->ACR  |= acr;
00554 }
00555 
00556 /**
00557  * @brief   Clear autobaud register options
00558  * @param   pUART   : Pointer to selected UART peripheral
00559  * @param   acr     : Or'ed values to clear for ACR register
00560  * @return  Nothing
00561  * @note    Use an Or'ed value of UART_ACR_* definitions with this
00562  *          call to clear specific options.
00563  */
00564 STATIC INLINE void Chip_UART_ClearAutoBaudReg(LPC_USART_T *pUART, uint32_t acr)
00565 {
00566     pUART->ACR  &= ~acr;
00567 }
00568 
00569 /**
00570  * @brief   Set RS485 control register options
00571  * @param   pUART   : Pointer to selected UART peripheral
00572  * @param   ctrl    : Or'ed values to set for RS485 control register
00573  * @return  Nothing
00574  * @note    Use an Or'ed value of UART_RS485CTRL_* definitions with this
00575  *          call to set specific options.
00576  */
00577 STATIC INLINE void Chip_UART_SetRS485Flags(LPC_USART_T *pUART, uint32_t ctrl)
00578 {
00579     pUART->RS485CTRL  |= ctrl;
00580 }
00581 
00582 /**
00583  * @brief   Clear RS485 control register options
00584  * @param   pUART   : Pointer to selected UART peripheral
00585  * @param   ctrl    : Or'ed values to clear for RS485 control register
00586  * @return  Nothing
00587  * @note    Use an Or'ed value of UART_RS485CTRL_* definitions with this
00588  *          call to clear specific options.
00589  */
00590 STATIC INLINE void Chip_UART_ClearRS485Flags(LPC_USART_T *pUART, uint32_t ctrl)
00591 {
00592     pUART->RS485CTRL  &= ~ctrl;
00593 }
00594 
00595 /**
00596  * @brief   Set RS485 address match value
00597  * @param   pUART   : Pointer to selected UART peripheral
00598  * @param   addr    : Address match value for RS-485/EIA-485 mode
00599  * @return  Nothing
00600  */
00601 STATIC INLINE void Chip_UART_SetRS485Addr(LPC_USART_T *pUART, uint8_t addr)
00602 {
00603     pUART->RS485ADRMATCH  = (uint32_t) addr;
00604 }
00605 
00606 /**
00607  * @brief   Read RS485 address match value
00608  * @param   pUART   : Pointer to selected UART peripheral
00609  * @return  Address match value for RS-485/EIA-485 mode
00610  */
00611 STATIC INLINE uint8_t Chip_UART_GetRS485Addr(LPC_USART_T *pUART)
00612 {
00613     return (uint8_t) (pUART->RS485ADRMATCH  & 0xFF);
00614 }
00615 
00616 /**
00617  * @brief   Set RS485 direction control (RTS or DTR) delay value
00618  * @param   pUART   : Pointer to selected UART peripheral
00619  * @param   dly     : direction control (RTS or DTR) delay value
00620  * @return  Nothing
00621  * @note    This delay time is in periods of the baud clock. Any delay
00622  *          time from 0 to 255 bit times may be programmed.
00623  */
00624 STATIC INLINE void Chip_UART_SetRS485Delay(LPC_USART_T *pUART, uint8_t dly)
00625 {
00626     pUART->RS485DLY  = (uint32_t) dly;
00627 }
00628 
00629 /**
00630  * @brief   Read RS485 direction control (RTS or DTR) delay value
00631  * @param   pUART   : Pointer to selected UART peripheral
00632  * @return  direction control (RTS or DTR) delay value
00633  * @note    This delay time is in periods of the baud clock. Any delay
00634  *          time from 0 to 255 bit times may be programmed.
00635  */
00636 STATIC INLINE uint8_t Chip_UART_GetRS485Delay(LPC_USART_T *pUART)
00637 {
00638     return (uint8_t) (pUART->RS485DLY  & 0xFF);
00639 }
00640 
00641 /**
00642  * @brief   Initializes the pUART peripheral
00643  * @param   pUART       : Pointer to selected pUART peripheral
00644  * @return  Nothing
00645  */
00646 void Chip_UART_Init(LPC_USART_T *pUART);
00647 
00648 /**
00649  * @brief   De-initializes the pUART peripheral.
00650  * @param   pUART       : Pointer to selected pUART peripheral
00651  * @return  Nothing
00652  */
00653 void Chip_UART_DeInit(LPC_USART_T *pUART);
00654 
00655 /**
00656  * @brief   Transmit a byte array through the UART peripheral (non-blocking)
00657  * @param   pUART       : Pointer to selected UART peripheral
00658  * @param   data        : Pointer to bytes to transmit
00659  * @param   numBytes    : Number of bytes to transmit
00660  * @return  The actual number of bytes placed into the FIFO
00661  * @note    This function places data into the transmit FIFO until either
00662  *          all the data is in the FIFO or the FIFO is full. This function
00663  *          will not block in the FIFO is full. The actual number of bytes
00664  *          placed into the FIFO is returned. This function ignores errors.
00665  */
00666 int Chip_UART_Send(LPC_USART_T *pUART, const void *data, int numBytes);
00667 
00668 /**
00669  * @brief   Read data through the UART peripheral (non-blocking)
00670  * @param   pUART       : Pointer to selected UART peripheral
00671  * @param   data        : Pointer to bytes array to fill
00672  * @param   numBytes    : Size of the passed data array
00673  * @return  The actual number of bytes read
00674  * @note    This function reads data from the receive FIFO until either
00675  *          all the data has been read or the passed buffer is completely full.
00676  *          This function will not block. This function ignores errors.
00677  */
00678 int Chip_UART_Read(LPC_USART_T *pUART, void *data, int numBytes);
00679 
00680 /**
00681  * @brief   Sets best dividers to get a target bit rate (without fractional divider)
00682  * @param   pUART       : Pointer to selected UART peripheral
00683  * @param   baudrate    : Target baud rate (baud rate = bit rate)
00684  * @return  The actual baud rate, or 0 if no rate can be found
00685  */
00686 uint32_t Chip_UART_SetBaud(LPC_USART_T *pUART, uint32_t baudrate);
00687 
00688 /**
00689  * @brief   Sets best dividers to get a target bit rate (with fractional divider)
00690  * @param   pUART       : Pointer to selected UART peripheral
00691  * @param   baudrate    : Target baud rate (baud rate = bit rate)
00692  * @return  The actual baud rate, or 0 if no rate can be found
00693  */
00694 uint32_t Chip_UART_SetBaudFDR(LPC_USART_T *pUART, uint32_t baudrate);
00695 
00696 /**
00697  * @brief   Transmit a byte array through the UART peripheral (blocking)
00698  * @param   pUART       : Pointer to selected UART peripheral
00699  * @param   data        : Pointer to data to transmit
00700  * @param   numBytes    : Number of bytes to transmit
00701  * @return  The number of bytes transmitted
00702  * @note    This function will send or place all bytes into the transmit
00703  *          FIFO. This function will block until the last bytes are in the FIFO.
00704  */
00705 int Chip_UART_SendBlocking(LPC_USART_T *pUART, const void *data, int numBytes);
00706 
00707 /**
00708  * @brief   Read data through the UART peripheral (blocking)
00709  * @param   pUART       : Pointer to selected UART peripheral
00710  * @param   data        : Pointer to data array to fill
00711  * @param   numBytes    : Size of the passed data array
00712  * @return  The size of the dat array
00713  * @note    This function reads data from the receive FIFO until the passed
00714  *          buffer is completely full. The function will block until full.
00715  *          This function ignores errors.
00716  */
00717 int Chip_UART_ReadBlocking(LPC_USART_T *pUART, void *data, int numBytes);
00718 
00719 /**
00720  * @brief   UART receive-only interrupt handler for ring buffers
00721  * @param   pUART   : Pointer to selected UART peripheral
00722  * @param   pRB     : Pointer to ring buffer structure to use
00723  * @return  Nothing
00724  * @note    If ring buffer support is desired for the receive side
00725  *          of data transfer, the UART interrupt should call this
00726  *          function for a receive based interrupt status.
00727  */
00728 void Chip_UART_RXIntHandlerRB(LPC_USART_T *pUART, RINGBUFF_T *pRB);
00729 
00730 /**
00731  * @brief   UART transmit-only interrupt handler for ring buffers
00732  * @param   pUART   : Pointer to selected UART peripheral
00733  * @param   pRB     : Pointer to ring buffer structure to use
00734  * @return  Nothing
00735  * @note    If ring buffer support is desired for the transmit side
00736  *          of data transfer, the UART interrupt should call this
00737  *          function for a transmit based interrupt status.
00738  */
00739 void Chip_UART_TXIntHandlerRB(LPC_USART_T *pUART, RINGBUFF_T *pRB);
00740 
00741 /**
00742  * @brief   Populate a transmit ring buffer and start UART transmit
00743  * @param   pUART   : Pointer to selected UART peripheral
00744  * @param   pRB     : Pointer to ring buffer structure to use
00745  * @param   data    : Pointer to buffer to move to ring buffer
00746  * @param   bytes   : Number of bytes to move
00747  * @return  The number of bytes placed into the ring buffer
00748  * @note    Will move the data into the TX ring buffer and start the
00749  *          transfer. If the number of bytes returned is less than the
00750  *          number of bytes to send, the ring buffer is considered full.
00751  */
00752 uint32_t Chip_UART_SendRB(LPC_USART_T *pUART, RINGBUFF_T *pRB, const void *data, int bytes);
00753 
00754 /**
00755  * @brief   Copy data from a receive ring buffer
00756  * @param   pUART   : Pointer to selected UART peripheral
00757  * @param   pRB     : Pointer to ring buffer structure to use
00758  * @param   data    : Pointer to buffer to fill from ring buffer
00759  * @param   bytes   : Size of the passed buffer in bytes
00760  * @return  The number of bytes placed into the ring buffer
00761  * @note    Will move the data from the RX ring buffer up to the
00762  *          the maximum passed buffer size. Returns 0 if there is
00763  *          no data in the ring buffer.
00764  */
00765 int Chip_UART_ReadRB(LPC_USART_T *pUART, RINGBUFF_T *pRB, void *data, int bytes);
00766 
00767 /**
00768  * @brief   UART receive/transmit interrupt handler for ring buffers
00769  * @param   pUART   : Pointer to selected UART peripheral
00770  * @param   pRXRB   : Pointer to transmit ring buffer
00771  * @param   pTXRB   : Pointer to receive ring buffer
00772  * @return  Nothing
00773  * @note    This provides a basic implementation of the UART IRQ
00774  *          handler for support of a ring buffer implementation for
00775  *          transmit and receive.
00776  */
00777 void Chip_UART_IRQRBHandler(LPC_USART_T *pUART, RINGBUFF_T *pRXRB, RINGBUFF_T *pTXRB);
00778 
00779 /**
00780  * @}
00781  */
00782 
00783 #ifdef __cplusplus
00784 }
00785 #endif
00786 
00787 #endif /* __UART_11XX_H_ */