ssd1963.cpp

00001 /*
00002  * Copyright (C)2010-2012 Henning Karlsen. All right reserved.
00003  * Copyright (C)2012 Todor Todorov.
00004  *
00005  * This library is free software; you can redistribute it and/or
00006  * modify it under the terms of the GNU Lesser General Public
00007  * License as published by the Free Software Foundation; either
00008  * version 2.1 of the License, or (at your option) any later version.
00009  *
00010  * This library is distributed in the hope that it will be useful,
00011  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00012  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00013  * Lesser General Public License for more details.
00014  *
00015  * You should have received a copy of the GNU Lesser General Public
00016  * License along with this library; if not, write to:
00017  *
00018  * Free Software Foundation, Inc.
00019  * 51 Franklin St, 5th Floor, Boston, MA 02110-1301, USA
00020  *
00021  *********************************************************************/
00022 #include "ssd1963.h"
00023 #include "helpers.h"
00024 
00025 SSD1963_LCD::SSD1963_LCD( PinName CS, PinName RESET, PinName RS, PinName WR, BusOut* DATA_PORT, PinName BL, PinName RD, backlight_t blType, float defaultBackLightLevel )
00026     : LCD( 272, 480, CS, RS, RESET, BL, blType, defaultBackLightLevel ), _lcd_pin_wr( WR )
00027 {
00028     _lcd_port = DATA_PORT;
00029     if ( RD != NC ) _lcd_pin_rd = new DigitalOut( RD );
00030     else _lcd_pin_rd = 0;
00031 }
00032 
00033 void SSD1963_LCD::Initialize( orientation_t orientation, colordepth_t colors )
00034 {
00035     _orientation = orientation;
00036     _colorDepth = colors;
00037     
00038     _lcd_pin_reset = HIGH;
00039     wait_ms( 5 );
00040     _lcd_pin_reset = LOW;
00041     wait_ms( 15 );
00042     _lcd_pin_reset = HIGH;
00043     _lcd_pin_cs = HIGH;
00044     if ( _lcd_pin_bl != 0 )
00045         *_lcd_pin_bl = HIGH;
00046     else if ( _bl_pwm != 0 )
00047         *_bl_pwm = _bl_pwm_default;
00048     if ( _lcd_pin_rd != 0 )
00049         *_lcd_pin_rd = HIGH;
00050     _lcd_pin_wr = HIGH;
00051     wait_ms( 15 );
00052     
00053     Activate();
00054     // Set PLL MN -------------------------------------------------------------
00055     // @Parameters : 3
00056     WriteCmd(0xE2);
00057     WriteData(0x23);             // N[7:0] : Multiplier (N) of PLL. (POR = 00101101) b00100011
00058     WriteData(0x02);             // M[3:0] : Divider (M) of PLL. (POR = 0011)
00059     WriteData(0x04);             // C[2] : Effectuate MN value (POR = 100) - Effectuate the multiplier and divider value
00060     //WriteData(0x54);
00061     
00062     // Set PLL
00063     // @Parameters : 1
00064     WriteCmd(0xE0);
00065     WriteData(0x01);             // Use reference clock as system clock & Enable PLL
00066     wait_ms(1);                  // Wait 100us to let the PLL stable
00067     WriteCmd(0xE0);             // Set PLL
00068     WriteData(0x03);             // Use PLL output as system clock & Enable PLL
00069     wait_ms(1); 
00070 
00071     // Software Reset ---------------------------------------------------------
00072     WriteCmd(0x01);
00073     wait_ms(1);   
00074 
00075     // Set LSHIFT Frequency ---------------------------------------------------
00076     // @Parameters : 3
00077     WriteCmd(0xE6);             // Set LSHIFT Frequency
00078     WriteData(0x03);             // LCDC_FPR[19:16] : The highest 4 bits for the pixel clock frequency settings
00079     WriteData(0xFF);             // LCDC_FPR[15:8]  : The higher byte for the pixel clock frequency settings
00080     WriteData(0xFF);             // LCDC_FPR[7:0]   : The low byte for the pixel clock frequency settings
00081 
00082     // Set LCD Mode
00083     // @Parameters : 7
00084     WriteCmd(0xB0);
00085     /*
00086     WriteData(0x00);             // A[5..0] TFT
00087     //WriteData(0x10);
00088     WriteData(0x00);             // B[7..5]   : Hsync+Vsync +DE mode & TFT mode
00089     //WriteData(0x80);
00090     WriteData((HDP>>8)&0xFF);    // HPS[10:8] : Set the horizontal panel size (POR = 010)
00091     WriteData(HDP&0xFF);         // HPS[7:0]  : Set the horizontal panel size (POR = 01111111)
00092     WriteData((VDP>>8)&0xFF);    // VPS[10:8] : Set the vertical panel size (POR = 001)
00093     WriteData(VDP&0xFF);         // VPS[7:0]  : Set the vertical panel size (POR = 11011111)
00094     WriteData(0x00);             // G[5..0]   : Even line RGB sequence & Odd line RGB sequence
00095     */
00096     //WriteData(0x10);                // set 18-bit for 7" panel TY700TFT800480
00097     WriteData(0x20);                // set 18-bit for 7" panel TY700TFT800480
00098     //WriteData(0x80);                // set TTL mode
00099     WriteData(0x00);                // set TTL mode
00100     WriteData((DISP_HOR_RESOLUTION-1)>>8); //Set panel size
00101     WriteData(DISP_HOR_RESOLUTION-1);
00102     WriteData((DISP_VER_RESOLUTION-1)>>8);
00103     WriteData(DISP_VER_RESOLUTION-1);
00104     WriteData(0x00);
00105     
00106     
00107     // Set Horizontal Period --------------------------------------------------
00108     // @Parameters : 8
00109     WriteCmd(0xB4);
00110     /*
00111     WriteData((HT>>8)&0xFF);     // HT[10:8]   : High byte of horizontal total period (display + non-display) in pixel clock
00112     WriteData(HT&0xFF);          // HT[7:0]    : Low byte of the horizontal total period (display + non-display) in pixel clock
00113     WriteData((HPS>>8)&0xFF);    // HPS[10:8]  : High byte of the non-display period between the start of the horizontal sync (LLINE) signal
00114     WriteData(HPS&0xFF);         // HPS[7:0]   : Low byte of the non-display period between the start of the horizontal sync (LLINE) signal
00115     WriteData(HPW&0xFF);         // HPW[6:0]   : Set the horizontal sync pulse width (LLINE) in pixel clock
00116     WriteData((LPS>>8)&0xFF);    // LPS[10:8]  : Set the horizontal sync pulse (LLINE) start location in pixel clock
00117     WriteData(LPS&0xFF);         // LPS[7:0]   : Set the horizontal sync pulse width (LLINE) in start.
00118     WriteData(0x00);             // LPSPP[1:0] : Set the horizontal sync pulse subpixel start position
00119     */
00120     #define HT (DISP_HOR_RESOLUTION+DISP_HOR_PULSE_WIDTH+DISP_HOR_BACK_PORCH+DISP_HOR_FRONT_PORCH)
00121     WriteData((HT-1)>>8);   
00122     WriteData(HT-1);
00123     #define HPS (DISP_HOR_PULSE_WIDTH+DISP_HOR_BACK_PORCH)
00124     WriteData((HPS-1)>>8);
00125     WriteData(HPS-1);
00126     WriteData(DISP_HOR_PULSE_WIDTH-1);
00127     WriteData(0x00);
00128     WriteData(0x00);
00129     WriteData(0x00);
00130     
00131     // Set Vertical Period ----------------------------------------------------
00132     // @Parameters : 7
00133     WriteCmd(0xB6);
00134     /*
00135     WriteData((VT>>8)&0xFF);     // VT[10:8]  : High byte of the vertical total (display + non-display) period in lines
00136     WriteData(VT&0xFF);          // VT[7:0]   : Low byte of the vertical total (display + non-display) period in lines
00137     WriteData((VPS>>8)&0xFF);    // VPS[10:8] : High byte the non-display period in lines between the start of the frame and the first display data in line
00138     WriteData(VPS&0xFF);         // VPS[7:0]  : The non-display period in lines between the start of the frame and the first display data in line
00139     WriteData(VPW&0xFF);         // VPW[6:0]  : Set the vertical sync pulse width (LFRAME) in lines
00140     WriteData((FPS>>8)&0xFF);    // FPS[10:8] : High byte of the vertical sync pulse (LFRAME) start location in lines
00141     WriteData(FPS&0xFF);         // FPS[7:0]  : Low byte of the vertical sync pulse (LFRAME) start location in lines
00142     */
00143     #define VT (DISP_VER_PULSE_WIDTH+DISP_VER_BACK_PORCH+DISP_VER_FRONT_PORCH+DISP_VER_RESOLUTION)
00144     WriteData((VT-1)>>8);
00145     WriteData(VT-1);
00146     #define VSP (DISP_VER_PULSE_WIDTH+DISP_VER_BACK_PORCH)
00147     WriteData((VSP-1)>>8);
00148     WriteData(VSP-1);
00149     WriteData(DISP_VER_PULSE_WIDTH-1);
00150     WriteData(0x00);
00151     WriteData(0x00);
00152     
00153     // Set GPIO Value ---------------------------------------------------------
00154     // @Parameters : 1
00155     WriteCmd(0xBA);
00156     WriteData(0x05);             // A[3..0] : GPIO[2:0] Output 1
00157     
00158     // Set GPIO Configuration
00159     // @Parameters : 2
00160     WriteCmd(0xB8);
00161     WriteData(0x07);             // A[7..0] : GPIO3 = Input, GPIO[2:0] = Output
00162     WriteData(0x01);             // B[0] : GPIO0 Normal
00163     
00164         //Set pixel format, i.e. the bpp
00165     WriteCmd(0x3A);
00166     WriteData(0x55);                // set 16bpp
00167 
00168     // Set Address Mode -------------------------------------------------------
00169     // @Parameters : 1
00170     //WriteCmd(0x36);             // Set Rotation
00171     //WriteData(0x00);             // A[7..0] : Set the read order from host processor to frame buffer by A[7:5] and A[3] and 
00172                                                        // from frame buffer to the display panel by A[2:0] and A[4].
00173                                                        // A[7] : Page address order
00174     // Set Pixel Data Interface -----------------------------------------------
00175     // @Parameters : 1
00176     WriteCmd(0xF0);             // A[2:0] : Pixel Data Interface Format
00177     WriteData(0x03);             // 16-bit (565 format)
00178     wait_ms(1);
00179     
00180     // enter_partial_mode
00181     //WriteCmd(0x12);             // Part of the display area is used for image display
00182     // set_display_on
00183     WriteCmd(0x29);             // Show the image on the display device
00184 
00185     Deactivate();
00186 }
00187 
00188 void SSD1963_LCD::Sleep( void )
00189 {
00190     WriteCmdData( 0x10, 0x0001 ); // sleep mode: 0 = exit, 1 = enter
00191     LCD::Sleep();
00192 }
00193 
00194 void SSD1963_LCD::WakeUp( void )
00195 {
00196     WriteCmdData( 0x10, 0x0000 ); // sleep mode: 0 = exit, 1 = enter
00197     LCD::WakeUp();
00198 }
00199 
00200 void SSD1963_LCD::WriteCmd( unsigned short cmd )
00201 {
00202     _lcd_pin_rs = LOW;
00203     _lcd_port->write( cmd );
00204     _lcd_pin_wr = LOW;
00205     wait_us(1);
00206     _lcd_pin_wr = HIGH;
00207     //pulseLow( _lcd_pin_wr );
00208 }
00209 
00210 void SSD1963_LCD::WriteData( unsigned short data )
00211 {
00212     _lcd_pin_rs = HIGH;
00213     _lcd_port->write( data );
00214     _lcd_pin_wr = LOW;
00215     wait_us(1);
00216     _lcd_pin_wr = HIGH;
00217     
00218     //pulseLow( _lcd_pin_wr );
00219 }
00220 
00221 void SSD1963_LCD::SetXY( unsigned short x1, unsigned short y1, unsigned short x2, unsigned short y2 )
00222 {
00223     //if ( _orientation == PORTRAIT || _orientation == PORTRAIT_REV )
00224     //{
00225         WriteCmd( 0x2A);
00226         WriteData( x1>>8 );
00227         WriteData( x1 );
00228         WriteData( x2>>8 );
00229         WriteData( x2 );
00230         WriteCmd( 0x2B);
00231         WriteData( y1>>8 );
00232         WriteData( y1 );
00233         WriteData( y2>>8 );
00234         WriteData( y2 );
00235         WriteCmd( 0x2B);
00236     /*}
00237     else
00238     {
00239         WriteCmd( 0x2A);
00240         WriteData( y1>>8 );
00241         WriteData( y1 );
00242         WriteData( y2>>8 );
00243         WriteData( y2 );
00244         WriteCmd( 0x2B);
00245         WriteData( x1>>8 );
00246         WriteData( x1 );
00247         WriteData( x2>>8 );
00248         WriteData( x2 );
00249         WriteCmd( 0x2B);
00250     }*/
00251     WriteCmd( 0x2C );
00252 }
00253 
00254 void SSD1963_LCD::SetPixelColor( unsigned int color, colordepth_t mode )
00255 {
00256     unsigned char r, g, b;
00257     unsigned short clr;
00258     if ( _colorDepth == RGB16 )
00259     {
00260         switch ( mode )
00261         {
00262             case RGB16:
00263                 WriteData( color & 0xFFFF );
00264                 break;
00265             case RGB18:
00266                 r = ( color >> 10 ) & 0xF8;
00267                 g = ( color >> 4 ) & 0xFC;
00268                 b = ( color >> 1 ) & 0x1F;
00269                 clr = ( ( r | ( g >> 5 ) ) << 8 ) | ( ( g << 3 ) | b );
00270                 WriteData( clr );
00271                 break;
00272             case RGB24:
00273                 r = ( color >> 16 ) & 0xF8;
00274                 g = ( color >> 8 ) & 0xFC;
00275                 b = color & 0xF8;
00276                 clr = ( ( r | ( g >> 5 ) ) << 8 ) | ( ( g << 3 ) | ( b >> 3 ) );
00277                 WriteData( clr );
00278                 break;
00279         }
00280     }
00281     else if ( _colorDepth == RGB18 )
00282     {
00283         switch ( mode )
00284         {
00285             case RGB16:
00286                 r = ( ( color >> 8 ) & 0xF8 ) | ( ( color & 0x8000 ) >> 13 );
00287                 g = ( color >> 3 ) & 0xFC;
00288                 b = ( ( color << 3 ) & 0xFC ) | ( ( color >> 3 ) & 0x01 );
00289                 WriteData( ( r << 8 ) | g );
00290                 WriteData( b );
00291                 break;
00292             case RGB18:
00293                 b = ( color << 2 ) & 0xFC;
00294                 g = ( color >> 4 ) & 0xFC;
00295                 r = ( color >> 10 ) & 0xFC;
00296                 WriteData( ( r << 8 ) | g );
00297                 WriteData( b );
00298                 break;
00299             case RGB24:
00300                 r = ( color >> 16 ) & 0xFC;
00301                 g = ( color >> 8 ) & 0xFC;
00302                 b = color & 0xFC;
00303                 WriteData( ( r << 8 ) | g );
00304                 WriteData( b );
00305                 break;
00306         }
00307     }
00308 }